target/linux/ipq806x/patches-4.9/0006-spi-qup-Make-sure-mode-is-only-determined-once.patch

   1 From 2852d6df4b60987f9248c3d36d5fe2462e6556b9 Mon Sep 17 00:00:00 2001
   2 From: Andy Gross <andy.gross@linaro.org>
   3 Date: Tue, 12 Apr 2016 09:11:47 -0500
   4 Subject: [PATCH 06/37] spi: qup: Make sure mode is only determined once
   5
   6 This patch calculates the mode once.  All decisions on the current
   7 transaction
   8 is made using the mode instead of use_dma
   9
  10 Signed-off-by: Andy Gross <andy.gross@linaro.org>
  11 ---
  12  drivers/spi/spi-qup.c |   87 +++++++++++++++++++++----------------------------
  13  1 file changed, 37 insertions(+), 50 deletions(-)
  14
  15 --- a/drivers/spi/spi-qup.c
  16 +++ b/drivers/spi/spi-qup.c
  17 @@ -149,12 +149,20 @@ struct spi_qup {
  18         int                     rx_bytes;
  19         int                     qup_v1;
  20
  21 -       int                     use_dma;
  22 +       int                     mode;
  23         struct dma_slave_config rx_conf;
  24         struct dma_slave_config tx_conf;
  25  };
  26
  27
  28 +static inline bool spi_qup_is_dma_xfer(int mode)
  29 +{
  30 +       if (mode == QUP_IO_M_MODE_DMOV || mode == QUP_IO_M_MODE_BAM)
  31 +               return true;
  32 +
  33 +       return false;
  34 +}
  35 +
  36  static inline bool spi_qup_is_valid_state(struct spi_qup *controller)
  37  {
  38         u32 opstate = readl_relaxed(controller->base + QUP_STATE);
  39 @@ -424,7 +432,7 @@ static irqreturn_t spi_qup_qup_irq(int i
  40                 error = -EIO;
  41         }
  42
  43 -       if (!controller->use_dma) {
  44 +       if (!spi_qup_is_dma_xfer(controller->mode)) {
  45                 if (opflags & QUP_OP_IN_SERVICE_FLAG)
  46                         spi_qup_fifo_read(controller, xfer);
  47
  48 @@ -443,34 +451,11 @@ static irqreturn_t spi_qup_qup_irq(int i
  49         return IRQ_HANDLED;
  50  }
  51
  52 -static u32
  53 -spi_qup_get_mode(struct spi_master *master, struct spi_transfer *xfer)
  54 -{
  55 -       struct spi_qup *qup = spi_master_get_devdata(master);
  56 -       u32 mode;
  57 -
  58 -       qup->w_size = 4;
  59 -
  60 -       if (xfer->bits_per_word <= 8)
  61 -               qup->w_size = 1;
  62 -       else if (xfer->bits_per_word <= 16)
  63 -               qup->w_size = 2;
  64 -
  65 -       qup->n_words = xfer->len / qup->w_size;
  66 -
  67 -       if (qup->n_words <= (qup->in_fifo_sz / sizeof(u32)))
  68 -               mode = QUP_IO_M_MODE_FIFO;
  69 -       else
  70 -               mode = QUP_IO_M_MODE_BLOCK;
  71 -
  72 -       return mode;
  73 -}
  74 -
  75  /* set clock freq ... bits per word */
  76  static int spi_qup_io_config(struct spi_device *spi, struct spi_transfer *xfer)
  77  {
  78         struct spi_qup *controller = spi_master_get_devdata(spi->master);
  79 -       u32 config, iomode, mode, control;
  80 +       u32 config, iomode, control;
  81         int ret, n_words;
  82
  83         if (spi->mode & SPI_LOOP && xfer->len > controller->in_fifo_sz) {
  84 @@ -491,23 +476,22 @@ static int spi_qup_io_config(struct spi_
  85                 return -EIO;
  86         }
  87
  88 -       mode = spi_qup_get_mode(spi->master, xfer);
  89 +       controller->w_size = DIV_ROUND_UP(xfer->bits_per_word, 8);
  90 +       controller->n_words = xfer->len / controller->w_size;
  91         n_words = controller->n_words;
  92
  93 -       if (mode == QUP_IO_M_MODE_FIFO) {
  94 +       if (n_words <= (controller->in_fifo_sz / sizeof(u32))) {
  95 +               controller->mode = QUP_IO_M_MODE_FIFO;
  96                 writel_relaxed(n_words, controller->base + QUP_MX_READ_CNT);
  97                 writel_relaxed(n_words, controller->base + QUP_MX_WRITE_CNT);
  98                 /* must be zero for FIFO */
  99                 writel_relaxed(0, controller->base + QUP_MX_INPUT_CNT);
 100                 writel_relaxed(0, controller->base + QUP_MX_OUTPUT_CNT);
 101 -       } else if (!controller->use_dma) {
 102 -               writel_relaxed(n_words, controller->base + QUP_MX_INPUT_CNT);
 103 -               writel_relaxed(n_words, controller->base + QUP_MX_OUTPUT_CNT);
 104 -               /* must be zero for BLOCK and BAM */
 105 -               writel_relaxed(0, controller->base + QUP_MX_READ_CNT);
 106 -               writel_relaxed(0, controller->base + QUP_MX_WRITE_CNT);
 107 -       } else {
 108 -               mode = QUP_IO_M_MODE_BAM;
 109 +
 110 +       } else if (spi->master->can_dma &&
 111 +           spi->master->can_dma(spi->master, spi, xfer) &&
 112 +           spi->master->cur_msg_mapped) {
 113 +               controller->mode = QUP_IO_M_MODE_BAM;
 114                 writel_relaxed(0, controller->base + QUP_MX_READ_CNT);
 115                 writel_relaxed(0, controller->base + QUP_MX_WRITE_CNT);
 116
 117 @@ -528,19 +512,26 @@ static int spi_qup_io_config(struct spi_
 118
 119                         writel_relaxed(0, controller->base + QUP_MX_OUTPUT_CNT);
 120                 }
 121 +       } else {
 122 +               controller->mode = QUP_IO_M_MODE_BLOCK;
 123 +               writel_relaxed(n_words, controller->base + QUP_MX_INPUT_CNT);
 124 +               writel_relaxed(n_words, controller->base + QUP_MX_OUTPUT_CNT);
 125 +               /* must be zero for BLOCK and BAM */
 126 +               writel_relaxed(0, controller->base + QUP_MX_READ_CNT);
 127 +               writel_relaxed(0, controller->base + QUP_MX_WRITE_CNT);
 128         }
 129
 130         iomode = readl_relaxed(controller->base + QUP_IO_M_MODES);
 131         /* Set input and output transfer mode */
 132         iomode &= ~(QUP_IO_M_INPUT_MODE_MASK | QUP_IO_M_OUTPUT_MODE_MASK);
 133
 134 -       if (!controller->use_dma)
 135 +       if (!spi_qup_is_dma_xfer(controller->mode))
 136                 iomode &= ~(QUP_IO_M_PACK_EN | QUP_IO_M_UNPACK_EN);
 137         else
 138                 iomode |= QUP_IO_M_PACK_EN | QUP_IO_M_UNPACK_EN;
 139
 140 -       iomode |= (mode << QUP_IO_M_OUTPUT_MODE_MASK_SHIFT);
 141 -       iomode |= (mode << QUP_IO_M_INPUT_MODE_MASK_SHIFT);
 142 +       iomode |= (controller->mode << QUP_IO_M_OUTPUT_MODE_MASK_SHIFT);
 143 +       iomode |= (controller->mode << QUP_IO_M_INPUT_MODE_MASK_SHIFT);
 144
 145         writel_relaxed(iomode, controller->base + QUP_IO_M_MODES);
 146
 147 @@ -581,7 +572,7 @@ static int spi_qup_io_config(struct spi_
 148         config |= xfer->bits_per_word - 1;
 149         config |= QUP_CONFIG_SPI_MODE;
 150
 151 -       if (controller->use_dma) {
 152 +       if (spi_qup_is_dma_xfer(controller->mode)) {
 153                 if (!xfer->tx_buf)
 154                         config |= QUP_CONFIG_NO_OUTPUT;
 155                 if (!xfer->rx_buf)
 156 @@ -599,7 +590,7 @@ static int spi_qup_io_config(struct spi_
 157                  * status change in BAM mode
 158                  */
 159
 160 -               if (mode == QUP_IO_M_MODE_BAM)
 161 +               if (spi_qup_is_dma_xfer(controller->mode))
 162                         mask = QUP_OP_IN_SERVICE_FLAG | QUP_OP_OUT_SERVICE_FLAG;
 163
 164                 writel_relaxed(mask, controller->base + QUP_OPERATIONAL_MASK);
 165 @@ -633,7 +624,7 @@ static int spi_qup_transfer_one(struct s
 166         controller->tx_bytes = 0;
 167         spin_unlock_irqrestore(&controller->lock, flags);
 168
 169 -       if (controller->use_dma)
 170 +       if (spi_qup_is_dma_xfer(controller->mode))
 171                 ret = spi_qup_do_dma(master, xfer);
 172         else
 173                 ret = spi_qup_do_pio(master, xfer);
 174 @@ -657,7 +648,7 @@ exit:
 175                 ret = controller->error;
 176         spin_unlock_irqrestore(&controller->lock, flags);
 177
 178 -       if (ret && controller->use_dma)
 179 +       if (ret && spi_qup_is_dma_xfer(controller->mode))
 180                 spi_qup_dma_terminate(master, xfer);
 181
 182         return ret;
 183 @@ -668,9 +659,7 @@ static bool spi_qup_can_dma(struct spi_m
 184  {
 185         struct spi_qup *qup = spi_master_get_devdata(master);
 186         size_t dma_align = dma_get_cache_alignment();
 187 -       u32 mode;
 188 -
 189 -       qup->use_dma = 0;
 190 +       int n_words;
 191
 192         if (xfer->rx_buf && (xfer->len % qup->in_blk_sz ||
 193             IS_ERR_OR_NULL(master->dma_rx) ||
 194 @@ -682,12 +671,10 @@ static bool spi_qup_can_dma(struct spi_m
 195             !IS_ALIGNED((size_t)xfer->tx_buf, dma_align)))
 196                 return false;
 197
 198 -       mode = spi_qup_get_mode(master, xfer);
 199 -       if (mode == QUP_IO_M_MODE_FIFO)
 200 +       n_words = xfer->len / DIV_ROUND_UP(xfer->bits_per_word, 8);
 201 +       if (n_words <= (qup->in_fifo_sz / sizeof(u32)))
 202                 return false;
 203
 204 -       qup->use_dma = 1;
 205 -
 206         return true;
 207  }
 208