target/linux/ipq806x/patches-4.9/0027-clk-ipq4019-report-accurate-fixed-clock-rates.patch

   1 From 4f0328557a670d481f2609474b56890c28ab4694 Mon Sep 17 00:00:00 2001
   2 From: Matthew McClintock <mmcclint@qca.qualcomm.com>
   3 Date: Thu, 28 Apr 2016 12:55:08 -0500
   4 Subject: [PATCH 27/37] clk: ipq4019: report accurate fixed clock rates
   5
   6 This looks like a copy-and-paste gone wrong, but update all
   7 the fixed clock rates to report the correct values.
   8
   9 Signed-off-by: Matthew McClintock <mmcclint@qca.qualcomm.com>
  10 ---
  11  drivers/clk/qcom/gcc-ipq4019.c |   10 +++++-----
  12  1 file changed, 5 insertions(+), 5 deletions(-)
  13
  14 --- a/drivers/clk/qcom/gcc-ipq4019.c
  15 +++ b/drivers/clk/qcom/gcc-ipq4019.c
  16 @@ -1317,12 +1317,12 @@ static int gcc_ipq4019_probe(struct plat
  17  {
  18         struct device *dev = &pdev->dev;
  19
  20 -       clk_register_fixed_rate(dev, "fepll125", "xo", 0, 200000000);
  21 -       clk_register_fixed_rate(dev, "fepll125dly", "xo", 0, 200000000);
  22 -       clk_register_fixed_rate(dev, "fepllwcss2g", "xo", 0, 200000000);
  23 -       clk_register_fixed_rate(dev, "fepllwcss5g", "xo", 0, 200000000);
  24 +       clk_register_fixed_rate(dev, "fepll125", "xo", 0, 125000000);
  25 +       clk_register_fixed_rate(dev, "fepll125dly", "xo", 0, 125000000);
  26 +       clk_register_fixed_rate(dev, "fepllwcss2g", "xo", 0, 250000000);
  27 +       clk_register_fixed_rate(dev, "fepllwcss5g", "xo", 0, 250000000);
  28         clk_register_fixed_rate(dev, "fepll200", "xo", 0, 200000000);
  29 -       clk_register_fixed_rate(dev, "fepll500", "xo", 0, 200000000);
  30 +       clk_register_fixed_rate(dev, "fepll500", "xo", 0, 500000000);
  31         clk_register_fixed_rate(dev, "ddrpllapss", "xo", 0, 666000000);
  32
  33         return qcom_cc_probe(pdev, &gcc_ipq4019_desc);