target/linux/ipq806x/patches-4.9/863-dts-ipq4019-add-nand-and-qpic-bam-dma-node.patch

   1 From 02bbf3c46e1e38e9ca699143566903683e3a015d Mon Sep 17 00:00:00 2001
   2 From: Ram Chandra Jangir <rjangir@codeaurora.org>
   3 Date: Thu, 20 Apr 2017 10:45:00 +0530
   4 Subject: [PATCH] dts: ipq4019: add nand and qpic bam dma node
   5
   6 This change adds QPIC BAM dma and NAND driver node's in
   7 IPQ4019 device tree, also enable this for AP-DK04.1 based
   8 boards.
   9
  10 Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
  11 ---
  12  arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi | 75 +++++++++++++++++++++++++++
  13  arch/arm/boot/dts/qcom-ipq4019.dtsi           | 38 ++++++++++++++
  14  2 files changed, 113 insertions(+)
  15
  16 --- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi
  17 +++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi
  18 @@ -88,6 +88,86 @@
  19                                         bias-disable;
  20                                 };
  21                         };
  22 +
  23 +                       nand_pins: nand_pins {
  24 +
  25 +                                mux_1 {
  26 +                                        pins = "gpio52", "gpio53", "gpio54",
  27 +                                               "gpio55", "gpio56", "gpio61",
  28 +                                               "gpio62", "gpio63", "gpio69";
  29 +                                        function = "qpic_pad";
  30 +                                        bias-disable;
  31 +                                };
  32 +
  33 +                               mux_2 {
  34 +                                       pins = "gpio67";
  35 +                                       function = "qpic_pad0";
  36 +                                       bias-disable;
  37 +                               };
  38 +
  39 +                               mux_3 {
  40 +                                       pins = "gpio64";
  41 +                                       function = "qpic_pad1";
  42 +                                       bias-disable;
  43 +                               };
  44 +
  45 +                               mux_4 {
  46 +                                       pins = "gpio65";
  47 +                                       function = "qpic_pad2";
  48 +                                       bias-disable;
  49 +                               };
  50 +
  51 +                               mux_5 {
  52 +                                       pins = "gpio66";
  53 +                                       function = "qpic_pad3";
  54 +                                       bias-disable;
  55 +                               };
  56 +
  57 +                               mux_6 {
  58 +                                       pins = "gpio57";
  59 +                                       function = "qpic_pad4";
  60 +                                       bias-disable;
  61 +                               };
  62 +
  63 +                               mux_7 {
  64 +                                       pins = "gpio58";
  65 +                                       function = "qpic_pad5";
  66 +                                       bias-disable;
  67 +                               };
  68 +
  69 +                               mux_8 {
  70 +                                       pins = "gpio59";
  71 +                                       function = "qpic_pad6";
  72 +                                       bias-disable;
  73 +                               };
  74 +
  75 +                               mux_9 {
  76 +                                       pins = "gpio60";
  77 +                                       function = "qpic_pad7";
  78 +                                       bias-disable;
  79 +                               };
  80 +
  81 +                               mux_10 {
  82 +                                       pins = "gpio68";
  83 +                                       function = "qpic_pad8";
  84 +                                       bias-disable;
  85 +                               };
  86 +
  87 +                               pullups {
  88 +                                       pins = "gpio52", "gpio53", "gpio58",
  89 +                                               "gpio59";
  90 +                                       bias-pull-up;
  91 +                               };
  92 +
  93 +                               pulldowns {
  94 +                                       pins = "gpio54", "gpio55", "gpio56",
  95 +                                               "gpio57", "gpio60", "gpio61",
  96 +                                               "gpio62", "gpio63", "gpio64",
  97 +                                               "gpio65", "gpio66", "gpio67",
  98 +                                               "gpio68", "gpio69";
  99 +                                       bias-pull-down;
 100 +                               };
 101 +                       };
 102                 };
 103
 104                 blsp_dma: dma@7884000 {
 105 @@ -159,5 +239,15 @@
 106                 watchdog@b017000 {
 107                         status = "ok";
 108                 };
 109 +
 110 +               qpic_bam: dma@7984000 {
 111 +                       status = "ok";
 112 +               };
 113 +
 114 +               nand: qpic-nand@79b0000 {
 115 +                       pinctrl-0 = <&nand_pins>;
 116 +                       pinctrl-names = "default";
 117 +                       status = "ok";
 118 +               };
 119         };
 120  };
 121 --- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
 122 +++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
 123 @@ -580,5 +580,43 @@
 124                                           "legacy";
 125                         status = "disabled";
 126                 };
 127 +
 128 +               qpic_bam: dma@7984000 {
 129 +                       compatible = "qcom,bam-v1.7.0";
 130 +                       reg = <0x7984000 0x1a000>;
 131 +                       interrupts = <0 101 0>;
 132 +                       clocks = <&gcc GCC_QPIC_AHB_CLK>;
 133 +                       clock-names = "bam_clk";
 134 +                       #dma-cells = <1>;
 135 +                       qcom,ee = <0>;
 136 +                       status = "disabled";
 137 +               };
 138 +
 139 +               nand: qpic-nand@79b0000 {
 140 +                       compatible = "qcom,ebi2-nandc-bam", "qcom,msm-nand";
 141 +                       reg = <0x79b0000 0x1000>;
 142 +                       #address-cells = <1>;
 143 +                       #size-cells = <0>;
 144 +                       clocks = <&gcc GCC_QPIC_CLK>,
 145 +                               <&gcc GCC_QPIC_AHB_CLK>;
 146 +                       clock-names = "core", "aon";
 147 +
 148 +                       dmas = <&qpic_bam 0>,
 149 +                               <&qpic_bam 1>,
 150 +                               <&qpic_bam 2>;
 151 +                       dma-names = "tx", "rx", "cmd";
 152 +                       status = "disabled";
 153 +
 154 +                       nandcs@0 {
 155 +                               compatible = "qcom,nandcs";
 156 +                               reg = <0>;
 157 +                               #address-cells = <1>;
 158 +                               #size-cells = <1>;
 159 +
 160 +                               nand-ecc-strength = <4>;
 161 +                               nand-ecc-step-size = <512>;
 162 +                               nand-bus-width = <8>;
 163 +                       };
 164 +               };
 165         };
 166  };