target/linux/ipq806x/patches-4.9/864-07-dts-ipq4019-ap-dk01.1-c1-add-spi-and-ram-nodes.patch

   1 --- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1-c1.dts
   2 +++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1-c1.dts
   3 @@ -19,4 +19,112 @@
   4  / {
   5         model = "Qualcomm Technologies, Inc. IPQ40xx/AP-DK01.1-C1";
   6
   7 +       memory {
   8 +               device_type = "memory";
   9 +               reg = <0x80000000 0x10000000>;
  10 +       };
  11 +
  12 +       reserved-memory {
  13 +               #address-cells = <0x1>;
  14 +               #size-cells = <0x1>;
  15 +               ranges;
  16 +
  17 +               apps_bl@87000000 {
  18 +                       reg = <0x87000000 0x400000>;
  19 +                       no-map;
  20 +               };
  21 +
  22 +               sbl@87400000 {
  23 +                       reg = <0x87400000 0x100000>;
  24 +                       no-map;
  25 +               };
  26 +
  27 +               cnss_debug@87500000 {
  28 +                       reg = <0x87500000 0x600000>;
  29 +                       no-map;
  30 +               };
  31 +
  32 +               cpu_context_dump@87b00000 {
  33 +                       reg = <0x87b00000 0x080000>;
  34 +                       no-map;
  35 +               };
  36 +
  37 +               tz_apps@87b80000 {
  38 +                       reg = <0x87b80000 0x280000>;
  39 +                       no-map;
  40 +               };
  41 +
  42 +               smem@87e00000 {
  43 +                       reg = <0x87e00000 0x080000>;
  44 +                       no-map;
  45 +               };
  46 +
  47 +               tz@87e80000 {
  48 +                       reg = <0x87e80000 0x180000>;
  49 +                       no-map;
  50 +               };
  51 +       };
  52 +};
  53 +
  54 +&spi_0 {
  55 +       mx25l25635f@0 {
  56 +               compatible = "mx25l25635f", "jedec,spi-nor";
  57 +               #address-cells = <1>;
  58 +               #size-cells = <1>;
  59 +               reg = <0>;
  60 +               spi-max-frequency = <24000000>;
  61 +
  62 +               SBL1@0 {
  63 +                       label = "SBL1";
  64 +                       reg = <0x0 0x40000>;
  65 +                       read-only;
  66 +               };
  67 +               MIBIB@40000 {
  68 +                       label = "MIBIB";
  69 +                       reg = <0x40000 0x20000>;
  70 +                       read-only;
  71 +               };
  72 +               QSEE@60000 {
  73 +                       label = "QSEE";
  74 +                       reg = <0x60000 0x60000>;
  75 +                       read-only;
  76 +               };
  77 +               CDT@c0000 {
  78 +                       label = "CDT";
  79 +                       reg = <0xc0000 0x10000>;
  80 +                       read-only;
  81 +               };
  82 +               DDRPARAMS@d0000 {
  83 +                       label = "DDRPARAMS";
  84 +                       reg = <0xd0000 0x10000>;
  85 +                       read-only;
  86 +               };
  87 +               APPSBLENV@e0000 {
  88 +                       label = "APPSBLENV";
  89 +                       reg = <0xe0000 0x10000>;
  90 +                       read-only;
  91 +               };
  92 +               APPSBL@f0000 {
  93 +                       label = "APPSBL";
  94 +                       reg = <0xf0000 0x80000>;
  95 +                       read-only;
  96 +               };
  97 +               ART@170000 {
  98 +                       label = "ART";
  99 +                       reg = <0x170000 0x10000>;
 100 +                       read-only;
 101 +               };
 102 +               kernel@180000 {
 103 +                       label = "kernel";
 104 +                       reg = <0x180000 0x400000>;
 105 +               };
 106 +               rootfs@580000 {
 107 +                       label = "rootfs";
 108 +                       reg = <0x580000 0x1600000>;
 109 +               };
 110 +               firmware@180000 {
 111 +                       label = "firmware";
 112 +                       reg = <0x180000 0x1a00000>;
 113 +               };
 114 +       };
 115  };