ipq806x: add v4.9 support
[openwrt/openwrt.git] / target / linux / ipq806x / patches-4.9 / 999-dts.patch
1 --- a/arch/arm/boot/dts/Makefile
2 +++ b/arch/arm/boot/dts/Makefile
3 @@ -573,92 +573,61 @@
4 omap4-var-stk-om44.dtb
5 dtb-$(CONFIG_SOC_AM43XX) += \
6 am43x-epos-evm.dtb \
7 - am437x-cm-t43.dtb \
8 - am437x-gp-evm.dtb \
9 + am437x-sk-evm.dtb \
10 am437x-idk-evm.dtb \
11 - am437x-sbc-t43.dtb \
12 - am437x-sk-evm.dtb
13 + am437x-gp-evm.dtb
14 dtb-$(CONFIG_SOC_OMAP5) += \
15 omap5-cm-t54.dtb \
16 omap5-igep0050.dtb \
17 omap5-sbc-t54.dtb \
18 omap5-uevm.dtb
19 dtb-$(CONFIG_SOC_DRA7XX) += \
20 - am57xx-beagle-x15.dtb \
21 - am57xx-beagle-x15-revb1.dtb \
22 - am57xx-cl-som-am57x.dtb \
23 - am57xx-sbc-am57x.dtb \
24 - am572x-idk.dtb \
25 dra7-evm.dtb \
26 - dra72-evm.dtb \
27 - dra72-evm-revc.dtb
28 + am57xx-beagle-x15.dtb \
29 + dra72-evm.dtb
30 dtb-$(CONFIG_ARCH_ORION5X) += \
31 - orion5x-kuroboxpro.dtb \
32 orion5x-lacie-d2-network.dtb \
33 orion5x-lacie-ethernet-disk-mini-v2.dtb \
34 - orion5x-linkstation-lsgl.dtb \
35 orion5x-linkstation-lswtgl.dtb \
36 orion5x-lswsgl.dtb \
37 orion5x-maxtor-shared-storage-2.dtb \
38 - orion5x-netgear-wnr854t.dtb \
39 orion5x-rd88f5182-nas.dtb
40 dtb-$(CONFIG_ARCH_PRIMA2) += \
41 prima2-evb.dtb
42 -dtb-$(CONFIG_ARCH_OXNAS) += \
43 - wd-mbwe.dtb
44 dtb-$(CONFIG_ARCH_QCOM) += \
45 - qcom-apq8060-dragonboard.dtb \
46 - qcom-apq8064-arrow-sd-600eval.dtb \
47 qcom-apq8064-cm-qs600.dtb \
48 qcom-apq8064-ifc6410.dtb \
49 - qcom-apq8064-sony-xperia-yuga.dtb \
50 - qcom-apq8064-asus-nexus7-flo.dtb \
51 qcom-apq8074-dragonboard.dtb \
52 qcom-apq8084-ifc6540.dtb \
53 qcom-apq8084-mtp.dtb \
54 - qcom-ipq4019-ap.dk01.1-c1.dtb \
55 - qcom-ipq4019-ap.dk04.1-c1.dtb \
56 qcom-ipq8064-ap148.dtb \
57 + qcom-ipq8064-c2600.dtb \
58 + qcom-ipq8064-d7800.dtb \
59 + qcom-ipq8064-db149.dtb \
60 + qcom-ipq8064-ea8500.dtb \
61 + qcom-ipq8064-r7500.dtb \
62 + qcom-ipq8064-r7500v2.dtb \
63 + qcom-ipq8065-nbg6817.dtb \
64 + qcom-ipq8065-r7800.dtb \
65 qcom-msm8660-surf.dtb \
66 qcom-msm8960-cdp.dtb \
67 - qcom-msm8974-lge-nexus5-hammerhead.dtb \
68 qcom-msm8974-sony-xperia-honami.dtb
69 dtb-$(CONFIG_ARCH_REALVIEW) += \
70 - arm-realview-pb1176.dtb \
71 - arm-realview-pb11mp.dtb \
72 - arm-realview-eb.dtb \
73 - arm-realview-eb-bbrevd.dtb \
74 - arm-realview-eb-11mp.dtb \
75 - arm-realview-eb-11mp-bbrevd.dtb \
76 - arm-realview-eb-11mp-ctrevb.dtb \
77 - arm-realview-eb-11mp-bbrevd-ctrevb.dtb \
78 - arm-realview-eb-a9mp.dtb \
79 - arm-realview-eb-a9mp-bbrevd.dtb \
80 - arm-realview-pba8.dtb \
81 - arm-realview-pbx-a9.dtb
82 + arm-realview-pb1176.dtb
83 dtb-$(CONFIG_ARCH_ROCKCHIP) += \
84 - rk3036-evb.dtb \
85 - rk3036-kylin.dtb \
86 rk3066a-bqcurie2.dtb \
87 rk3066a-marsboard.dtb \
88 rk3066a-rayeager.dtb \
89 rk3188-radxarock.dtb \
90 - rk3228-evb.dtb \
91 - rk3229-evb.dtb \
92 rk3288-evb-act8846.dtb \
93 rk3288-evb-rk808.dtb \
94 - rk3288-fennec.dtb \
95 rk3288-firefly-beta.dtb \
96 rk3288-firefly.dtb \
97 - rk3288-firefly-reload.dtb \
98 - rk3288-miqi.dtb \
99 rk3288-popmetal.dtb \
100 rk3288-r89.dtb \
101 rk3288-rock2-square.dtb \
102 - rk3288-veyron-brain.dtb \
103 rk3288-veyron-jaq.dtb \
104 rk3288-veyron-jerry.dtb \
105 - rk3288-veyron-mickey.dtb \
106 rk3288-veyron-minnie.dtb \
107 rk3288-veyron-pinky.dtb \
108 rk3288-veyron-speedy.dtb
109 --- a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
110 +++ b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
111 @@ -4,12 +4,9 @@
112 model = "Qualcomm IPQ8064/AP148";
113 compatible = "qcom,ipq8064-ap148", "qcom,ipq8064";
114
115 - aliases {
116 - serial0 = &gsbi4_serial;
117 - };
118 -
119 - chosen {
120 - stdout-path = "serial0:115200n8";
121 + memory@0 {
122 + reg = <0x42000000 0x1e000000>;
123 + device_type = "memory";
124 };
125
126 reserved-memory {
127 @@ -22,6 +19,15 @@
128 };
129 };
130
131 + aliases {
132 + serial0 = &uart4;
133 + mdio-gpio0 = &mdio0;
134 + };
135 +
136 + chosen {
137 + linux,stdout-path = "serial0:115200n8";
138 + };
139 +
140 soc {
141 pinmux@800000 {
142 i2c4_pins: i2c4_pinmux {
143 @@ -60,6 +66,25 @@
144 bias-bus-hold;
145 };
146 };
147 +
148 + mdio0_pins: mdio0_pins {
149 + mux {
150 + pins = "gpio0", "gpio1";
151 + function = "gpio";
152 + drive-strength = <8>;
153 + bias-disable;
154 + };
155 + };
156 +
157 + rgmii2_pins: rgmii2_pins {
158 + mux {
159 + pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32",
160 + "gpio51", "gpio52", "gpio59", "gpio60", "gpio61", "gpio62" ;
161 + function = "rgmii2";
162 + drive-strength = <8>;
163 + bias-disable;
164 + };
165 + };
166 };
167
168 gsbi@16300000 {
169 @@ -69,14 +94,12 @@
170 status = "ok";
171 };
172
173 - i2c4: i2c@16380000 {
174 - status = "ok";
175 -
176 - clock-frequency = <200000>;
177 -
178 - pinctrl-0 = <&i2c4_pins>;
179 - pinctrl-names = "default";
180 - };
181 + /*
182 + * The i2c device on gsbi4 should not be enabled.
183 + * On ipq806x designs gsbi4 i2c is meant for exclusive
184 + * RPM usage. Turning this on in kernel manifests as
185 + * i2c failure for the RPM.
186 + */
187 };
188
189 gsbi5: gsbi@1a200000 {
190 @@ -99,15 +122,7 @@
191 spi-max-frequency = <50000000>;
192 reg = <0>;
193
194 - partition@0 {
195 - label = "rootfs";
196 - reg = <0x0 0x1000000>;
197 - };
198 -
199 - partition@1 {
200 - label = "scratch";
201 - reg = <0x1000000 0x1000000>;
202 - };
203 + linux,part-probe = "qcom-smem";
204 };
205 };
206 };
207 @@ -117,23 +132,105 @@
208 };
209
210 sata@29000000 {
211 - ports-implemented = <0x1>;
212 status = "ok";
213 };
214
215 + phy@100f8800 { /* USB3 port 1 HS phy */
216 + status = "ok";
217 + };
218 +
219 + phy@100f8830 { /* USB3 port 1 SS phy */
220 + status = "ok";
221 + };
222 +
223 + phy@110f8800 { /* USB3 port 0 HS phy */
224 + status = "ok";
225 + };
226 +
227 + phy@110f8830 { /* USB3 port 0 SS phy */
228 + status = "ok";
229 + };
230 +
231 + usb30@0 {
232 + status = "ok";
233 + };
234 +
235 + usb30@1 {
236 + status = "ok";
237 + };
238 +
239 + pcie0: pci@1b500000 {
240 + status = "ok";
241 + phy-tx0-term-offset = <7>;
242 + };
243 +
244 + pcie1: pci@1b700000 {
245 + status = "ok";
246 + phy-tx0-term-offset = <7>;
247 + };
248 +
249 nand@1ac00000 {
250 status = "ok";
251
252 pinctrl-0 = <&nand_pins>;
253 pinctrl-names = "default";
254
255 - nandcs@0 {
256 - compatible = "qcom,nandcs";
257 + nand-ecc-strength = <4>;
258 + nand-bus-width = <8>;
259 +
260 + linux,part-probe = "qcom-smem";
261 + };
262 +
263 + mdio0: mdio {
264 + compatible = "virtual,mdio-gpio";
265 + #address-cells = <1>;
266 + #size-cells = <0>;
267 + gpios = <&qcom_pinmux 1 0 &qcom_pinmux 0 0>;
268 + pinctrl-0 = <&mdio0_pins>;
269 + pinctrl-names = "default";
270 +
271 + phy0: ethernet-phy@0 {
272 + device_type = "ethernet-phy";
273 reg = <0>;
274 + qca,ar8327-initvals = <
275 + 0x00004 0x7600000 /* PAD0_MODE */
276 + 0x00008 0x1000000 /* PAD5_MODE */
277 + 0x0000c 0x80 /* PAD6_MODE */
278 + 0x000e4 0x6a545 /* MAC_POWER_SEL */
279 + 0x000e0 0xc74164de /* SGMII_CTRL */
280 + 0x0007c 0x4e /* PORT0_STATUS */
281 + 0x00094 0x4e /* PORT6_STATUS */
282 + >;
283 + };
284 +
285 + phy4: ethernet-phy@4 {
286 + device_type = "ethernet-phy";
287 + reg = <4>;
288 + };
289 + };
290 +
291 + gmac1: ethernet@37200000 {
292 + status = "ok";
293 + phy-mode = "rgmii";
294 + qcom,id = <1>;
295 +
296 + pinctrl-0 = <&rgmii2_pins>;
297 + pinctrl-names = "default";
298 +
299 + fixed-link {
300 + speed = <1000>;
301 + full-duplex;
302 + };
303 + };
304 +
305 + gmac2: ethernet@37400000 {
306 + status = "ok";
307 + phy-mode = "sgmii";
308 + qcom,id = <2>;
309
310 - nand-ecc-strength = <4>;
311 - nand-ecc-step-size = <512>;
312 - nand-bus-width = <8>;
313 + fixed-link {
314 + speed = <1000>;
315 + full-duplex;
316 };
317 };
318 };
319 --- /dev/null
320 +++ b/arch/arm/boot/dts/qcom-ipq8064-c2600.dts
321 @@ -0,0 +1,501 @@
322 +#include "qcom-ipq8064-v1.0.dtsi"
323 +
324 +#include <dt-bindings/input/input.h>
325 +
326 +/ {
327 + model = "TP-Link Archer C2600";
328 + compatible = "tplink,c2600", "qcom,ipq8064";
329 +
330 + memory@0 {
331 + reg = <0x42000000 0x1e000000>;
332 + device_type = "memory";
333 + };
334 +
335 + reserved-memory {
336 + #address-cells = <1>;
337 + #size-cells = <1>;
338 + ranges;
339 + rsvd@41200000 {
340 + reg = <0x41200000 0x300000>;
341 + no-map;
342 + };
343 + };
344 +
345 + aliases {
346 + serial0 = &uart4;
347 + mdio-gpio0 = &mdio0;
348 +
349 + led-boot = &power;
350 + led-failsafe = &general;
351 + led-running = &power;
352 + led-upgrade = &general;
353 + };
354 +
355 + chosen {
356 + linux,stdout-path = "serial0:115200n8";
357 + };
358 +
359 + soc {
360 + pinmux@800000 {
361 + button_pins: button_pins {
362 + mux {
363 + pins = "gpio16", "gpio54", "gpio65";
364 + function = "gpio";
365 + drive-strength = <2>;
366 + bias-pull-up;
367 + };
368 + };
369 +
370 + i2c4_pins: i2c4_pinmux {
371 + mux {
372 + pins = "gpio12", "gpio13";
373 + function = "gsbi4";
374 + drive-strength = <12>;
375 + bias-disable;
376 + };
377 + };
378 +
379 + led_pins: led_pins {
380 + mux {
381 + pins = "gpio6", "gpio7", "gpio8", "gpio9", "gpio26", "gpio33",
382 + "gpio53", "gpio66";
383 + function = "gpio";
384 + drive-strength = <2>;
385 + bias-pull-up;
386 + };
387 + };
388 +
389 + spi_pins: spi_pins {
390 + mux {
391 + pins = "gpio18", "gpio19", "gpio21";
392 + function = "gsbi5";
393 + bias-pull-down;
394 + };
395 +
396 + data {
397 + pins = "gpio18", "gpio19";
398 + drive-strength = <10>;
399 + };
400 +
401 + cs {
402 + pins = "gpio20";
403 + function = "gpio";
404 + drive-strength = <10>;
405 + bias-pull-up;
406 + };
407 +
408 + clk {
409 + pins = "gpio21";
410 + drive-strength = <12>;
411 + };
412 + };
413 +
414 + mdio0_pins: mdio0_pins {
415 + mux {
416 + pins = "gpio0", "gpio1";
417 + function = "gpio";
418 + drive-strength = <8>;
419 + bias-disable;
420 + };
421 + };
422 +
423 + rgmii2_pins: rgmii2_pins {
424 + mux {
425 + pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32",
426 + "gpio51", "gpio52", "gpio59", "gpio60", "gpio61", "gpio62" ;
427 + function = "rgmii2";
428 + drive-strength = <8>;
429 + bias-disable;
430 + };
431 + };
432 +
433 + usb0_pwr_en_pin: usb0_pwr_en_pin {
434 + mux {
435 + pins = "gpio25";
436 + function = "gpio";
437 + drive-strength = <10>;
438 + bias-pull-up;
439 + output-high;
440 + };
441 + };
442 +
443 + usb1_pwr_en_pin: usb1_pwr_en_pin {
444 + mux {
445 + pins = "gpio23";
446 + function = "gpio";
447 + drive-strength = <10>;
448 + bias-pull-up;
449 + output-high;
450 + };
451 + };
452 + };
453 +
454 + gsbi@16300000 {
455 + qcom,mode = <GSBI_PROT_I2C_UART>;
456 + status = "ok";
457 + serial@16340000 {
458 + status = "ok";
459 + };
460 + /*
461 + * The i2c device on gsbi4 should not be enabled.
462 + * On ipq806x designs gsbi4 i2c is meant for exclusive
463 + * RPM usage. Turning this on in kernel manifests as
464 + * i2c failure for the RPM.
465 + */
466 + };
467 +
468 + gsbi5: gsbi@1a200000 {
469 + qcom,mode = <GSBI_PROT_SPI>;
470 + status = "ok";
471 +
472 + spi5: spi@1a280000 {
473 + status = "ok";
474 +
475 + pinctrl-0 = <&spi_pins>;
476 + pinctrl-names = "default";
477 +
478 + cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
479 +
480 + flash: m25p80@0 {
481 + compatible = "jedec,spi-nor";
482 + #address-cells = <1>;
483 + #size-cells = <1>;
484 + spi-max-frequency = <50000000>;
485 + reg = <0>;
486 +
487 + SBL1@0 {
488 + label = "SBL1";
489 + reg = <0x0 0x20000>;
490 + read-only;
491 + };
492 +
493 + MIBIB@20000 {
494 + label = "MIBIB";
495 + reg = <0x20000 0x20000>;
496 + read-only;
497 + };
498 +
499 + SBL2@40000 {
500 + label = "SBL2";
501 + reg = <0x40000 0x20000>;
502 + read-only;
503 + };
504 +
505 + SBL3@60000 {
506 + label = "SBL3";
507 + reg = <0x60000 0x30000>;
508 + read-only;
509 + };
510 +
511 + DDRCONFIG@90000 {
512 + label = "DDRCONFIG";
513 + reg = <0x90000 0x10000>;
514 + read-only;
515 + };
516 +
517 + SSD@a0000 {
518 + label = "SSD";
519 + reg = <0xa0000 0x10000>;
520 + read-only;
521 + };
522 +
523 + TZ@b0000 {
524 + label = "TZ";
525 + reg = <0xb0000 0x30000>;
526 + read-only;
527 + };
528 +
529 + RPM@e0000 {
530 + label = "RPM";
531 + reg = <0xe0000 0x20000>;
532 + read-only;
533 + };
534 +
535 + fs-uboot@100000 {
536 + label = "fs-uboot";
537 + reg = <0x100000 0x70000>;
538 + read-only;
539 + };
540 +
541 + uboot-env@170000 {
542 + label = "uboot-env";
543 + reg = <0x170000 0x40000>;
544 + read-only;
545 + };
546 +
547 + radio@1b0000 {
548 + label = "radio";
549 + reg = <0x1b0000 0x40000>;
550 + read-only;
551 + };
552 +
553 + os-image@1f0000 {
554 + label = "os-image";
555 + reg = <0x1f0000 0x200000>;
556 + };
557 +
558 + rootfs@3f0000 {
559 + label = "rootfs";
560 + reg = <0x3f0000 0x1b00000>;
561 + };
562 +
563 + defaultmac: default-mac@1ef0000 {
564 + label = "default-mac";
565 + reg = <0x1ef0000 0x00200>;
566 + read-only;
567 + };
568 +
569 + pin@1ef0200 {
570 + label = "pin";
571 + reg = <0x1ef0200 0x00200>;
572 + read-only;
573 + };
574 +
575 + product-info@1ef0400 {
576 + label = "product-info";
577 + reg = <0x1ef0400 0x0fc00>;
578 + read-only;
579 + };
580 +
581 + partition-table@1f00000 {
582 + label = "partition-table";
583 + reg = <0x1f00000 0x10000>;
584 + read-only;
585 + };
586 +
587 + soft-version@1f10000 {
588 + label = "soft-version";
589 + reg = <0x1f10000 0x10000>;
590 + read-only;
591 + };
592 +
593 + support-list@1f20000 {
594 + label = "support-list";
595 + reg = <0x1f20000 0x10000>;
596 + read-only;
597 + };
598 +
599 + profile@1f30000 {
600 + label = "profile";
601 + reg = <0x1f30000 0x10000>;
602 + read-only;
603 + };
604 +
605 + default-config@1f40000 {
606 + label = "default-config";
607 + reg = <0x1f40000 0x10000>;
608 + read-only;
609 + };
610 +
611 + user-config@1f50000 {
612 + label = "user-config";
613 + reg = <0x1f50000 0x40000>;
614 + read-only;
615 + };
616 +
617 + qos-db@1f90000 {
618 + label = "qos-db";
619 + reg = <0x1f90000 0x40000>;
620 + read-only;
621 + };
622 +
623 + usb-config@1fd0000 {
624 + label = "usb-config";
625 + reg = <0x1fd0000 0x10000>;
626 + read-only;
627 + };
628 +
629 + log@1fe0000 {
630 + label = "log";
631 + reg = <0x1fe0000 0x20000>;
632 + read-only;
633 + };
634 + };
635 + };
636 + };
637 +
638 + phy@100f8800 { /* USB3 port 1 HS phy */
639 + status = "ok";
640 + };
641 +
642 + phy@100f8830 { /* USB3 port 1 SS phy */
643 + status = "ok";
644 + };
645 +
646 + phy@110f8800 { /* USB3 port 0 HS phy */
647 + status = "ok";
648 + };
649 +
650 + phy@110f8830 { /* USB3 port 0 SS phy */
651 + status = "ok";
652 + };
653 +
654 + usb30@0 {
655 + status = "ok";
656 +
657 + pinctrl-0 = <&usb0_pwr_en_pin>;
658 + pinctrl-names = "default";
659 + };
660 +
661 + usb30@1 {
662 + status = "ok";
663 +
664 + pinctrl-0 = <&usb1_pwr_en_pin>;
665 + pinctrl-names = "default";
666 + };
667 +
668 + pcie0: pci@1b500000 {
669 + status = "ok";
670 + phy-tx0-term-offset = <7>;
671 + };
672 +
673 + pcie1: pci@1b700000 {
674 + status = "ok";
675 + phy-tx0-term-offset = <7>;
676 + };
677 +
678 + mdio0: mdio {
679 + compatible = "virtual,mdio-gpio";
680 + #address-cells = <1>;
681 + #size-cells = <0>;
682 + gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH &qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
683 + pinctrl-0 = <&mdio0_pins>;
684 + pinctrl-names = "default";
685 +
686 + phy0: ethernet-phy@0 {
687 + device_type = "ethernet-phy";
688 + reg = <0>;
689 + qca,ar8327-initvals = <
690 + 0x00004 0x7600000 /* PAD0_MODE */
691 + 0x00008 0x1000000 /* PAD5_MODE */
692 + 0x0000c 0x80 /* PAD6_MODE */
693 + 0x000e4 0x6a545 /* MAC_POWER_SEL */
694 + 0x000e0 0xc74164de /* SGMII_CTRL */
695 + 0x0007c 0x4e /* PORT0_STATUS */
696 + 0x00094 0x4e /* PORT6_STATUS */
697 + >;
698 + };
699 +
700 + phy4: ethernet-phy@4 {
701 + device_type = "ethernet-phy";
702 + reg = <4>;
703 + };
704 + };
705 +
706 + gmac1: ethernet@37200000 {
707 + status = "ok";
708 + phy-mode = "rgmii";
709 + qcom,id = <1>;
710 +
711 + pinctrl-0 = <&rgmii2_pins>;
712 + pinctrl-names = "default";
713 +
714 + mtd-mac-address = <&defaultmac 0x8>;
715 + mtd-mac-address-increment = <1>;
716 +
717 + fixed-link {
718 + speed = <1000>;
719 + full-duplex;
720 + };
721 + };
722 +
723 + gmac2: ethernet@37400000 {
724 + status = "ok";
725 + phy-mode = "sgmii";
726 + qcom,id = <2>;
727 +
728 + mtd-mac-address = <&defaultmac 0x8>;
729 +
730 + fixed-link {
731 + speed = <1000>;
732 + full-duplex;
733 + };
734 + };
735 +
736 + rpm@108000 {
737 + pinctrl-0 = <&i2c4_pins>;
738 + pinctrl-names = "default";
739 + };
740 + };
741 +
742 + gpio-keys {
743 + compatible = "gpio-keys";
744 + pinctrl-0 = <&button_pins>;
745 + pinctrl-names = "default";
746 +
747 + wifi {
748 + label = "wifi";
749 + gpios = <&qcom_pinmux 49 GPIO_ACTIVE_LOW>;
750 + linux,code = <KEY_RFKILL>;
751 + };
752 +
753 + reset {
754 + label = "reset";
755 + gpios = <&qcom_pinmux 64 GPIO_ACTIVE_LOW>;
756 + linux,code = <KEY_RESTART>;
757 + };
758 +
759 + wps {
760 + label = "wps";
761 + gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
762 + linux,code = <KEY_WPS_BUTTON>;
763 + };
764 +
765 + ledswitch {
766 + label = "ledswitch";
767 + gpios = <&qcom_pinmux 16 GPIO_ACTIVE_LOW>;
768 + linux,code = <KEY_LIGHTS_TOGGLE>;
769 + };
770 + };
771 +
772 + gpio-leds {
773 + compatible = "gpio-leds";
774 + pinctrl-0 = <&led_pins>;
775 + pinctrl-names = "default";
776 +
777 + lan {
778 + label = "c2600:white:lan";
779 + gpios = <&qcom_pinmux 6 GPIO_ACTIVE_HIGH>;
780 + };
781 +
782 + usb4 {
783 + label = "c2600:white:usb_4";
784 + gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
785 + };
786 +
787 + usb2 {
788 + label = "c2600:white:usb_2";
789 + gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
790 + };
791 +
792 + wps {
793 + label = "c2600:white:wps";
794 + gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
795 + };
796 +
797 + wan_amber {
798 + label = "c2600:amber:wan";
799 + gpios = <&qcom_pinmux 26 GPIO_ACTIVE_LOW>;
800 + };
801 +
802 + wan_white {
803 + label = "c2600:white:wan";
804 + gpios = <&qcom_pinmux 33 GPIO_ACTIVE_LOW>;
805 + };
806 +
807 + power: power {
808 + label = "c2600:white:power";
809 + gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
810 + default-state = "keep";
811 + };
812 +
813 + general: general {
814 + label = "c2600:white:general";
815 + gpios = <&qcom_pinmux 66 GPIO_ACTIVE_HIGH>;
816 + };
817 + };
818 +};
819 +
820 +&adm_dma {
821 + status = "ok";
822 +};
823 --- /dev/null
824 +++ b/arch/arm/boot/dts/qcom-ipq8064-d7800.dts
825 @@ -0,0 +1,406 @@
826 +#include "qcom-ipq8064-v1.0.dtsi"
827 +
828 +#include <dt-bindings/input/input.h>
829 +
830 +/ {
831 + model = "Netgear Nighthawk X4 D7800";
832 + compatible = "netgear,d7800", "qcom,ipq8064";
833 +
834 + memory@0 {
835 + reg = <0x42000000 0xe000000>;
836 + device_type = "memory";
837 + };
838 +
839 + reserved-memory {
840 + #address-cells = <1>;
841 + #size-cells = <1>;
842 + ranges;
843 + rsvd@41200000 {
844 + reg = <0x41200000 0x300000>;
845 + no-map;
846 + };
847 + };
848 +
849 + aliases {
850 + serial0 = &uart4;
851 + mdio-gpio0 = &mdio0;
852 +
853 + led-boot = &power_white;
854 + led-failsafe = &power_amber;
855 + led-running = &power_white;
856 + led-upgrade = &power_amber;
857 + };
858 +
859 + chosen {
860 + bootargs = "rootfstype=squashfs noinitrd";
861 + linux,stdout-path = "serial0:115200n8";
862 + };
863 +
864 + soc {
865 + pinmux@800000 {
866 + button_pins: button_pins {
867 + mux {
868 + pins = "gpio6", "gpio54", "gpio65";
869 + function = "gpio";
870 + drive-strength = <2>;
871 + bias-pull-up;
872 + };
873 + };
874 +
875 + i2c4_pins: i2c4_pinmux {
876 + mux {
877 + pins = "gpio12", "gpio13";
878 + function = "gsbi4";
879 + drive-strength = <12>;
880 + bias-disable;
881 + };
882 + };
883 +
884 + led_pins: led_pins {
885 + mux {
886 + pins = "gpio7", "gpio8", "gpio9", "gpio22", "gpio23",
887 + "gpio24","gpio26", "gpio53", "gpio64";
888 + function = "gpio";
889 + drive-strength = <2>;
890 + bias-pull-up;
891 + };
892 + };
893 +
894 + mdio0_pins: mdio0_pins {
895 + mux {
896 + pins = "gpio0", "gpio1";
897 + function = "gpio";
898 + drive-strength = <8>;
899 + bias-disable;
900 + };
901 + };
902 +
903 + nand_pins: nand_pins {
904 + mux {
905 + pins = "gpio34", "gpio35", "gpio36",
906 + "gpio37", "gpio38", "gpio39",
907 + "gpio40", "gpio41", "gpio42",
908 + "gpio43", "gpio44", "gpio45",
909 + "gpio46", "gpio47";
910 + function = "nand";
911 + drive-strength = <10>;
912 + bias-disable;
913 + };
914 + pullups {
915 + pins = "gpio39";
916 + bias-pull-up;
917 + };
918 + hold {
919 + pins = "gpio40", "gpio41", "gpio42",
920 + "gpio43", "gpio44", "gpio45",
921 + "gpio46", "gpio47";
922 + bias-bus-hold;
923 + };
924 + };
925 +
926 + rgmii2_pins: rgmii2_pins {
927 + mux {
928 + pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32",
929 + "gpio51", "gpio52", "gpio59", "gpio60", "gpio61", "gpio62" ;
930 + function = "rgmii2";
931 + drive-strength = <8>;
932 + bias-disable;
933 + };
934 + };
935 +
936 + usb0_pwr_en_pins: usb0_pwr_en_pins {
937 + mux {
938 + pins = "gpio15";
939 + function = "gpio";
940 + drive-strength = <12>;
941 + bias-pull-down;
942 + output-high;
943 + };
944 + };
945 +
946 + usb1_pwr_en_pins: usb1_pwr_en_pins {
947 + mux {
948 + pins = "gpio16", "gpio68";
949 + function = "gpio";
950 + drive-strength = <12>;
951 + bias-pull-down;
952 + output-high;
953 + };
954 + };
955 + };
956 +
957 + gsbi@16300000 {
958 + qcom,mode = <GSBI_PROT_I2C_UART>;
959 + status = "ok";
960 + serial@16340000 {
961 + status = "ok";
962 + };
963 + /*
964 + * The i2c device on gsbi4 should not be enabled.
965 + * On ipq806x designs gsbi4 i2c is meant for exclusive
966 + * RPM usage. Turning this on in kernel manifests as
967 + * i2c failure for the RPM.
968 + */
969 + };
970 +
971 + sata-phy@1b400000 {
972 + status = "ok";
973 + };
974 +
975 + sata@29000000 {
976 + status = "ok";
977 + };
978 +
979 + phy@100f8800 { /* USB3 port 1 HS phy */
980 + status = "ok";
981 + };
982 +
983 + phy@100f8830 { /* USB3 port 1 SS phy */
984 + status = "ok";
985 + };
986 +
987 + phy@110f8800 { /* USB3 port 0 HS phy */
988 + status = "ok";
989 + };
990 +
991 + phy@110f8830 { /* USB3 port 0 SS phy */
992 + status = "ok";
993 + };
994 +
995 + usb30@0 {
996 + status = "ok";
997 +
998 + pinctrl-0 = <&usb0_pwr_en_pins>;
999 + pinctrl-names = "default";
1000 + };
1001 +
1002 + usb30@1 {
1003 + status = "ok";
1004 +
1005 + pinctrl-0 = <&usb1_pwr_en_pins>;
1006 + pinctrl-names = "default";
1007 + };
1008 +
1009 + pcie0: pci@1b500000 {
1010 + status = "ok";
1011 + reset-gpio = <&qcom_pinmux 3 GPIO_ACTIVE_HIGH>;
1012 + pinctrl-0 = <&pcie0_pins>;
1013 + pinctrl-names = "default";
1014 + };
1015 +
1016 + pcie1: pci@1b700000 {
1017 + status = "ok";
1018 + reset-gpio = <&qcom_pinmux 48 GPIO_ACTIVE_HIGH>;
1019 + pinctrl-0 = <&pcie1_pins>;
1020 + pinctrl-names = "default";
1021 + };
1022 +
1023 + nand@1ac00000 {
1024 + status = "ok";
1025 +
1026 + pinctrl-0 = <&nand_pins>;
1027 + pinctrl-names = "default";
1028 +
1029 + nand-ecc-strength = <4>;
1030 + nand-bus-width = <8>;
1031 +
1032 + #address-cells = <1>;
1033 + #size-cells = <1>;
1034 +
1035 + qcadata@0 {
1036 + label = "qcadata";
1037 + reg = <0x0000000 0x0c80000>;
1038 + read-only;
1039 + };
1040 +
1041 + APPSBL@c80000 {
1042 + label = "APPSBL";
1043 + reg = <0x0c80000 0x0500000>;
1044 + read-only;
1045 + };
1046 +
1047 + APPSBLENV@1180000 {
1048 + label = "APPSBLENV";
1049 + reg = <0x1180000 0x0080000>;
1050 + read-only;
1051 + };
1052 +
1053 + art: art@1200000 {
1054 + label = "art";
1055 + reg = <0x1200000 0x0140000>;
1056 + read-only;
1057 + };
1058 +
1059 + artbak: art@1340000 {
1060 + label = "artbak";
1061 + reg = <0x1340000 0x0140000>;
1062 + read-only;
1063 + };
1064 +
1065 + kernel@1480000 {
1066 + label = "kernel";
1067 + reg = <0x1480000 0x0200000>;
1068 + };
1069 +
1070 + ubi@1680000 {
1071 + label = "ubi";
1072 + reg = <0x1680000 0x1E00000>;
1073 + };
1074 +
1075 + netgear@3480000 {
1076 + label = "netgear";
1077 + reg = <0x3480000 0x4480000>;
1078 + read-only;
1079 + };
1080 +
1081 + reserve@7900000 {
1082 + label = "reserve";
1083 + reg = <0x7900000 0x0700000>;
1084 + read-only;
1085 + };
1086 +
1087 + firmware@1480000 {
1088 + label = "firmware";
1089 + reg = <0x1480000 0x2000000>;
1090 + };
1091 + };
1092 +
1093 + mdio0: mdio {
1094 + compatible = "virtual,mdio-gpio";
1095 + #address-cells = <1>;
1096 + #size-cells = <0>;
1097 + gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH &qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
1098 + pinctrl-0 = <&mdio0_pins>;
1099 + pinctrl-names = "default";
1100 +
1101 + phy0: ethernet-phy@0 {
1102 + device_type = "ethernet-phy";
1103 + reg = <0>;
1104 + qca,ar8327-initvals = <
1105 + 0x00004 0x7600000 /* PAD0_MODE */
1106 + 0x00008 0x1000000 /* PAD5_MODE */
1107 + 0x0000c 0x80 /* PAD6_MODE */
1108 + 0x000e4 0x6a545 /* MAC_POWER_SEL */
1109 + 0x000e0 0xc74164de /* SGMII_CTRL */
1110 + 0x0007c 0x4e /* PORT0_STATUS */
1111 + 0x00094 0x4e /* PORT6_STATUS */
1112 + >;
1113 + };
1114 +
1115 + phy4: ethernet-phy@4 {
1116 + device_type = "ethernet-phy";
1117 + reg = <4>;
1118 + };
1119 + };
1120 +
1121 + gmac1: ethernet@37200000 {
1122 + status = "ok";
1123 + phy-mode = "rgmii";
1124 + phy-handle = <&phy4>;
1125 + qcom,id = <1>;
1126 +
1127 + pinctrl-0 = <&rgmii2_pins>;
1128 + pinctrl-names = "default";
1129 +
1130 + mtd-mac-address = <&art 6>;
1131 + };
1132 +
1133 + gmac2: ethernet@37400000 {
1134 + status = "ok";
1135 + phy-mode = "sgmii";
1136 + qcom,id = <2>;
1137 +
1138 + mtd-mac-address = <&art 0>;
1139 +
1140 + fixed-link {
1141 + speed = <1000>;
1142 + full-duplex;
1143 + };
1144 + };
1145 +
1146 + rpm@108000 {
1147 + pinctrl-0 = <&i2c4_pins>;
1148 + pinctrl-names = "default";
1149 + };
1150 + };
1151 +
1152 + gpio-keys {
1153 + compatible = "gpio-keys";
1154 + pinctrl-0 = <&button_pins>;
1155 + pinctrl-names = "default";
1156 +
1157 + wifi {
1158 + label = "wifi";
1159 + gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
1160 + linux,code = <KEY_RFKILL>;
1161 + };
1162 +
1163 + reset {
1164 + label = "reset";
1165 + gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
1166 + linux,code = <KEY_RESTART>;
1167 + };
1168 +
1169 + wps {
1170 + label = "wps";
1171 + gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
1172 + linux,code = <KEY_WPS_BUTTON>;
1173 + };
1174 + };
1175 +
1176 + gpio-leds {
1177 + compatible = "gpio-leds";
1178 + pinctrl-0 = <&led_pins>;
1179 + pinctrl-names = "default";
1180 +
1181 + usb1 {
1182 + label = "d7800:white:usb1";
1183 + gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
1184 + };
1185 +
1186 + usb2 {
1187 + label = "d7800:white:usb2";
1188 + gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
1189 + };
1190 +
1191 + power_amber: power_amber {
1192 + label = "d7800:amber:power";
1193 + gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
1194 + };
1195 +
1196 + wan_white {
1197 + label = "d7800:white:wan";
1198 + gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>;
1199 + };
1200 +
1201 + wan_amber {
1202 + label = "d7800:amber:wan";
1203 + gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>;
1204 + };
1205 +
1206 + wps {
1207 + label = "d7800:white:wps";
1208 + gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>;
1209 + };
1210 +
1211 + esata {
1212 + label = "d7800:white:esata";
1213 + gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>;
1214 + };
1215 +
1216 + power_white: power_white {
1217 + label = "d7800:white:power";
1218 + gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
1219 + default-state = "keep";
1220 + };
1221 +
1222 + wifi {
1223 + label = "d7800:white:wifi";
1224 + gpios = <&qcom_pinmux 64 GPIO_ACTIVE_HIGH>;
1225 + };
1226 + };
1227 +};
1228 +
1229 +&adm_dma {
1230 + status = "ok";
1231 +};
1232 --- /dev/null
1233 +++ b/arch/arm/boot/dts/qcom-ipq8064-db149.dts
1234 @@ -0,0 +1,236 @@
1235 +#include "qcom-ipq8064-v1.0.dtsi"
1236 +
1237 +/ {
1238 + model = "Qualcomm IPQ8064/DB149";
1239 + compatible = "qcom,ipq8064-db149", "qcom,ipq8064";
1240 +
1241 + reserved-memory {
1242 + #address-cells = <1>;
1243 + #size-cells = <1>;
1244 + ranges;
1245 + rsvd@41200000 {
1246 + reg = <0x41200000 0x300000>;
1247 + no-map;
1248 + };
1249 + };
1250 +
1251 + alias {
1252 + serial0 = &uart2;
1253 + mdio-gpio0 = &mdio0;
1254 + };
1255 +
1256 + chosen {
1257 + linux,stdout-path = "serial0:115200n8";
1258 + };
1259 +
1260 + soc {
1261 + pinmux@800000 {
1262 + i2c4_pins: i2c4_pinmux {
1263 + pins = "gpio12", "gpio13";
1264 + function = "gsbi4";
1265 + bias-disable;
1266 + };
1267 +
1268 + spi_pins: spi_pins {
1269 + mux {
1270 + pins = "gpio18", "gpio19", "gpio21";
1271 + function = "gsbi5";
1272 + drive-strength = <10>;
1273 + bias-none;
1274 + };
1275 + };
1276 +
1277 + mdio0_pins: mdio0_pins {
1278 + mux {
1279 + pins = "gpio0", "gpio1";
1280 + function = "gpio";
1281 + drive-strength = <8>;
1282 + bias-disable;
1283 + };
1284 + };
1285 +
1286 + rgmii0_pins: rgmii0_pins {
1287 + mux {
1288 + pins = "gpio2", "gpio66";
1289 + drive-strength = <8>;
1290 + bias-disable;
1291 + };
1292 + };
1293 + };
1294 +
1295 + gsbi2: gsbi@12480000 {
1296 + qcom,mode = <GSBI_PROT_I2C_UART>;
1297 + status = "ok";
1298 + uart2: serial@12490000 {
1299 + status = "ok";
1300 + };
1301 + };
1302 +
1303 + gsbi5: gsbi@1a200000 {
1304 + qcom,mode = <GSBI_PROT_SPI>;
1305 + status = "ok";
1306 +
1307 + spi4: spi@1a280000 {
1308 + status = "ok";
1309 + spi-max-frequency = <50000000>;
1310 +
1311 + pinctrl-0 = <&spi_pins>;
1312 + pinctrl-names = "default";
1313 +
1314 + cs-gpios = <&qcom_pinmux 20 0>;
1315 +
1316 + flash: m25p80@0 {
1317 + compatible = "s25fl256s1";
1318 + #address-cells = <1>;
1319 + #size-cells = <1>;
1320 + spi-max-frequency = <50000000>;
1321 + reg = <0>;
1322 + m25p,fast-read;
1323 +
1324 + partition@0 {
1325 + label = "lowlevel_init";
1326 + reg = <0x0 0x1b0000>;
1327 + };
1328 +
1329 + partition@1 {
1330 + label = "u-boot";
1331 + reg = <0x1b0000 0x80000>;
1332 + };
1333 +
1334 + partition@2 {
1335 + label = "u-boot-env";
1336 + reg = <0x230000 0x40000>;
1337 + };
1338 +
1339 + partition@3 {
1340 + label = "caldata";
1341 + reg = <0x270000 0x40000>;
1342 + };
1343 +
1344 + partition@4 {
1345 + label = "firmware";
1346 + reg = <0x2b0000 0x1d50000>;
1347 + };
1348 + };
1349 + };
1350 + };
1351 +
1352 + sata-phy@1b400000 {
1353 + status = "ok";
1354 + };
1355 +
1356 + sata@29000000 {
1357 + status = "ok";
1358 + };
1359 +
1360 + phy@100f8800 { /* USB3 port 1 HS phy */
1361 + status = "ok";
1362 + };
1363 +
1364 + phy@100f8830 { /* USB3 port 1 SS phy */
1365 + status = "ok";
1366 + };
1367 +
1368 + phy@110f8800 { /* USB3 port 0 HS phy */
1369 + status = "ok";
1370 + };
1371 +
1372 + phy@110f8830 { /* USB3 port 0 SS phy */
1373 + status = "ok";
1374 + };
1375 +
1376 + usb30@0 {
1377 + status = "ok";
1378 + };
1379 +
1380 + usb30@1 {
1381 + status = "ok";
1382 + };
1383 +
1384 + pcie0: pci@1b500000 {
1385 + status = "ok";
1386 + };
1387 +
1388 + pcie1: pci@1b700000 {
1389 + status = "ok";
1390 + };
1391 +
1392 + pcie2: pci@1b900000 {
1393 + status = "ok";
1394 + };
1395 +
1396 + mdio0: mdio {
1397 + compatible = "virtual,mdio-gpio";
1398 + #address-cells = <1>;
1399 + #size-cells = <0>;
1400 + gpios = <&qcom_pinmux 1 0 &qcom_pinmux 0 0>;
1401 +
1402 + pinctrl-0 = <&mdio0_pins>;
1403 + pinctrl-names = "default";
1404 +
1405 + phy0: ethernet-phy@0 {
1406 + device_type = "ethernet-phy";
1407 + reg = <0>;
1408 + qca,ar8327-initvals = <
1409 + 0x00004 0x7600000 /* PAD0_MODE */
1410 + 0x00008 0x1000000 /* PAD5_MODE */
1411 + 0x0000c 0x80 /* PAD6_MODE */
1412 + 0x000e4 0x6a545 /* MAC_POWER_SEL */
1413 + 0x000e0 0xc74164de /* SGMII_CTRL */
1414 + 0x0007c 0x4e /* PORT0_STATUS */
1415 + 0x00094 0x4e /* PORT6_STATUS */
1416 + >;
1417 + };
1418 +
1419 + phy4: ethernet-phy@4 {
1420 + device_type = "ethernet-phy";
1421 + reg = <4>;
1422 + };
1423 +
1424 + phy6: ethernet-phy@6 {
1425 + device_type = "ethernet-phy";
1426 + reg = <6>;
1427 + };
1428 +
1429 + phy7: ethernet-phy@7 {
1430 + device_type = "ethernet-phy";
1431 + reg = <7>;
1432 + };
1433 + };
1434 +
1435 + gmac0: ethernet@37000000 {
1436 + status = "ok";
1437 + phy-mode = "rgmii";
1438 + qcom,id = <0>;
1439 + phy-handle = <&phy4>;
1440 +
1441 + pinctrl-0 = <&rgmii0_pins>;
1442 + pinctrl-names = "default";
1443 + };
1444 +
1445 + gmac1: ethernet@37200000 {
1446 + status = "ok";
1447 + phy-mode = "sgmii";
1448 + qcom,id = <1>;
1449 +
1450 + fixed-link {
1451 + speed = <1000>;
1452 + full-duplex;
1453 + };
1454 + };
1455 +
1456 + gmac2: ethernet@37400000 {
1457 + status = "ok";
1458 + phy-mode = "sgmii";
1459 + qcom,id = <2>;
1460 + phy-handle = <&phy6>;
1461 + };
1462 +
1463 + gmac3: ethernet@37600000 {
1464 + status = "ok";
1465 + phy-mode = "sgmii";
1466 + qcom,id = <3>;
1467 + phy-handle = <&phy7>;
1468 + };
1469 + };
1470 +};
1471 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
1472 +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
1473 @@ -1,11 +1,13 @@
1474 /dts-v1/;
1475
1476 #include "skeleton.dtsi"
1477 -#include <dt-bindings/reset/qcom,gcc-ipq806x.h>
1478 #include <dt-bindings/clock/qcom,gcc-ipq806x.h>
1479 +#include <dt-bindings/mfd/qcom-rpm.h>
1480 #include <dt-bindings/clock/qcom,lcc-ipq806x.h>
1481 #include <dt-bindings/soc/qcom,gsbi.h>
1482 +#include <dt-bindings/reset/qcom,gcc-ipq806x.h>
1483 #include <dt-bindings/interrupt-controller/arm-gic.h>
1484 +#include <dt-bindings/gpio/gpio.h>
1485
1486 / {
1487 model = "Qualcomm IPQ8064";
1488 @@ -16,7 +18,7 @@
1489 #address-cells = <1>;
1490 #size-cells = <0>;
1491
1492 - cpu@0 {
1493 + cpu0: cpu@0 {
1494 compatible = "qcom,krait";
1495 enable-method = "qcom,kpss-acc-v1";
1496 device_type = "cpu";
1497 @@ -24,9 +26,18 @@
1498 next-level-cache = <&L2>;
1499 qcom,acc = <&acc0>;
1500 qcom,saw = <&saw0>;
1501 + clocks = <&kraitcc 0>, <&kraitcc 4>;
1502 + clock-names = "cpu", "l2";
1503 + clock-latency = <100000>;
1504 + cpu-supply = <&smb208_s2a>;
1505 + voltage-tolerance = <5>;
1506 + cooling-min-state = <0>;
1507 + cooling-max-state = <10>;
1508 + #cooling-cells = <2>;
1509 + cpu-idle-states = <&CPU_SPC>;
1510 };
1511
1512 - cpu@1 {
1513 + cpu1: cpu@1 {
1514 compatible = "qcom,krait";
1515 enable-method = "qcom,kpss-acc-v1";
1516 device_type = "cpu";
1517 @@ -34,11 +45,120 @@
1518 next-level-cache = <&L2>;
1519 qcom,acc = <&acc1>;
1520 qcom,saw = <&saw1>;
1521 + clocks = <&kraitcc 1>, <&kraitcc 4>;
1522 + clock-names = "cpu", "l2";
1523 + clock-latency = <100000>;
1524 + cpu-supply = <&smb208_s2b>;
1525 + cooling-min-state = <0>;
1526 + cooling-max-state = <10>;
1527 + #cooling-cells = <2>;
1528 + cpu-idle-states = <&CPU_SPC>;
1529 };
1530
1531 L2: l2-cache {
1532 compatible = "cache";
1533 cache-level = <2>;
1534 + qcom,saw = <&saw_l2>;
1535 + };
1536 +
1537 + qcom,l2 {
1538 + qcom,l2-rates = <384000000 1000000000 1200000000>;
1539 + };
1540 +
1541 + idle-states {
1542 + CPU_SPC: spc {
1543 + compatible = "qcom,idle-state-spc",
1544 + "arm,idle-state";
1545 + entry-latency-us = <400>;
1546 + exit-latency-us = <900>;
1547 + min-residency-us = <3000>;
1548 + };
1549 + };
1550 + };
1551 +
1552 + thermal-zones {
1553 + cpu-thermal0 {
1554 + polling-delay-passive = <250>;
1555 + polling-delay = <1000>;
1556 +
1557 + thermal-sensors = <&gcc 5>;
1558 + coefficients = <1132 0>;
1559 +
1560 + trips {
1561 + cpu_alert0: trip0 {
1562 + temperature = <75000>;
1563 + hysteresis = <2000>;
1564 + type = "passive";
1565 + };
1566 + cpu_crit0: trip1 {
1567 + temperature = <110000>;
1568 + hysteresis = <2000>;
1569 + type = "critical";
1570 + };
1571 + };
1572 + };
1573 +
1574 + cpu-thermal1 {
1575 + polling-delay-passive = <250>;
1576 + polling-delay = <1000>;
1577 +
1578 + thermal-sensors = <&gcc 6>;
1579 + coefficients = <1132 0>;
1580 +
1581 + trips {
1582 + cpu_alert1: trip0 {
1583 + temperature = <75000>;
1584 + hysteresis = <2000>;
1585 + type = "passive";
1586 + };
1587 + cpu_crit1: trip1 {
1588 + temperature = <110000>;
1589 + hysteresis = <2000>;
1590 + type = "critical";
1591 + };
1592 + };
1593 + };
1594 +
1595 + cpu-thermal2 {
1596 + polling-delay-passive = <250>;
1597 + polling-delay = <1000>;
1598 +
1599 + thermal-sensors = <&gcc 7>;
1600 + coefficients = <1199 0>;
1601 +
1602 + trips {
1603 + cpu_alert2: trip0 {
1604 + temperature = <75000>;
1605 + hysteresis = <2000>;
1606 + type = "passive";
1607 + };
1608 + cpu_crit2: trip1 {
1609 + temperature = <110000>;
1610 + hysteresis = <2000>;
1611 + type = "critical";
1612 + };
1613 + };
1614 + };
1615 +
1616 + cpu-thermal3 {
1617 + polling-delay-passive = <250>;
1618 + polling-delay = <1000>;
1619 +
1620 + thermal-sensors = <&gcc 8>;
1621 + coefficients = <1132 0>;
1622 +
1623 + trips {
1624 + cpu_alert3: trip0 {
1625 + temperature = <75000>;
1626 + hysteresis = <2000>;
1627 + type = "passive";
1628 + };
1629 + cpu_crit3: trip1 {
1630 + temperature = <110000>;
1631 + hysteresis = <2000>;
1632 + type = "critical";
1633 + };
1634 + };
1635 };
1636 };
1637
1638 @@ -57,7 +177,7 @@
1639 no-map;
1640 };
1641
1642 - smem@41000000 {
1643 + smem: smem@41000000 {
1644 reg = <0x41000000 0x200000>;
1645 no-map;
1646 };
1647 @@ -67,13 +187,13 @@
1648 cxo_board {
1649 compatible = "fixed-clock";
1650 #clock-cells = <0>;
1651 - clock-frequency = <19200000>;
1652 + clock-frequency = <25000000>;
1653 };
1654
1655 pxo_board {
1656 compatible = "fixed-clock";
1657 #clock-cells = <0>;
1658 - clock-frequency = <27000000>;
1659 + clock-frequency = <25000000>;
1660 };
1661
1662 sleep_clk: sleep_clk {
1663 @@ -83,6 +203,46 @@
1664 };
1665 };
1666
1667 + kraitcc: clock-controller {
1668 + compatible = "qcom,krait-cc-v1";
1669 + #clock-cells = <1>;
1670 + };
1671 +
1672 + qcom,pvs {
1673 + qcom,pvs-format-a;
1674 + qcom,speed0-pvs0-bin-v0 =
1675 + < 1400000000 1250000 >,
1676 + < 1200000000 1200000 >,
1677 + < 1000000000 1150000 >,
1678 + < 800000000 1100000 >,
1679 + < 600000000 1050000 >,
1680 + < 384000000 1000000 >;
1681 +
1682 + qcom,speed0-pvs1-bin-v0 =
1683 + < 1400000000 1175000 >,
1684 + < 1200000000 1125000 >,
1685 + < 1000000000 1075000 >,
1686 + < 800000000 1025000 >,
1687 + < 600000000 975000 >,
1688 + < 384000000 925000 >;
1689 +
1690 + qcom,speed0-pvs2-bin-v0 =
1691 + < 1400000000 1125000 >,
1692 + < 1200000000 1075000 >,
1693 + < 1000000000 1025000 >,
1694 + < 800000000 995000 >,
1695 + < 600000000 925000 >,
1696 + < 384000000 875000 >;
1697 +
1698 + qcom,speed0-pvs3-bin-v0 =
1699 + < 1400000000 1050000 >,
1700 + < 1200000000 1000000 >,
1701 + < 1000000000 950000 >,
1702 + < 800000000 900000 >,
1703 + < 600000000 850000 >,
1704 + < 384000000 800000 >;
1705 + };
1706 +
1707 soc: soc {
1708 #address-cells = <1>;
1709 #size-cells = <1>;
1710 @@ -104,6 +264,85 @@
1711 reg-names = "lpass-lpaif";
1712 };
1713
1714 + qfprom: qfprom@700000 {
1715 + compatible = "qcom,qfprom", "syscon";
1716 + reg = <0x00700000 0x1000>;
1717 + #address-cells = <1>;
1718 + #size-cells = <1>;
1719 + ranges;
1720 +
1721 + tsens_calib: calib {
1722 + reg = <0x400 0x10>;
1723 + };
1724 + tsens_backup: backup_calib {
1725 + reg = <0x410 0x10>;
1726 + };
1727 + };
1728 +
1729 + rpm@108000 {
1730 + compatible = "qcom,rpm-ipq8064";
1731 + reg = <0x108000 0x1000>;
1732 + qcom,ipc = <&l2cc 0x8 2>;
1733 +
1734 + interrupts = <0 19 0>,
1735 + <0 21 0>,
1736 + <0 22 0>;
1737 + interrupt-names = "ack",
1738 + "err",
1739 + "wakeup";
1740 +
1741 + clocks = <&gcc RPM_MSG_RAM_H_CLK>;
1742 + clock-names = "ram";
1743 +
1744 + #address-cells = <1>;
1745 + #size-cells = <0>;
1746 +
1747 + rpmcc: clock-controller {
1748 + compatible = "qcom,rpmcc-ipq806x", "qcom,rpmcc";
1749 + #clock-cells = <1>;
1750 + };
1751 +
1752 + regulators {
1753 + compatible = "qcom,rpm-smb208-regulators";
1754 +
1755 + smb208_s1a: s1a {
1756 + regulator-min-microvolt = <1050000>;
1757 + regulator-max-microvolt = <1150000>;
1758 +
1759 + qcom,switch-mode-frequency = <1200000>;
1760 +
1761 + };
1762 +
1763 + smb208_s1b: s1b {
1764 + regulator-min-microvolt = <1050000>;
1765 + regulator-max-microvolt = <1150000>;
1766 +
1767 + qcom,switch-mode-frequency = <1200000>;
1768 + };
1769 +
1770 + smb208_s2a: s2a {
1771 + regulator-min-microvolt = < 800000>;
1772 + regulator-max-microvolt = <1250000>;
1773 +
1774 + qcom,switch-mode-frequency = <1200000>;
1775 + };
1776 +
1777 + smb208_s2b: s2b {
1778 + regulator-min-microvolt = < 800000>;
1779 + regulator-max-microvolt = <1250000>;
1780 +
1781 + qcom,switch-mode-frequency = <1200000>;
1782 + };
1783 + };
1784 + };
1785 +
1786 + rng@1a500000 {
1787 + compatible = "qcom,prng";
1788 + reg = <0x1a500000 0x200>;
1789 + clocks = <&gcc PRNG_CLK>;
1790 + clock-names = "core";
1791 + };
1792 +
1793 qcom_pinmux: pinmux@800000 {
1794 compatible = "qcom,ipq8064-pinctrl";
1795 reg = <0x800000 0x4000>;
1796 @@ -113,6 +352,34 @@
1797 interrupt-controller;
1798 #interrupt-cells = <2>;
1799 interrupts = <0 16 0x4>;
1800 +
1801 + pcie0_pins: pcie0_pinmux {
1802 + mux {
1803 + pins = "gpio3";
1804 + function = "pcie1_rst";
1805 + drive-strength = <2>;
1806 + bias-disable;
1807 + };
1808 + };
1809 +
1810 + pcie1_pins: pcie1_pinmux {
1811 + mux {
1812 + pins = "gpio48";
1813 + function = "pcie2_rst";
1814 + drive-strength = <2>;
1815 + bias-disable;
1816 + };
1817 + };
1818 +
1819 + pcie2_pins: pcie2_pinmux {
1820 + mux {
1821 + pins = "gpio63";
1822 + function = "pcie3_rst";
1823 + drive-strength = <2>;
1824 + bias-disable;
1825 + output-low;
1826 + };
1827 + };
1828 };
1829
1830 intc: interrupt-controller@2000000 {
1831 @@ -124,8 +391,7 @@
1832 };
1833
1834 timer@200a000 {
1835 - compatible = "qcom,kpss-timer",
1836 - "qcom,kpss-wdt-ipq8064", "qcom,msm-timer";
1837 + compatible = "qcom,kpss-timer", "qcom,msm-timer";
1838 interrupts = <1 1 0x301>,
1839 <1 2 0x301>,
1840 <1 3 0x301>,
1841 @@ -142,25 +408,44 @@
1842 acc0: clock-controller@2088000 {
1843 compatible = "qcom,kpss-acc-v1";
1844 reg = <0x02088000 0x1000>, <0x02008000 0x1000>;
1845 + clock-output-names = "acpu0_aux";
1846 };
1847
1848 acc1: clock-controller@2098000 {
1849 compatible = "qcom,kpss-acc-v1";
1850 reg = <0x02098000 0x1000>, <0x02008000 0x1000>;
1851 + clock-output-names = "acpu1_aux";
1852 };
1853
1854 + l2cc: clock-controller@2011000 {
1855 + compatible = "qcom,kpss-gcc", "syscon";
1856 + reg = <0x2011000 0x1000>;
1857 + clock-output-names = "acpu_l2_aux";
1858 + };
1859 +
1860 saw0: regulator@2089000 {
1861 - compatible = "qcom,saw2";
1862 + compatible = "qcom,saw2", "syscon";
1863 reg = <0x02089000 0x1000>, <0x02009000 0x1000>;
1864 regulator;
1865 };
1866
1867 saw1: regulator@2099000 {
1868 - compatible = "qcom,saw2";
1869 + compatible = "qcom,saw2", "syscon";
1870 reg = <0x02099000 0x1000>, <0x02009000 0x1000>;
1871 regulator;
1872 };
1873
1874 + saw_l2: regulator@02012000 {
1875 + compatible = "qcom,saw2", "syscon";
1876 + reg = <0x02012000 0x1000>;
1877 + regulator;
1878 + };
1879 +
1880 + sic_non_secure: sic-non-secure@12100000 {
1881 + compatible = "syscon";
1882 + reg = <0x12100000 0x10000>;
1883 + };
1884 +
1885 gsbi2: gsbi@12480000 {
1886 compatible = "qcom,gsbi-v1.0.0";
1887 cell-index = <2>;
1888 @@ -174,7 +459,7 @@
1889
1890 syscon-tcsr = <&tcsr>;
1891
1892 - serial@12490000 {
1893 + uart2: serial@12490000 {
1894 compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
1895 reg = <0x12490000 0x1000>,
1896 <0x12480000 0x1000>;
1897 @@ -212,7 +497,7 @@
1898
1899 syscon-tcsr = <&tcsr>;
1900
1901 - gsbi4_serial: serial@16340000 {
1902 + uart4: serial@16340000 {
1903 compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
1904 reg = <0x16340000 0x1000>,
1905 <0x16300000 0x1000>;
1906 @@ -249,7 +534,7 @@
1907
1908 syscon-tcsr = <&tcsr>;
1909
1910 - serial@1a240000 {
1911 + uart5: serial@1a240000 {
1912 compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
1913 reg = <0x1a240000 0x1000>,
1914 <0x1a200000 0x1000>;
1915 @@ -328,8 +613,12 @@
1916 gcc: clock-controller@900000 {
1917 compatible = "qcom,gcc-ipq8064";
1918 reg = <0x00900000 0x4000>;
1919 + nvmem-cells = <&tsens_calib>, <&tsens_backup>;
1920 + nvmem-cell-names = "calib", "calib_backup";
1921 #clock-cells = <1>;
1922 #reset-cells = <1>;
1923 + #power-domain-cells = <1>;
1924 + #thermal-sensor-cells = <1>;
1925 };
1926
1927 tcsr: syscon@1a400000 {
1928 @@ -344,10 +633,259 @@
1929 #reset-cells = <1>;
1930 };
1931
1932 + sfpb_mutex_block: syscon@1200600 {
1933 + compatible = "syscon";
1934 + reg = <0x01200600 0x100>;
1935 + };
1936 +
1937 + hs_phy_1: phy@100f8800 {
1938 + compatible = "qcom,dwc3-hs-usb-phy";
1939 + reg = <0x100f8800 0x30>;
1940 + clocks = <&gcc USB30_1_UTMI_CLK>;
1941 + clock-names = "ref";
1942 + #phy-cells = <0>;
1943 +
1944 + status = "disabled";
1945 + };
1946 +
1947 + ss_phy_1: phy@100f8830 {
1948 + compatible = "qcom,dwc3-ss-usb-phy";
1949 + reg = <0x100f8830 0x30>;
1950 + clocks = <&gcc USB30_1_MASTER_CLK>;
1951 + clock-names = "ref";
1952 + #phy-cells = <0>;
1953 +
1954 + status = "disabled";
1955 + };
1956 +
1957 + hs_phy_0: phy@110f8800 {
1958 + compatible = "qcom,dwc3-hs-usb-phy";
1959 + reg = <0x110f8800 0x30>;
1960 + clocks = <&gcc USB30_0_UTMI_CLK>;
1961 + clock-names = "ref";
1962 + #phy-cells = <0>;
1963 +
1964 + status = "disabled";
1965 + };
1966 +
1967 + ss_phy_0: phy@110f8830 {
1968 + compatible = "qcom,dwc3-ss-usb-phy";
1969 + reg = <0x110f8830 0x30>;
1970 + clocks = <&gcc USB30_0_MASTER_CLK>;
1971 + clock-names = "ref";
1972 + #phy-cells = <0>;
1973 +
1974 + status = "disabled";
1975 + };
1976 +
1977 + usb3_0: usb30@0 {
1978 + compatible = "qcom,dwc3";
1979 + #address-cells = <1>;
1980 + #size-cells = <1>;
1981 + clocks = <&gcc USB30_0_MASTER_CLK>;
1982 + clock-names = "core";
1983 +
1984 + syscon-tcsr = <&tcsr 0xb0 1>;
1985 +
1986 + ranges;
1987 +
1988 + status = "disabled";
1989 +
1990 + dwc3@11000000 {
1991 + compatible = "snps,dwc3";
1992 + reg = <0x11000000 0xcd00>;
1993 + interrupts = <0 110 0x4>;
1994 + phys = <&hs_phy_0>, <&ss_phy_0>;
1995 + phy-names = "usb2-phy", "usb3-phy";
1996 + dr_mode = "host";
1997 + snps,dis_u3_susphy_quirk;
1998 + };
1999 + };
2000 +
2001 + usb3_1: usb30@1 {
2002 + compatible = "qcom,dwc3";
2003 + #address-cells = <1>;
2004 + #size-cells = <1>;
2005 + clocks = <&gcc USB30_1_MASTER_CLK>;
2006 + clock-names = "core";
2007 +
2008 + syscon-tcsr = <&tcsr 0xb0 0>;
2009 +
2010 + ranges;
2011 +
2012 + status = "disabled";
2013 +
2014 + dwc3@10000000 {
2015 + compatible = "snps,dwc3";
2016 + reg = <0x10000000 0xcd00>;
2017 + interrupts = <0 205 0x4>;
2018 + phys = <&hs_phy_1>, <&ss_phy_1>;
2019 + phy-names = "usb2-phy", "usb3-phy";
2020 + dr_mode = "host";
2021 + snps,dis_u3_susphy_quirk;
2022 + };
2023 + };
2024 +
2025 + pcie0: pci@1b500000 {
2026 + compatible = "qcom,pcie-v0";
2027 + reg = <0x1b500000 0x1000
2028 + 0x1b502000 0x80
2029 + 0x1b600000 0x100
2030 + 0x0ff00000 0x100000>;
2031 + reg-names = "dbi", "elbi", "parf", "config";
2032 + device_type = "pci";
2033 + linux,pci-domain = <0>;
2034 + bus-range = <0x00 0xff>;
2035 + num-lanes = <1>;
2036 + #address-cells = <3>;
2037 + #size-cells = <2>;
2038 +
2039 + ranges = <0x81000000 0 0x0fe00000 0x0fe00000 0 0x00100000 /* downstream I/O */
2040 + 0x82000000 0 0x08000000 0x08000000 0 0x07e00000>; /* non-prefetchable memory */
2041 +
2042 + interrupts = <GIC_SPI 35 IRQ_TYPE_NONE>;
2043 + interrupt-names = "msi";
2044 + #interrupt-cells = <1>;
2045 + interrupt-map-mask = <0 0 0 0x7>;
2046 + interrupt-map = <0 0 0 1 &intc 0 36 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
2047 + <0 0 0 2 &intc 0 37 IRQ_TYPE_LEVEL_HIGH>, /* int_b */
2048 + <0 0 0 3 &intc 0 38 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
2049 + <0 0 0 4 &intc 0 39 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
2050 +
2051 + clocks = <&gcc PCIE_A_CLK>,
2052 + <&gcc PCIE_H_CLK>,
2053 + <&gcc PCIE_PHY_CLK>,
2054 + <&gcc PCIE_AUX_CLK>,
2055 + <&gcc PCIE_ALT_REF_CLK>;
2056 + clock-names = "core", "iface", "phy", "aux", "ref";
2057 +
2058 + assigned-clocks = <&gcc PCIE_ALT_REF_CLK>;
2059 + assigned-clock-rates = <100000000>;
2060 +
2061 + resets = <&gcc PCIE_ACLK_RESET>,
2062 + <&gcc PCIE_HCLK_RESET>,
2063 + <&gcc PCIE_POR_RESET>,
2064 + <&gcc PCIE_PCI_RESET>,
2065 + <&gcc PCIE_PHY_RESET>,
2066 + <&gcc PCIE_EXT_RESET>;
2067 + reset-names = "axi", "ahb", "por", "pci", "phy", "ext";
2068 +
2069 + pinctrl-0 = <&pcie0_pins>;
2070 + pinctrl-names = "default";
2071 +
2072 + perst-gpios = <&qcom_pinmux 3 GPIO_ACTIVE_LOW>;
2073 +
2074 + status = "disabled";
2075 + };
2076 +
2077 + pcie1: pci@1b700000 {
2078 + compatible = "qcom,pcie-v0";
2079 + reg = <0x1b700000 0x1000
2080 + 0x1b702000 0x80
2081 + 0x1b800000 0x100
2082 + 0x31f00000 0x100000>;
2083 + reg-names = "dbi", "elbi", "parf", "config";
2084 + device_type = "pci";
2085 + linux,pci-domain = <1>;
2086 + bus-range = <0x00 0xff>;
2087 + num-lanes = <1>;
2088 + #address-cells = <3>;
2089 + #size-cells = <2>;
2090 +
2091 + ranges = <0x81000000 0 0x31e00000 0x31e00000 0 0x00100000 /* downstream I/O */
2092 + 0x82000000 0 0x2e000000 0x2e000000 0 0x03e00000>; /* non-prefetchable memory */
2093 +
2094 + interrupts = <GIC_SPI 57 IRQ_TYPE_NONE>;
2095 + interrupt-names = "msi";
2096 + #interrupt-cells = <1>;
2097 + interrupt-map-mask = <0 0 0 0x7>;
2098 + interrupt-map = <0 0 0 1 &intc 0 58 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
2099 + <0 0 0 2 &intc 0 59 IRQ_TYPE_LEVEL_HIGH>, /* int_b */
2100 + <0 0 0 3 &intc 0 60 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
2101 + <0 0 0 4 &intc 0 61 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
2102 +
2103 + clocks = <&gcc PCIE_1_A_CLK>,
2104 + <&gcc PCIE_1_H_CLK>,
2105 + <&gcc PCIE_1_PHY_CLK>,
2106 + <&gcc PCIE_1_AUX_CLK>,
2107 + <&gcc PCIE_1_ALT_REF_CLK>;
2108 + clock-names = "core", "iface", "phy", "aux", "ref";
2109 +
2110 + assigned-clocks = <&gcc PCIE_1_ALT_REF_CLK>;
2111 + assigned-clock-rates = <100000000>;
2112 +
2113 + resets = <&gcc PCIE_1_ACLK_RESET>,
2114 + <&gcc PCIE_1_HCLK_RESET>,
2115 + <&gcc PCIE_1_POR_RESET>,
2116 + <&gcc PCIE_1_PCI_RESET>,
2117 + <&gcc PCIE_1_PHY_RESET>,
2118 + <&gcc PCIE_1_EXT_RESET>;
2119 + reset-names = "axi", "ahb", "por", "pci", "phy", "ext";
2120 +
2121 + pinctrl-0 = <&pcie1_pins>;
2122 + pinctrl-names = "default";
2123 +
2124 + perst-gpios = <&qcom_pinmux 48 GPIO_ACTIVE_LOW>;
2125 +
2126 + status = "disabled";
2127 + };
2128 +
2129 + pcie2: pci@1b900000 {
2130 + compatible = "qcom,pcie-v0";
2131 + reg = <0x1b900000 0x1000
2132 + 0x1b902000 0x80
2133 + 0x1ba00000 0x100
2134 + 0x35f00000 0x100000>;
2135 + reg-names = "dbi", "elbi", "parf", "config";
2136 + device_type = "pci";
2137 + linux,pci-domain = <2>;
2138 + bus-range = <0x00 0xff>;
2139 + num-lanes = <1>;
2140 + #address-cells = <3>;
2141 + #size-cells = <2>;
2142 +
2143 + ranges = <0x81000000 0 0x35e00000 0x35e00000 0 0x00100000 /* downstream I/O */
2144 + 0x82000000 0 0x32000000 0x32000000 0 0x03e00000>; /* non-prefetchable memory */
2145 +
2146 + interrupts = <GIC_SPI 71 IRQ_TYPE_NONE>;
2147 + interrupt-names = "msi";
2148 + #interrupt-cells = <1>;
2149 + interrupt-map-mask = <0 0 0 0x7>;
2150 + interrupt-map = <0 0 0 1 &intc 0 72 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
2151 + <0 0 0 2 &intc 0 73 IRQ_TYPE_LEVEL_HIGH>, /* int_b */
2152 + <0 0 0 3 &intc 0 74 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
2153 + <0 0 0 4 &intc 0 75 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
2154 +
2155 + clocks = <&gcc PCIE_2_A_CLK>,
2156 + <&gcc PCIE_2_H_CLK>,
2157 + <&gcc PCIE_2_PHY_CLK>,
2158 + <&gcc PCIE_2_AUX_CLK>,
2159 + <&gcc PCIE_2_ALT_REF_CLK>;
2160 + clock-names = "core", "iface", "phy", "aux", "ref";
2161 +
2162 + assigned-clocks = <&gcc PCIE_2_ALT_REF_CLK>;
2163 + assigned-clock-rates = <100000000>;
2164 +
2165 + resets = <&gcc PCIE_2_ACLK_RESET>,
2166 + <&gcc PCIE_2_HCLK_RESET>,
2167 + <&gcc PCIE_2_POR_RESET>,
2168 + <&gcc PCIE_2_PCI_RESET>,
2169 + <&gcc PCIE_2_PHY_RESET>,
2170 + <&gcc PCIE_2_EXT_RESET>;
2171 + reset-names = "axi", "ahb", "por", "pci", "phy", "ext";
2172 +
2173 + pinctrl-0 = <&pcie2_pins>;
2174 + pinctrl-names = "default";
2175 +
2176 + perst-gpios = <&qcom_pinmux 63 GPIO_ACTIVE_LOW>;
2177 +
2178 + status = "disabled";
2179 + };
2180 +
2181 adm_dma: dma@18300000 {
2182 compatible = "qcom,adm";
2183 reg = <0x18300000 0x100000>;
2184 - interrupts = <GIC_SPI 170 IRQ_TYPE_NONE>;
2185 + interrupts = <0 170 0>;
2186 #dma-cells = <1>;
2187
2188 clocks = <&gcc ADM0_CLK>, <&gcc ADM0_PBUS_CLK>;
2189 @@ -365,7 +903,7 @@
2190 };
2191
2192 nand@1ac00000 {
2193 - compatible = "qcom,ipq806x-nand";
2194 + compatible = "qcom,ebi2-nandc";
2195 reg = <0x1ac00000 0x800>;
2196
2197 clocks = <&gcc EBI2_CLK>,
2198 @@ -380,5 +918,103 @@
2199 status = "disabled";
2200 };
2201
2202 + nss_common: syscon@03000000 {
2203 + compatible = "syscon";
2204 + reg = <0x03000000 0x0000FFFF>;
2205 + };
2206 +
2207 + qsgmii_csr: syscon@1bb00000 {
2208 + compatible = "syscon";
2209 + reg = <0x1bb00000 0x000001FF>;
2210 + };
2211 +
2212 + gmac0: ethernet@37000000 {
2213 + device_type = "network";
2214 + compatible = "qcom,ipq806x-gmac";
2215 + reg = <0x37000000 0x200000>;
2216 + interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>;
2217 + interrupt-names = "macirq";
2218 +
2219 + qcom,nss-common = <&nss_common>;
2220 + qcom,qsgmii-csr = <&qsgmii_csr>;
2221 +
2222 + clocks = <&gcc GMAC_CORE1_CLK>;
2223 + clock-names = "stmmaceth";
2224 +
2225 + resets = <&gcc GMAC_CORE1_RESET>;
2226 + reset-names = "stmmaceth";
2227 +
2228 + status = "disabled";
2229 + };
2230 +
2231 + gmac1: ethernet@37200000 {
2232 + device_type = "network";
2233 + compatible = "qcom,ipq806x-gmac";
2234 + reg = <0x37200000 0x200000>;
2235 + interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
2236 + interrupt-names = "macirq";
2237 +
2238 + qcom,nss-common = <&nss_common>;
2239 + qcom,qsgmii-csr = <&qsgmii_csr>;
2240 +
2241 + clocks = <&gcc GMAC_CORE2_CLK>;
2242 + clock-names = "stmmaceth";
2243 +
2244 + resets = <&gcc GMAC_CORE2_RESET>;
2245 + reset-names = "stmmaceth";
2246 +
2247 + status = "disabled";
2248 + };
2249 +
2250 + gmac2: ethernet@37400000 {
2251 + device_type = "network";
2252 + compatible = "qcom,ipq806x-gmac";
2253 + reg = <0x37400000 0x200000>;
2254 + interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
2255 + interrupt-names = "macirq";
2256 +
2257 + qcom,nss-common = <&nss_common>;
2258 + qcom,qsgmii-csr = <&qsgmii_csr>;
2259 +
2260 + clocks = <&gcc GMAC_CORE3_CLK>;
2261 + clock-names = "stmmaceth";
2262 +
2263 + resets = <&gcc GMAC_CORE3_RESET>;
2264 + reset-names = "stmmaceth";
2265 +
2266 + status = "disabled";
2267 + };
2268 +
2269 + gmac3: ethernet@37600000 {
2270 + device_type = "network";
2271 + compatible = "qcom,ipq806x-gmac";
2272 + reg = <0x37600000 0x200000>;
2273 + interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>;
2274 + interrupt-names = "macirq";
2275 +
2276 + qcom,nss-common = <&nss_common>;
2277 + qcom,qsgmii-csr = <&qsgmii_csr>;
2278 +
2279 + clocks = <&gcc GMAC_CORE4_CLK>;
2280 + clock-names = "stmmaceth";
2281 +
2282 + resets = <&gcc GMAC_CORE4_RESET>;
2283 + reset-names = "stmmaceth";
2284 +
2285 + status = "disabled";
2286 + };
2287 + };
2288 +
2289 + sfpb_mutex: sfpb-mutex {
2290 + compatible = "qcom,sfpb-mutex";
2291 + syscon = <&sfpb_mutex_block 4 4>;
2292 +
2293 + #hwlock-cells = <1>;
2294 + };
2295 +
2296 + smem {
2297 + compatible = "qcom,smem";
2298 + memory-region = <&smem>;
2299 + hwlocks = <&sfpb_mutex 3>;
2300 };
2301 };
2302 --- /dev/null
2303 +++ b/arch/arm/boot/dts/qcom-ipq8064-ea8500.dts
2304 @@ -0,0 +1,399 @@
2305 +#include "qcom-ipq8064-v1.0.dtsi"
2306 +
2307 +#include <dt-bindings/input/input.h>
2308 +
2309 +/ {
2310 + model = "Linksys EA8500 WiFi Router";
2311 + compatible = "linksys,ea8500", "qcom,ipq8064";
2312 +
2313 + memory@0 {
2314 + reg = <0x42000000 0x1e000000>;
2315 + device_type = "memory";
2316 + };
2317 +
2318 + reserved-memory {
2319 + #address-cells = <1>;
2320 + #size-cells = <1>;
2321 + ranges;
2322 + rsvd@41200000 {
2323 + reg = <0x41200000 0x300000>;
2324 + no-map;
2325 + };
2326 + };
2327 +
2328 + aliases {
2329 + serial0 = &uart4;
2330 + mdio-gpio0 = &mdio0;
2331 +
2332 + led-boot = &power;
2333 + led-failsafe = &power;
2334 + led-running = &power;
2335 + led-upgrade = &power;
2336 + };
2337 +
2338 + chosen {
2339 + bootargs = "console=ttyMSM0,115200n8";
2340 + linux,stdout-path = "serial0:115200n8";
2341 + append-rootblock = "ubi.mtd="; /* append to bootargs adding the root deviceblock nbr from bootloader */
2342 + };
2343 +
2344 + soc {
2345 + pinmux@800000 {
2346 + button_pins: button_pins {
2347 + mux {
2348 + pins = "gpio65", "gpio67", "gpio68";
2349 + function = "gpio";
2350 + drive-strength = <2>;
2351 + bias-pull-up;
2352 + };
2353 + };
2354 +
2355 + i2c4_pins: i2c4_pinmux {
2356 + mux {
2357 + pins = "gpio12", "gpio13";
2358 + function = "gsbi4";
2359 + drive-strength = <12>;
2360 + bias-disable;
2361 + };
2362 + };
2363 +
2364 + led_pins: led_pins {
2365 + mux {
2366 + pins = "gpio6", "gpio53", "gpio54";
2367 + function = "gpio";
2368 + drive-strength = <2>;
2369 + bias-pull-up;
2370 + };
2371 + };
2372 +
2373 + mdio0_pins: mdio0_pins {
2374 + mux {
2375 + pins = "gpio0", "gpio1";
2376 + function = "gpio";
2377 + drive-strength = <8>;
2378 + bias-disable;
2379 + };
2380 + };
2381 +
2382 + nand_pins: nand_pins {
2383 + mux {
2384 + pins = "gpio34", "gpio35", "gpio36",
2385 + "gpio37", "gpio38", "gpio39",
2386 + "gpio40", "gpio41", "gpio42",
2387 + "gpio43", "gpio44", "gpio45",
2388 + "gpio46", "gpio47";
2389 + function = "nand";
2390 + drive-strength = <10>;
2391 + bias-disable;
2392 + };
2393 + pullups {
2394 + pins = "gpio39";
2395 + bias-pull-up;
2396 + };
2397 + hold {
2398 + pins = "gpio40", "gpio41", "gpio42",
2399 + "gpio43", "gpio44", "gpio45",
2400 + "gpio46", "gpio47";
2401 + bias-bus-hold;
2402 + };
2403 + };
2404 +
2405 + rgmii2_pins: rgmii2_pins {
2406 + mux {
2407 + pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32",
2408 + "gpio51", "gpio52", "gpio59", "gpio60", "gpio61", "gpio62" ;
2409 + function = "rgmii2";
2410 + drive-strength = <8>;
2411 + bias-disable;
2412 + };
2413 + };
2414 + };
2415 +
2416 + gsbi@16300000 {
2417 + qcom,mode = <GSBI_PROT_I2C_UART>;
2418 + status = "ok";
2419 + serial@16340000 {
2420 + status = "ok";
2421 + };
2422 + /*
2423 + * The i2c device on gsbi4 should not be enabled.
2424 + * On ipq806x designs gsbi4 i2c is meant for exclusive
2425 + * RPM usage. Turning this on in kernel manifests as
2426 + * i2c failure for the RPM.
2427 + */
2428 + };
2429 +
2430 + sata-phy@1b400000 {
2431 + status = "ok";
2432 + };
2433 +
2434 + sata@29000000 {
2435 + status = "ok";
2436 + };
2437 +
2438 + phy@100f8800 { /* USB3 port 1 HS phy */
2439 + status = "ok";
2440 + };
2441 +
2442 + phy@100f8830 { /* USB3 port 1 SS phy */
2443 + status = "ok";
2444 + };
2445 +
2446 + phy@110f8800 { /* USB3 port 0 HS phy */
2447 + status = "ok";
2448 + };
2449 +
2450 + phy@110f8830 { /* USB3 port 0 SS phy */
2451 + status = "ok";
2452 + };
2453 +
2454 + usb30@0 {
2455 + status = "ok";
2456 + };
2457 +
2458 + usb30@1 {
2459 + status = "ok";
2460 + };
2461 +
2462 + pcie0: pci@1b500000 {
2463 + status = "ok";
2464 + phy-tx0-term-offset = <7>;
2465 + };
2466 +
2467 + pcie1: pci@1b700000 {
2468 + status = "ok";
2469 + phy-tx0-term-offset = <7>;
2470 + };
2471 +
2472 + pcie2: pci@1b900000 {
2473 + status = "ok";
2474 + phy-tx0-term-offset = <7>;
2475 + };
2476 +
2477 + nand@1ac00000 {
2478 + status = "ok";
2479 +
2480 + pinctrl-0 = <&nand_pins>;
2481 + pinctrl-names = "default";
2482 +
2483 + nand-ecc-strength = <4>;
2484 + nand-bus-width = <8>;
2485 +
2486 + #address-cells = <1>;
2487 + #size-cells = <1>;
2488 +
2489 + SBL1@0 {
2490 + label = "SBL1";
2491 + reg = <0x0000000 0x0040000>;
2492 + read-only;
2493 + };
2494 +
2495 + MIBIB@40000 {
2496 + label = "MIBIB";
2497 + reg = <0x0040000 0x0140000>;
2498 + read-only;
2499 + };
2500 +
2501 + SBL2@180000 {
2502 + label = "SBL2";
2503 + reg = <0x0180000 0x0140000>;
2504 + read-only;
2505 + };
2506 +
2507 + SBL3@2c0000 {
2508 + label = "SBL3";
2509 + reg = <0x02c0000 0x0280000>;
2510 + read-only;
2511 + };
2512 +
2513 + DDRCONFIG@540000 {
2514 + label = "DDRCONFIG";
2515 + reg = <0x0540000 0x0120000>;
2516 + read-only;
2517 + };
2518 +
2519 + SSD@660000 {
2520 + label = "SSD";
2521 + reg = <0x0660000 0x0120000>;
2522 + read-only;
2523 + };
2524 +
2525 + TZ@780000 {
2526 + label = "TZ";
2527 + reg = <0x0780000 0x0280000>;
2528 + read-only;
2529 + };
2530 +
2531 + RPM@a00000 {
2532 + label = "RPM";
2533 + reg = <0x0a00000 0x0280000>;
2534 + read-only;
2535 + };
2536 +
2537 + art: art@c80000 {
2538 + label = "art";
2539 + reg = <0x0c80000 0x0140000>;
2540 + read-only;
2541 + };
2542 +
2543 + APPSBL@dc0000 {
2544 + label = "APPSBL";
2545 + reg = <0x0dc0000 0x0100000>;
2546 + read-only;
2547 + };
2548 +
2549 + u_env@ec0000 {
2550 + label = "u_env";
2551 + reg = <0x0ec0000 0x0040000>;
2552 + };
2553 +
2554 + s_env@f00000 {
2555 + label = "s_env";
2556 + reg = <0x0f00000 0x0040000>;
2557 + };
2558 +
2559 + devinfo@f40000 {
2560 + label = "devinfo";
2561 + reg = <0x0f40000 0x0040000>;
2562 + };
2563 +
2564 + linux@f80000 {
2565 + label = "kernel1";
2566 + reg = <0x0f80000 0x2800000>; /* 3 MB spill to rootfs*/
2567 + };
2568 +
2569 + rootfs@1280000 {
2570 + label = "rootfs1";
2571 + reg = <0x1280000 0x2500000>;
2572 + };
2573 +
2574 + linux2@3780000 {
2575 + label = "kernel2";
2576 + reg = <0x3780000 0x2800000>;
2577 + };
2578 +
2579 + rootfs2@3a80000 {
2580 + label = "rootfs2";
2581 + reg = <0x3a80000 0x2500000>;
2582 + };
2583 +
2584 + syscfg@5f80000 {
2585 + label = "syscfg";
2586 + reg = <0x5f80000 0x2080000>;
2587 + };
2588 + };
2589 +
2590 + mdio0: mdio {
2591 + compatible = "virtual,mdio-gpio";
2592 + #address-cells = <1>;
2593 + #size-cells = <0>;
2594 + gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH &qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
2595 + pinctrl-0 = <&mdio0_pins>;
2596 + pinctrl-names = "default";
2597 +
2598 + phy0: ethernet-phy@0 {
2599 + device_type = "ethernet-phy";
2600 + reg = <0>;
2601 + qca,ar8327-initvals = <
2602 + 0x00004 0x7600000 /* PAD0_MODE */
2603 + 0x00008 0x1000000 /* PAD5_MODE */
2604 + 0x0000c 0x80 /* PAD6_MODE */
2605 + 0x000e4 0x6a545 /* MAC_POWER_SEL */
2606 + 0x000e0 0xc74164de /* SGMII_CTRL */
2607 + 0x0007c 0x4e /* PORT0_STATUS */
2608 + 0x00094 0x4e /* PORT6_STATUS */
2609 + >;
2610 + };
2611 +
2612 + phy4: ethernet-phy@4 {
2613 + device_type = "ethernet-phy";
2614 + reg = <4>;
2615 + };
2616 + };
2617 +
2618 + gmac1: ethernet@37200000 {
2619 + status = "ok";
2620 + phy-mode = "rgmii";
2621 + qcom,id = <1>;
2622 + qcom,phy_mdio_addr = <4>;
2623 + qcom,poll_required = <1>;
2624 + qcom,rgmii_delay = <0>;
2625 + qcom,emulation = <0>;
2626 + pinctrl-0 = <&rgmii2_pins>;
2627 + pinctrl-names = "default";
2628 + fixed-link {
2629 + speed = <1000>;
2630 + full-duplex;
2631 + };
2632 + };
2633 + //lan
2634 + gmac2: ethernet@37400000 {
2635 + status = "ok";
2636 + phy-mode = "sgmii";
2637 + qcom,id = <2>;
2638 + qcom,phy_mdio_addr = <0>; /* none */
2639 + qcom,poll_required = <0>; /* no polling */
2640 + qcom,rgmii_delay = <0>;
2641 + qcom,emulation = <0>;
2642 + fixed-link {
2643 + speed = <1000>;
2644 + full-duplex;
2645 + };
2646 + };
2647 +
2648 + rpm@108000 {
2649 + pinctrl-0 = <&i2c4_pins>;
2650 + pinctrl-names = "default";
2651 + };
2652 +
2653 + adm_dma: dma@18300000 {
2654 + status = "ok";
2655 + };
2656 + };
2657 +
2658 + gpio-keys {
2659 + compatible = "gpio-keys";
2660 + pinctrl-0 = <&button_pins>;
2661 + pinctrl-names = "default";
2662 +
2663 + wifi {
2664 + label = "wifi";
2665 + gpios = <&qcom_pinmux 67 GPIO_ACTIVE_LOW>;
2666 + linux,code = <KEY_RFKILL>;
2667 + };
2668 +
2669 + reset {
2670 + label = "reset";
2671 + gpios = <&qcom_pinmux 68 GPIO_ACTIVE_LOW>;
2672 + linux,code = <KEY_RESTART >;
2673 + };
2674 +
2675 + wps {
2676 + label = "wps";
2677 + gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
2678 + linux,code = <KEY_WPS_BUTTON>;
2679 + };
2680 + };
2681 +
2682 + gpio-leds {
2683 + compatible = "gpio-leds";
2684 + pinctrl-0 = <&led_pins>;
2685 + pinctrl-names = "default";
2686 +
2687 + wps {
2688 + label = "ea8500:green:wps";
2689 + gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
2690 + };
2691 +
2692 + power: power {
2693 + label = "ea8500:white:power";
2694 + gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
2695 + default-state = "keep";
2696 + };
2697 +
2698 + wifi {
2699 + label = "ea8500:green:wifi";
2700 + gpios = <&qcom_pinmux 54 GPIO_ACTIVE_HIGH>;
2701 + };
2702 + };
2703 +};
2704 --- /dev/null
2705 +++ b/arch/arm/boot/dts/qcom-ipq8064-r7500.dts
2706 @@ -0,0 +1,373 @@
2707 +#include "qcom-ipq8064-v1.0.dtsi"
2708 +
2709 +#include <dt-bindings/input/input.h>
2710 +
2711 +/ {
2712 + model = "Netgear Nighthawk X4 R7500";
2713 + compatible = "netgear,r7500", "qcom,ipq8064";
2714 +
2715 + memory@0 {
2716 + reg = <0x42000000 0xe000000>;
2717 + device_type = "memory";
2718 + };
2719 +
2720 + reserved-memory {
2721 + #address-cells = <1>;
2722 + #size-cells = <1>;
2723 + ranges;
2724 + rsvd@41200000 {
2725 + reg = <0x41200000 0x300000>;
2726 + no-map;
2727 + };
2728 + };
2729 +
2730 + aliases {
2731 + serial0 = &uart4;
2732 + mdio-gpio0 = &mdio0;
2733 +
2734 + led-boot = &power_white;
2735 + led-failsafe = &power_amber;
2736 + led-running = &power_white;
2737 + led-upgrade = &power_amber;
2738 + };
2739 +
2740 + chosen {
2741 + bootargs = "rootfstype=squashfs noinitrd";
2742 + linux,stdout-path = "serial0:115200n8";
2743 + };
2744 +
2745 + soc {
2746 + pinmux@800000 {
2747 + button_pins: button_pins {
2748 + mux {
2749 + pins = "gpio6", "gpio54", "gpio65";
2750 + function = "gpio";
2751 + drive-strength = <2>;
2752 + bias-pull-up;
2753 + };
2754 + };
2755 +
2756 + i2c4_pins: i2c4_pinmux {
2757 + mux {
2758 + pins = "gpio12", "gpio13";
2759 + function = "gsbi4";
2760 + drive-strength = <12>;
2761 + bias-disable;
2762 + };
2763 + };
2764 +
2765 + led_pins: led_pins {
2766 + mux {
2767 + pins = "gpio7", "gpio8", "gpio9", "gpio22", "gpio23",
2768 + "gpio24","gpio26", "gpio53", "gpio64";
2769 + function = "gpio";
2770 + drive-strength = <2>;
2771 + bias-pull-up;
2772 + };
2773 + };
2774 +
2775 + mdio0_pins: mdio0_pins {
2776 + mux {
2777 + pins = "gpio0", "gpio1";
2778 + function = "gpio";
2779 + drive-strength = <8>;
2780 + bias-disable;
2781 + };
2782 + };
2783 +
2784 + nand_pins: nand_pins {
2785 + mux {
2786 + pins = "gpio34", "gpio35", "gpio36",
2787 + "gpio37", "gpio38", "gpio39",
2788 + "gpio40", "gpio41", "gpio42",
2789 + "gpio43", "gpio44", "gpio45",
2790 + "gpio46", "gpio47";
2791 + function = "nand";
2792 + drive-strength = <10>;
2793 + bias-disable;
2794 + };
2795 + pullups {
2796 + pins = "gpio39";
2797 + bias-pull-up;
2798 + };
2799 + hold {
2800 + pins = "gpio40", "gpio41", "gpio42",
2801 + "gpio43", "gpio44", "gpio45",
2802 + "gpio46", "gpio47";
2803 + bias-bus-hold;
2804 + };
2805 + };
2806 +
2807 + rgmii2_pins: rgmii2_pins {
2808 + mux {
2809 + pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32",
2810 + "gpio51", "gpio52", "gpio59", "gpio60", "gpio61", "gpio62" ;
2811 + function = "rgmii2";
2812 + drive-strength = <8>;
2813 + bias-disable;
2814 + };
2815 + };
2816 + };
2817 +
2818 + gsbi@16300000 {
2819 + qcom,mode = <GSBI_PROT_I2C_UART>;
2820 + status = "ok";
2821 + serial@16340000 {
2822 + status = "ok";
2823 + };
2824 + /*
2825 + * The i2c device on gsbi4 should not be enabled.
2826 + * On ipq806x designs gsbi4 i2c is meant for exclusive
2827 + * RPM usage. Turning this on in kernel manifests as
2828 + * i2c failure for the RPM.
2829 + */
2830 + };
2831 +
2832 + sata-phy@1b400000 {
2833 + status = "ok";
2834 + };
2835 +
2836 + sata@29000000 {
2837 + status = "ok";
2838 + };
2839 +
2840 + phy@100f8800 { /* USB3 port 1 HS phy */
2841 + status = "ok";
2842 + };
2843 +
2844 + phy@100f8830 { /* USB3 port 1 SS phy */
2845 + status = "ok";
2846 + };
2847 +
2848 + phy@110f8800 { /* USB3 port 0 HS phy */
2849 + status = "ok";
2850 + };
2851 +
2852 + phy@110f8830 { /* USB3 port 0 SS phy */
2853 + status = "ok";
2854 + };
2855 +
2856 + usb30@0 {
2857 + status = "ok";
2858 + };
2859 +
2860 + usb30@1 {
2861 + status = "ok";
2862 + };
2863 +
2864 + pcie0: pci@1b500000 {
2865 + status = "ok";
2866 + };
2867 +
2868 + pcie1: pci@1b700000 {
2869 + status = "ok";
2870 + };
2871 +
2872 + nand@1ac00000 {
2873 + status = "ok";
2874 +
2875 + pinctrl-0 = <&nand_pins>;
2876 + pinctrl-names = "default";
2877 +
2878 + nand-ecc-strength = <4>;
2879 + nand-bus-width = <8>;
2880 +
2881 + #address-cells = <1>;
2882 + #size-cells = <1>;
2883 +
2884 + qcadata@0 {
2885 + label = "qcadata";
2886 + reg = <0x0000000 0x0c80000>;
2887 + read-only;
2888 + };
2889 +
2890 + APPSBL@c80000 {
2891 + label = "APPSBL";
2892 + reg = <0x0c80000 0x0500000>;
2893 + read-only;
2894 + };
2895 +
2896 + APPSBLENV@1180000 {
2897 + label = "APPSBLENV";
2898 + reg = <0x1180000 0x0080000>;
2899 + read-only;
2900 + };
2901 +
2902 + art: art@1200000 {
2903 + label = "art";
2904 + reg = <0x1200000 0x0140000>;
2905 + read-only;
2906 + };
2907 +
2908 + kernel@1340000 {
2909 + label = "kernel";
2910 + reg = <0x1340000 0x0200000>;
2911 + };
2912 +
2913 + ubi@1540000 {
2914 + label = "ubi";
2915 + reg = <0x1540000 0x1800000>;
2916 + };
2917 +
2918 + netgear@2d40000 {
2919 + label = "netgear";
2920 + reg = <0x2d40000 0x0c00000>;
2921 + read-only;
2922 + };
2923 +
2924 + reserve@3940000 {
2925 + label = "reserve";
2926 + reg = <0x3940000 0x46c0000>;
2927 + read-only;
2928 + };
2929 +
2930 + firmware@1340000 {
2931 + label = "firmware";
2932 + reg = <0x1340000 0x1a00000>;
2933 + };
2934 +
2935 + };
2936 +
2937 + mdio0: mdio {
2938 + compatible = "virtual,mdio-gpio";
2939 + #address-cells = <1>;
2940 + #size-cells = <0>;
2941 + gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH &qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
2942 + pinctrl-0 = <&mdio0_pins>;
2943 + pinctrl-names = "default";
2944 +
2945 + phy0: ethernet-phy@0 {
2946 + device_type = "ethernet-phy";
2947 + reg = <0>;
2948 + qca,ar8327-initvals = <
2949 + 0x00004 0x7600000 /* PAD0_MODE */
2950 + 0x00008 0x1000000 /* PAD5_MODE */
2951 + 0x0000c 0x80 /* PAD6_MODE */
2952 + 0x000e4 0x6a545 /* MAC_POWER_SEL */
2953 + 0x000e0 0xc74164de /* SGMII_CTRL */
2954 + 0x0007c 0x4e /* PORT0_STATUS */
2955 + 0x00094 0x4e /* PORT6_STATUS */
2956 + >;
2957 + };
2958 +
2959 + phy4: ethernet-phy@4 {
2960 + device_type = "ethernet-phy";
2961 + reg = <4>;
2962 + };
2963 + };
2964 +
2965 + gmac1: ethernet@37200000 {
2966 + status = "ok";
2967 + phy-mode = "rgmii";
2968 + qcom,id = <1>;
2969 +
2970 + pinctrl-0 = <&rgmii2_pins>;
2971 + pinctrl-names = "default";
2972 +
2973 + mtd-mac-address = <&art 6>;
2974 +
2975 + fixed-link {
2976 + speed = <1000>;
2977 + full-duplex;
2978 + };
2979 + };
2980 +
2981 + gmac2: ethernet@37400000 {
2982 + status = "ok";
2983 + phy-mode = "sgmii";
2984 + qcom,id = <2>;
2985 +
2986 + mtd-mac-address = <&art 0>;
2987 +
2988 + fixed-link {
2989 + speed = <1000>;
2990 + full-duplex;
2991 + };
2992 + };
2993 +
2994 + rpm@108000 {
2995 + pinctrl-0 = <&i2c4_pins>;
2996 + pinctrl-names = "default";
2997 + };
2998 + };
2999 +
3000 + gpio-keys {
3001 + compatible = "gpio-keys";
3002 + pinctrl-0 = <&button_pins>;
3003 + pinctrl-names = "default";
3004 +
3005 + wifi {
3006 + label = "wifi";
3007 + gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
3008 + linux,code = <KEY_RFKILL>;
3009 + };
3010 +
3011 + reset {
3012 + label = "reset";
3013 + gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
3014 + linux,code = <KEY_RESTART>;
3015 + };
3016 +
3017 + wps {
3018 + label = "wps";
3019 + gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
3020 + linux,code = <KEY_WPS_BUTTON>;
3021 + };
3022 + };
3023 +
3024 + gpio-leds {
3025 + compatible = "gpio-leds";
3026 + pinctrl-0 = <&led_pins>;
3027 + pinctrl-names = "default";
3028 +
3029 + usb1 {
3030 + label = "r7500:white:usb1";
3031 + gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
3032 + };
3033 +
3034 + usb2 {
3035 + label = "r7500:white:usb2";
3036 + gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
3037 + };
3038 +
3039 + power_amber: power_amber {
3040 + label = "r7500:amber:power";
3041 + gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
3042 + };
3043 +
3044 + wan_white {
3045 + label = "r7500:white:wan";
3046 + gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>;
3047 + };
3048 +
3049 + wan_amber {
3050 + label = "r7500:amber:wan";
3051 + gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>;
3052 + };
3053 +
3054 + wps {
3055 + label = "r7500:white:wps";
3056 + gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>;
3057 + };
3058 +
3059 + esata {
3060 + label = "r7500:white:esata";
3061 + gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>;
3062 + };
3063 +
3064 + power_white: power_white {
3065 + label = "r7500:white:power";
3066 + gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
3067 + default-state = "keep";
3068 + };
3069 +
3070 + wifi {
3071 + label = "r7500:white:wifi";
3072 + gpios = <&qcom_pinmux 64 GPIO_ACTIVE_HIGH>;
3073 + };
3074 + };
3075 +};
3076 +
3077 +&adm_dma {
3078 + status = "ok";
3079 +};
3080 --- /dev/null
3081 +++ b/arch/arm/boot/dts/qcom-ipq8064-r7500v2.dts
3082 @@ -0,0 +1,416 @@
3083 +#include "qcom-ipq8064-v1.0.dtsi"
3084 +
3085 +#include <dt-bindings/input/input.h>
3086 +
3087 +/ {
3088 + model = "Netgear Nighthawk X4 R7500v2";
3089 + compatible = "netgear,r7500v2", "qcom,ipq8064";
3090 +
3091 + memory@0 {
3092 + reg = <0x42000000 0x1e000000>;
3093 + device_type = "memory";
3094 + };
3095 +
3096 + reserved-memory {
3097 + #address-cells = <1>;
3098 + #size-cells = <1>;
3099 + ranges;
3100 + rsvd@41200000 {
3101 + reg = <0x41200000 0x300000>;
3102 + no-map;
3103 + };
3104 +
3105 + rsvd@5fe00000 {
3106 + reg = <0x5fe00000 0x200000>;
3107 + reusable;
3108 + };
3109 + };
3110 +
3111 + aliases {
3112 + serial0 = &uart4;
3113 + mdio-gpio0 = &mdio0;
3114 +
3115 + led-boot = &power;
3116 + led-failsafe = &power;
3117 + led-running = &power;
3118 + led-upgrade = &power;
3119 + };
3120 +
3121 + chosen {
3122 + bootargs = "rootfstype=squashfs noinitrd";
3123 + linux,stdout-path = "serial0:115200n8";
3124 + };
3125 +
3126 + soc {
3127 + pinmux@800000 {
3128 + button_pins: button_pins {
3129 + mux {
3130 + pins = "gpio6", "gpio54", "gpio65";
3131 + function = "gpio";
3132 + drive-strength = <2>;
3133 + bias-pull-up;
3134 + };
3135 + };
3136 +
3137 + i2c4_pins: i2c4_pinmux {
3138 + mux {
3139 + pins = "gpio12", "gpio13";
3140 + function = "gsbi4";
3141 + drive-strength = <12>;
3142 + bias-disable;
3143 + };
3144 + };
3145 +
3146 + led_pins: led_pins {
3147 + mux {
3148 + pins = "gpio7", "gpio8", "gpio9", "gpio22", "gpio23",
3149 + "gpio24","gpio26", "gpio53", "gpio64";
3150 + function = "gpio";
3151 + drive-strength = <2>;
3152 + bias-pull-up;
3153 + };
3154 + };
3155 +
3156 + mdio0_pins: mdio0_pins {
3157 + mux {
3158 + pins = "gpio0", "gpio1";
3159 + function = "gpio";
3160 + drive-strength = <8>;
3161 + bias-disable;
3162 + };
3163 + };
3164 +
3165 + nand_pins: nand_pins {
3166 + mux {
3167 + pins = "gpio34", "gpio35", "gpio36",
3168 + "gpio37", "gpio38", "gpio39",
3169 + "gpio40", "gpio41", "gpio42",
3170 + "gpio43", "gpio44", "gpio45",
3171 + "gpio46", "gpio47";
3172 + function = "nand";
3173 + drive-strength = <10>;
3174 + bias-disable;
3175 + };
3176 + pullups {
3177 + pins = "gpio39";
3178 + bias-pull-up;
3179 + };
3180 + hold {
3181 + pins = "gpio40", "gpio41", "gpio42",
3182 + "gpio43", "gpio44", "gpio45",
3183 + "gpio46", "gpio47";
3184 + bias-bus-hold;
3185 + };
3186 + };
3187 +
3188 + rgmii2_pins: rgmii2_pins {
3189 + mux {
3190 + pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32",
3191 + "gpio51", "gpio52", "gpio59", "gpio60", "gpio61", "gpio62" ;
3192 + function = "rgmii2";
3193 + drive-strength = <8>;
3194 + bias-disable;
3195 + };
3196 + };
3197 +
3198 + usb0_pwr_en_pins: usb0_pwr_en_pins {
3199 + mux {
3200 + pins = "gpio15";
3201 + function = "gpio";
3202 + drive-strength = <12>;
3203 + bias-pull-down;
3204 + output-high;
3205 + };
3206 + };
3207 +
3208 + usb1_pwr_en_pins: usb1_pwr_en_pins {
3209 + mux {
3210 + pins = "gpio16", "gpio68";
3211 + function = "gpio";
3212 + drive-strength = <12>;
3213 + bias-pull-down;
3214 + output-high;
3215 + };
3216 + };
3217 + };
3218 +
3219 + gsbi@16300000 {
3220 + qcom,mode = <GSBI_PROT_I2C_UART>;
3221 + status = "ok";
3222 + serial@16340000 {
3223 + status = "ok";
3224 + };
3225 + /*
3226 + * The i2c device on gsbi4 should not be enabled.
3227 + * On ipq806x designs gsbi4 i2c is meant for exclusive
3228 + * RPM usage. Turning this on in kernel manifests as
3229 + * i2c failure for the RPM.
3230 + */
3231 + };
3232 +
3233 + sata-phy@1b400000 {
3234 + status = "ok";
3235 + };
3236 +
3237 + sata@29000000 {
3238 + status = "ok";
3239 + };
3240 +
3241 + phy@100f8800 { /* USB3 port 1 HS phy */
3242 + status = "ok";
3243 + };
3244 +
3245 + phy@100f8830 { /* USB3 port 1 SS phy */
3246 + status = "ok";
3247 + };
3248 +
3249 + phy@110f8800 { /* USB3 port 0 HS phy */
3250 + status = "ok";
3251 + };
3252 +
3253 + phy@110f8830 { /* USB3 port 0 SS phy */
3254 + status = "ok";
3255 + };
3256 +
3257 + usb30@0 {
3258 + status = "ok";
3259 +
3260 + pinctrl-0 = <&usb0_pwr_en_pins>;
3261 + pinctrl-names = "default";
3262 + };
3263 +
3264 + usb30@1 {
3265 + status = "ok";
3266 +
3267 + pinctrl-0 = <&usb1_pwr_en_pins>;
3268 + pinctrl-names = "default";
3269 + };
3270 +
3271 + pcie0: pci@1b500000 {
3272 + status = "ok";
3273 + reset-gpio = <&qcom_pinmux 3 GPIO_ACTIVE_LOW>;
3274 + pinctrl-0 = <&pcie0_pins>;
3275 + pinctrl-names = "default";
3276 + };
3277 +
3278 + pcie1: pci@1b700000 {
3279 + status = "ok";
3280 + reset-gpio = <&qcom_pinmux 48 GPIO_ACTIVE_LOW>;
3281 + pinctrl-0 = <&pcie1_pins>;
3282 + pinctrl-names = "default";
3283 + };
3284 +
3285 + nand@1ac00000 {
3286 + status = "ok";
3287 +
3288 + pinctrl-0 = <&nand_pins>;
3289 + pinctrl-names = "default";
3290 +
3291 + nand-ecc-strength = <4>;
3292 + nand-bus-width = <8>;
3293 +
3294 + #address-cells = <1>;
3295 + #size-cells = <1>;
3296 +
3297 + qcadata@0 {
3298 + label = "qcadata";
3299 + reg = <0x0000000 0x0c80000>;
3300 + read-only;
3301 + };
3302 +
3303 + APPSBL@c80000 {
3304 + label = "APPSBL";
3305 + reg = <0x0c80000 0x0500000>;
3306 + read-only;
3307 + };
3308 +
3309 + APPSBLENV@1180000 {
3310 + label = "APPSBLENV";
3311 + reg = <0x1180000 0x0080000>;
3312 + read-only;
3313 + };
3314 +
3315 + art: art@1200000 {
3316 + label = "art";
3317 + reg = <0x1200000 0x0140000>;
3318 + read-only;
3319 + };
3320 +
3321 + artbak: art@1340000 {
3322 + label = "artbak";
3323 + reg = <0x1340000 0x0140000>;
3324 + read-only;
3325 + };
3326 +
3327 + kernel@1480000 {
3328 + label = "kernel";
3329 + reg = <0x1480000 0x0200000>;
3330 + };
3331 +
3332 + ubi@1680000 {
3333 + label = "ubi";
3334 + reg = <0x1680000 0x1E00000>;
3335 + };
3336 +
3337 + netgear@3480000 {
3338 + label = "netgear";
3339 + reg = <0x3480000 0x4480000>;
3340 + read-only;
3341 + };
3342 +
3343 + reserve@7900000 {
3344 + label = "reserve";
3345 + reg = <0x7900000 0x0700000>;
3346 + read-only;
3347 + };
3348 +
3349 + firmware@1480000 {
3350 + label = "firmware";
3351 + reg = <0x1480000 0x2000000>;
3352 + };
3353 +
3354 + };
3355 +
3356 + mdio0: mdio {
3357 + compatible = "virtual,mdio-gpio";
3358 + #address-cells = <1>;
3359 + #size-cells = <0>;
3360 + gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH &qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
3361 + pinctrl-0 = <&mdio0_pins>;
3362 + pinctrl-names = "default";
3363 +
3364 + phy0: ethernet-phy@0 {
3365 + device_type = "ethernet-phy";
3366 + reg = <0>;
3367 + qca,ar8327-initvals = <
3368 + 0x00004 0x7600000 /* PAD0_MODE */
3369 + 0x00008 0x1000000 /* PAD5_MODE */
3370 + 0x0000c 0x80 /* PAD6_MODE */
3371 + 0x000e4 0xaa545 /* MAC_POWER_SEL */
3372 + 0x000e0 0xc74164de /* SGMII_CTRL */
3373 + 0x0007c 0x4e /* PORT0_STATUS */
3374 + 0x00094 0x4e /* PORT6_STATUS */
3375 + >;
3376 + };
3377 +
3378 + phy4: ethernet-phy@4 {
3379 + device_type = "ethernet-phy";
3380 + reg = <4>;
3381 + };
3382 + };
3383 +
3384 + gmac1: ethernet@37200000 {
3385 + status = "ok";
3386 + phy-mode = "rgmii";
3387 + qcom,id = <1>;
3388 +
3389 + pinctrl-0 = <&rgmii2_pins>;
3390 + pinctrl-names = "default";
3391 +
3392 + mtd-mac-address = <&art 6>;
3393 +
3394 + fixed-link {
3395 + speed = <1000>;
3396 + full-duplex;
3397 + };
3398 + };
3399 +
3400 + gmac2: ethernet@37400000 {
3401 + status = "ok";
3402 + phy-mode = "sgmii";
3403 + qcom,id = <2>;
3404 +
3405 + mtd-mac-address = <&art 0>;
3406 +
3407 + fixed-link {
3408 + speed = <1000>;
3409 + full-duplex;
3410 + };
3411 + };
3412 +
3413 + rpm@108000 {
3414 + pinctrl-0 = <&i2c4_pins>;
3415 + pinctrl-names = "default";
3416 + };
3417 + };
3418 +
3419 + gpio-keys {
3420 + compatible = "gpio-keys";
3421 + pinctrl-0 = <&button_pins>;
3422 + pinctrl-names = "default";
3423 +
3424 + wifi {
3425 + label = "wifi";
3426 + gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
3427 + linux,code = <KEY_RFKILL>;
3428 + };
3429 +
3430 + reset {
3431 + label = "reset";
3432 + gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
3433 + linux,code = <KEY_RESTART>;
3434 + };
3435 +
3436 + wps {
3437 + label = "wps";
3438 + gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
3439 + linux,code = <KEY_WPS_BUTTON>;
3440 + };
3441 + };
3442 +
3443 + gpio-leds {
3444 + compatible = "gpio-leds";
3445 + pinctrl-0 = <&led_pins>;
3446 + pinctrl-names = "default";
3447 +
3448 + usb1 {
3449 + label = "r7500v2:amber:usb1";
3450 + gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
3451 + };
3452 +
3453 + usb3 {
3454 + label = "r7500v2:amber:usb3";
3455 + gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
3456 + };
3457 +
3458 + status {
3459 + label = "r7500v2:amber:status";
3460 + gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
3461 + };
3462 +
3463 + internet {
3464 + label = "r7500v2:white:internet";
3465 + gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>;
3466 + };
3467 +
3468 + wan {
3469 + label = "r7500v2:white:wan";
3470 + gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>;
3471 + };
3472 +
3473 + wps {
3474 + label = "r7500v2:white:wps";
3475 + gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>;
3476 + };
3477 +
3478 + esata {
3479 + label = "r7500v2:white:esata";
3480 + gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>;
3481 + };
3482 +
3483 + power: power {
3484 + label = "r7500v2:white:power";
3485 + gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
3486 + default-state = "keep";
3487 + };
3488 +
3489 + wifi {
3490 + label = "r7500v2:white:wifi";
3491 + gpios = <&qcom_pinmux 64 GPIO_ACTIVE_HIGH>;
3492 + };
3493 + };
3494 +};
3495 +
3496 +&adm_dma {
3497 + status = "ok";
3498 +};
3499 --- /dev/null
3500 +++ b/arch/arm/boot/dts/qcom-ipq8064-vr2600v.dts
3501 @@ -0,0 +1,425 @@
3502 +#include "qcom-ipq8064-v1.0.dtsi"
3503 +
3504 +#include <dt-bindings/input/input.h>
3505 +
3506 +/ {
3507 + model = "TP-Link Archer VR2600v";
3508 + compatible = "tplink,vr2600v", "qcom,ipq8064";
3509 +
3510 + memory@0 {
3511 + reg = <0x42000000 0x1e000000>;
3512 + device_type = "memory";
3513 + };
3514 +
3515 + reserved-memory {
3516 + #address-cells = <1>;
3517 + #size-cells = <1>;
3518 + ranges;
3519 + rsvd@41200000 {
3520 + reg = <0x41200000 0x300000>;
3521 + no-map;
3522 + };
3523 + };
3524 +
3525 + aliases {
3526 + serial0 = &uart4;
3527 + mdio-gpio0 = &mdio0;
3528 +
3529 + led-boot = &power;
3530 + led-failsafe = &general;
3531 + led-running = &power;
3532 + led-upgrade = &general;
3533 + };
3534 +
3535 + chosen {
3536 + linux,stdout-path = "serial0:115200n8";
3537 + };
3538 +
3539 + soc {
3540 + pinmux@800000 {
3541 + led_pins: led_pins {
3542 + mux {
3543 + pins = "gpio7", "gpio8", "gpio9", "gpio16", "gpio17",
3544 + "gpio26", "gpio53", "gpio56", "gpio66";
3545 + function = "gpio";
3546 + drive-strength = <2>;
3547 + bias-pull-up;
3548 + };
3549 + };
3550 +
3551 + i2c4_pins: i2c4_pinmux {
3552 + mux {
3553 + pins = "gpio12", "gpio13";
3554 + function = "gsbi4";
3555 + drive-strength = <12>;
3556 + bias-disable;
3557 + };
3558 + };
3559 +
3560 + button_pins: button_pins {
3561 + mux {
3562 + pins = "gpio54", "gpio64", "gpio65", "gpio67", "gpio68";
3563 + function = "gpio";
3564 + drive-strength = <2>;
3565 + bias-pull-up;
3566 + };
3567 + };
3568 +
3569 + spi_pins: spi_pins {
3570 + mux {
3571 + pins = "gpio18", "gpio19", "gpio21";
3572 + function = "gsbi5";
3573 + bias-pull-down;
3574 + };
3575 +
3576 + data {
3577 + pins = "gpio18", "gpio19";
3578 + drive-strength = <10>;
3579 + };
3580 +
3581 + cs {
3582 + pins = "gpio20";
3583 + drive-strength = <10>;
3584 + bias-pull-up;
3585 + };
3586 +
3587 + clk {
3588 + pins = "gpio21";
3589 + drive-strength = <12>;
3590 + };
3591 + };
3592 +
3593 + mdio0_pins: mdio0_pins {
3594 + mux {
3595 + pins = "gpio0", "gpio1";
3596 + function = "gpio";
3597 + drive-strength = <8>;
3598 + bias-disable;
3599 + };
3600 + };
3601 +
3602 + rgmii2_pins: rgmii2_pins {
3603 + mux {
3604 + pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32",
3605 + "gpio51", "gpio52", "gpio59", "gpio60", "gpio61", "gpio62" ;
3606 + function = "rgmii2";
3607 + drive-strength = <8>;
3608 + bias-disable;
3609 + };
3610 + };
3611 + };
3612 +
3613 + gsbi@16300000 {
3614 + qcom,mode = <GSBI_PROT_I2C_UART>;
3615 + status = "ok";
3616 + serial@16340000 {
3617 + status = "ok";
3618 + };
3619 + /*
3620 + * The i2c device on gsbi4 should not be enabled.
3621 + * On ipq806x designs gsbi4 i2c is meant for exclusive
3622 + * RPM usage. Turning this on in kernel manifests as
3623 + * i2c failure for the RPM.
3624 + */
3625 + };
3626 +
3627 + gsbi5: gsbi@1a200000 {
3628 + qcom,mode = <GSBI_PROT_SPI>;
3629 + status = "ok";
3630 +
3631 + spi4: spi@1a280000 {
3632 + status = "ok";
3633 +
3634 + pinctrl-0 = <&spi_pins>;
3635 + pinctrl-names = "default";
3636 +
3637 + cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
3638 +
3639 + flash: W25Q128@0 {
3640 + compatible = "jedec,spi-nor";
3641 + #address-cells = <1>;
3642 + #size-cells = <1>;
3643 + spi-max-frequency = <50000000>;
3644 + reg = <0>;
3645 +
3646 + SBL1@0 {
3647 + label = "SBL1";
3648 + reg = <0x0 0x20000>;
3649 + read-only;
3650 + };
3651 +
3652 + MIBIB@20000 {
3653 + label = "MIBIB";
3654 + reg = <0x20000 0x20000>;
3655 + read-only;
3656 + };
3657 +
3658 + SBL2@40000 {
3659 + label = "SBL2";
3660 + reg = <0x40000 0x40000>;
3661 + read-only;
3662 + };
3663 +
3664 + SBL3@80000 {
3665 + label = "SBL3";
3666 + reg = <0x80000 0x80000>;
3667 + read-only;
3668 + };
3669 +
3670 + DDRCONFIG@100000 {
3671 + label = "DDRCONFIG";
3672 + reg = <0x100000 0x10000>;
3673 + read-only;
3674 + };
3675 +
3676 + SSD@110000 {
3677 + label = "SSD";
3678 + reg = <0x110000 0x10000>;
3679 + read-only;
3680 + };
3681 +
3682 + TZ@120000 {
3683 + label = "TZ";
3684 + reg = <0x120000 0x80000>;
3685 + read-only;
3686 + };
3687 +
3688 + RPM@1a0000 {
3689 + label = "RPM";
3690 + reg = <0x1a0000 0x80000>;
3691 + read-only;
3692 + };
3693 +
3694 + APPSBL@220000 {
3695 + label = "APPSBL";
3696 + reg = <0x220000 0x80000>;
3697 + read-only;