target/linux/ixp4xx/patches-3.3/000-adjust_virtual_addresses.patch

   1 The current fixed physical/virtual mappings for the internal peripherals
   2 of the ixp4xx SoC devices is using a virtual address outside of the vmalloc
   3 region. This results in kernel warnings like this on the boot console:
   4
   5   BUG: mapping for 0xc8000000 at 0xffbeb000 out of vmalloc space
   6   BUG: mapping for 0xc4000000 at 0xffbfe000 out of vmalloc space
   7   BUG: mapping for 0xc0000000 at 0xffbff000 out of vmalloc space
   8
   9 The virtual kernel memory layout lists this for the vmalloc region:
  10
  11     ...
  12     vmalloc : 0xc2800000 - 0xff000000   ( 968 MB)
  13     ...
  14
  15 With a little adjustment to the virtual address used we can map these
  16 internal devices in the vmalloc region.
  17
  18 Signed-off-by: Greg Ungerer <gerg@uclinux.org>
  19
  20 ---
  21 arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h |   14 +++++++-------
  22  1 files changed, 7 insertions(+), 7 deletions(-)
  23
  24 diff --git a/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h b/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h
  25 index 97c530f..ad66605 100644
  26 --- a/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h
  27 +++ b/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h
  28 @@ -32,11 +32,11 @@
  29   *
  30   * 0x6000000   0x00004000      ioremap'd       QMgr
  31   *
  32 - * 0xC0000000  0x00001000      0xffbff000      PCI CFG
  33 + * 0xC0000000  0x00001000      0xfebff000      PCI CFG
  34   *
  35 - * 0xC4000000  0x00001000      0xffbfe000      EXP CFG
  36 + * 0xC4000000  0x00001000      0xfebfe000      EXP CFG
  37   *
  38 - * 0xC8000000  0x00013000      0xffbeb000      On-Chip Peripherals
  39 + * 0xC8000000  0x00013000      0xfebeb000      On-Chip Peripherals
  40   */
  41
  42  /*
  43 @@ -49,21 +49,21 @@
  44   * Expansion BUS Configuration registers
  45   */
  46  #define IXP4XX_EXP_CFG_BASE_PHYS       (0xC4000000)
  47 -#define IXP4XX_EXP_CFG_BASE_VIRT       (0xFFBFE000)
  48 +#define IXP4XX_EXP_CFG_BASE_VIRT       (0xFEBFE000)
  49  #define IXP4XX_EXP_CFG_REGION_SIZE     (0x00001000)
  50
  51  /*
  52   * PCI Config registers
  53   */
  54  #define IXP4XX_PCI_CFG_BASE_PHYS       (0xC0000000)
  55 -#define        IXP4XX_PCI_CFG_BASE_VIRT        (0xFFBFF000)
  56 +#define        IXP4XX_PCI_CFG_BASE_VIRT        (0xFEBFF000)
  57  #define IXP4XX_PCI_CFG_REGION_SIZE     (0x00001000)
  58
  59  /*
  60   * Peripheral space
  61   */
  62  #define IXP4XX_PERIPHERAL_BASE_PHYS    (0xC8000000)
  63 -#define IXP4XX_PERIPHERAL_BASE_VIRT    (0xFFBEB000)
  64 +#define IXP4XX_PERIPHERAL_BASE_VIRT    (0xFEBEB000)
  65  #define IXP4XX_PERIPHERAL_REGION_SIZE  (0x00013000)
  66
  67  /*
  68 @@ -73,7 +73,7 @@
  69   * aligned so that it * can be used with the low-level debug code.
  70   */
  71  #define        IXP4XX_DEBUG_UART_BASE_PHYS     (0xC8000000)
  72 -#define        IXP4XX_DEBUG_UART_BASE_VIRT     (0xffb00000)
  73 +#define        IXP4XX_DEBUG_UART_BASE_VIRT     (0xfeb00000)
  74  #define        IXP4XX_DEBUG_UART_REGION_SIZE   (0x00001000)
  75
  76  #define IXP4XX_EXP_CS0_OFFSET  0x00