target/linux/kirkwood/patches-5.4/001-ARM-dts-kirkwood-Add-Check-Point-L-50-board.patch

   1 From efa968c18abab78c5e0c40a853caf286c3629a59 Mon Sep 17 00:00:00 2001
   2 From: Pawel Dembicki <paweldembicki@gmail.com>
   3 Date: Tue, 17 Mar 2020 21:28:01 +0100
   4 Subject: [PATCH v3] ARM: dts: kirkwood: Add Check Point L-50 board
   5
   6 This patch adds dts for the Check Point L-50 from 600/1100 series
   7 routers.
   8
   9 Specification:
  10 -CPU: Marvell Kirkwood 88F6821 1200MHz
  11 -RAM: 512MB
  12 -Flash: NAND 512MB
  13 -WiFi: mPCIe card based on Atheros AR9287 b/g/n
  14 -WAN: 1 Gigabit Port (Marvell 88E1116R PHY)
  15 -LAN: 9 Gigabit Ports (2x Marvell 88E6171(5+3))
  16 -USB: 2x USB2.0
  17 -Express card slot
  18 -SD card slot
  19 -Serial console: RJ-45 115200 8n1
  20 -Unsupported DSL
  21
  22 Reviewed-by: Andrew Lunn <andrew@lunn.ch>
  23 Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
  24 ---
  25 Changes in v3:
  26 - fix typo and code style issues pointed by OpenWrt guys
  27 Changes in v2:
  28 - none
  29
  30  arch/arm/boot/dts/Makefile          |   1 +
  31  arch/arm/boot/dts/kirkwood-l-50.dts | 438 ++++++++++++++++++++++++++++
  32  2 files changed, 439 insertions(+)
  33  create mode 100644 arch/arm/boot/dts/kirkwood-l-50.dts
  34
  35 --- a/arch/arm/boot/dts/Makefile
  36 +++ b/arch/arm/boot/dts/Makefile
  37 @@ -270,6 +270,7 @@ dtb-$(CONFIG_MACH_KIRKWOOD) += \
  38         kirkwood-iomega_ix2_200.dtb \
  39         kirkwood-is2.dtb \
  40         kirkwood-km_kirkwood.dtb \
  41 +       kirkwood-l-50.dtb \
  42         kirkwood-laplug.dtb \
  43         kirkwood-linkstation-lsqvl.dtb \
  44         kirkwood-linkstation-lsvl.dtb \
  45 --- /dev/null
  46 +++ b/arch/arm/boot/dts/kirkwood-l-50.dts
  47 @@ -0,0 +1,438 @@
  48 +// SPDX-License-Identifier: GPL-2.0
  49 +/*
  50 + * Check Point L-50 Board Description
  51 + * Copyright 2020 Pawel Dembicki <paweldembicki@gmail.com>
  52 + */
  53 +
  54 +/dts-v1/;
  55 +
  56 +#include "kirkwood.dtsi"
  57 +#include "kirkwood-6281.dtsi"
  58 +
  59 +/ {
  60 +       model = "Check Point L-50";
  61 +       compatible = "checkpoint,l-50", "marvell,kirkwood-88f6281", "marvell,kirkwood";
  62 +
  63 +       memory {
  64 +               device_type = "memory";
  65 +               reg = <0x00000000 0x20000000>;
  66 +       };
  67 +
  68 +       chosen {
  69 +               bootargs = "console=ttyS0,115200n8";
  70 +               stdout-path = &uart0;
  71 +       };
  72 +
  73 +       ocp@f1000000 {
  74 +               pinctrl: pin-controller@10000 {
  75 +                       pinctrl-0 = <&pmx_led38 &pmx_sysrst &pmx_button29>;
  76 +                       pinctrl-names = "default";
  77 +
  78 +                       pmx_sysrst: pmx-sysrst {
  79 +                               marvell,pins = "mpp6";
  80 +                               marvell,function = "sysrst";
  81 +                       };
  82 +
  83 +                       pmx_button29: pmx_button29 {
  84 +                               marvell,pins = "mpp29";
  85 +                               marvell,function = "gpio";
  86 +                       };
  87 +
  88 +                       pmx_led38: pmx_led38 {
  89 +                               marvell,pins = "mpp38";
  90 +                               marvell,function = "gpio";
  91 +                       };
  92 +
  93 +                       pmx_sdio_cd: pmx-sdio-cd {
  94 +                               marvell,pins = "mpp46";
  95 +                               marvell,function = "gpio";
  96 +                       };
  97 +               };
  98 +
  99 +               serial@12000 {
 100 +                       status = "okay";
 101 +               };
 102 +
 103 +               mvsdio@90000 {
 104 +                       status = "okay";
 105 +                       cd-gpios = <&gpio1 14 9>;
 106 +               };
 107 +
 108 +               i2c@11000 {
 109 +                       status = "okay";
 110 +                       clock-frequency = <400000>;
 111 +
 112 +                       gpio2: gpio-expander@20{
 113 +                               #gpio-cells = <2>;
 114 +                               #interrupt-cells = <2>;
 115 +                               compatible = "semtech,sx1505q";
 116 +                               reg = <0x20>;
 117 +
 118 +                               gpio-controller;
 119 +                       };
 120 +
 121 +                       /* Three GPIOs from 0x21 exp. are undescribed in dts:
 122 +                        * 1: DSL module reset (active low)
 123 +                        * 5: mPCIE reset (active low)
 124 +                        * 6: Express card reset (active low)
 125 +                        */
 126 +                       gpio3: gpio-expander@21{
 127 +                               #gpio-cells = <2>;
 128 +                               #interrupt-cells = <2>;
 129 +                               compatible = "semtech,sx1505q";
 130 +                               reg = <0x21>;
 131 +
 132 +                               gpio-controller;
 133 +                       };
 134 +
 135 +                       rtc@30 {
 136 +                               compatible = "s35390a";
 137 +                               reg = <0x30>;
 138 +                       };
 139 +               };
 140 +       };
 141 +
 142 +       leds {
 143 +               compatible = "gpio-leds";
 144 +
 145 +               status_green {
 146 +                       label = "l-50:green:status";
 147 +                       gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
 148 +               };
 149 +
 150 +               status_red {
 151 +                       label = "l-50:red:status";
 152 +                       gpios = <&gpio3 2 GPIO_ACTIVE_LOW>;
 153 +               };
 154 +
 155 +               wifi {
 156 +                       label = "l-50:green:wifi";
 157 +                       gpios = <&gpio2 7 GPIO_ACTIVE_LOW>;
 158 +                       linux,default-trigger = "phy0tpt";
 159 +               };
 160 +
 161 +               internet_green {
 162 +                       label = "l-50:green:internet";
 163 +                       gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
 164 +               };
 165 +
 166 +               internet_red {
 167 +                       label = "l-50:red:internet";
 168 +                       gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
 169 +               };
 170 +
 171 +               usb1_green {
 172 +                       label = "l-50:green:usb1";
 173 +                       gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
 174 +                       linux,default-trigger = "usbport";
 175 +                       trigger-sources = <&hub_port3>;
 176 +               };
 177 +
 178 +               usb1_red {
 179 +                       label = "l-50:red:usb1";
 180 +                       gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
 181 +               };
 182 +
 183 +               usb2_green {
 184 +                       label = "l-50:green:usb2";
 185 +                       gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
 186 +                       linux,default-trigger = "usbport";
 187 +                       trigger-sources = <&hub_port1>;
 188 +               };
 189 +
 190 +               usb2_red {
 191 +                       label = "l-50:red:usb2";
 192 +                       gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;
 193 +               };
 194 +       };
 195 +
 196 +       usb2_pwr {
 197 +               compatible = "regulator-fixed";
 198 +               regulator-name = "usb2_pwr";
 199 +
 200 +               regulator-min-microvolt = <5000000>;
 201 +               regulator-max-microvolt = <5000000>;
 202 +               gpio = <&gpio3 3 GPIO_ACTIVE_LOW>;
 203 +               regulator-always-on;
 204 +       };
 205 +
 206 +       usb1_pwr {
 207 +               compatible = "regulator-fixed";
 208 +               regulator-name = "usb1_pwr";
 209 +
 210 +               regulator-min-microvolt = <5000000>;
 211 +               regulator-max-microvolt = <5000000>;
 212 +               gpio = <&gpio3 4 GPIO_ACTIVE_LOW>;
 213 +               regulator-always-on;
 214 +       };
 215 +
 216 +       mpcie_pwr {
 217 +               compatible = "regulator-fixed";
 218 +               regulator-name = "mpcie_pwr";
 219 +
 220 +               regulator-min-microvolt = <3300000>;
 221 +               regulator-max-microvolt = <3300000>;
 222 +               gpio = <&gpio3 5 GPIO_ACTIVE_HIGH>;
 223 +               enable-active-high;
 224 +               regulator-always-on;
 225 +       };
 226 +
 227 +       express_card_pwr {
 228 +               compatible = "regulator-fixed";
 229 +               regulator-name = "express_card_pwr";
 230 +
 231 +               regulator-min-microvolt = <3300000>;
 232 +               regulator-max-microvolt = <3300000>;
 233 +               gpio = <&gpio3 7 GPIO_ACTIVE_HIGH>;
 234 +               enable-active-high;
 235 +               regulator-always-on;
 236 +       };
 237 +
 238 +       keys {
 239 +               compatible = "gpio-keys";
 240 +
 241 +               factory_defaults {
 242 +                       label = "factory_defaults";
 243 +                       gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
 244 +                       linux,code = <KEY_RESTART>;
 245 +               };
 246 +       };
 247 +};
 248 +
 249 +&mdio {
 250 +       status = "okay";
 251 +
 252 +       ethphy8: ethernet-phy@8 {
 253 +               reg = <0x08>;
 254 +       };
 255 +
 256 +       switch0: switch@10 {
 257 +               compatible = "marvell,mv88e6085";
 258 +               #address-cells = <1>;
 259 +               #size-cells = <0>;
 260 +               reg = <0x10>;
 261 +               dsa,member = <0 0>;
 262 +
 263 +               ports {
 264 +                       #address-cells = <1>;
 265 +                       #size-cells = <0>;
 266 +
 267 +                       port@0 {
 268 +                               reg = <0>;
 269 +                               label = "lan5";
 270 +                       };
 271 +
 272 +                       port@1 {
 273 +                              reg = <1>;
 274 +                              label = "lan1";
 275 +                       };
 276 +
 277 +                       port@2 {
 278 +                              reg = <2>;
 279 +                              label = "lan6";
 280 +                       };
 281 +
 282 +                       port@3 {
 283 +                              reg = <3>;
 284 +                              label = "lan2";
 285 +                       };
 286 +
 287 +                       port@4 {
 288 +                               reg = <4>;
 289 +                               label = "lan7";
 290 +                       };
 291 +
 292 +                       switch0port5: port@5 {
 293 +                               reg = <5>;
 294 +                               phy-mode = "rgmii-txid";
 295 +                               link = <&switch1port5>;
 296 +                               fixed-link {
 297 +                                       speed = <1000>;
 298 +                                       full-duplex;
 299 +                               };
 300 +                       };
 301 +
 302 +                       port@6 {
 303 +                               reg = <6>;
 304 +                               label = "cpu";
 305 +                               phy-mode = "rgmii-id";
 306 +                               ethernet = <&eth1port>;
 307 +                               fixed-link {
 308 +                                       speed = <1000>;
 309 +                                       full-duplex;
 310 +                               };
 311 +                       };
 312 +               };
 313 +       };
 314 +
 315 +       switch@11 {
 316 +               compatible = "marvell,mv88e6085";
 317 +               #address-cells = <1>;
 318 +               #size-cells = <0>;
 319 +               reg = <0x11>;
 320 +               dsa,member = <0 1>;
 321 +
 322 +               ports {
 323 +                       #address-cells = <1>;
 324 +                       #size-cells = <0>;
 325 +
 326 +                       port@0 {
 327 +                               reg = <0>;
 328 +                               label = "lan3";
 329 +                       };
 330 +
 331 +                       port@1 {
 332 +                              reg = <1>;
 333 +                              label = "lan8";
 334 +                       };
 335 +
 336 +                       port@2 {
 337 +                              reg = <2>;
 338 +                              label = "lan4";
 339 +                       };
 340 +
 341 +                       port@3 {
 342 +                              reg = <3>;
 343 +                              label = "dmz";
 344 +                       };
 345 +
 346 +                       switch1port5: port@5 {
 347 +                               reg = <5>;
 348 +                               phy-mode = "rgmii-txid";
 349 +                               link = <&switch0port5>;
 350 +                               fixed-link {
 351 +                                       speed = <1000>;
 352 +                                       full-duplex;
 353 +                               };
 354 +                       };
 355 +
 356 +                       port@6 {
 357 +                               reg = <6>;
 358 +                               label = "dsl";
 359 +                               fixed-link {
 360 +                                       speed = <100>;
 361 +                                       full-duplex;
 362 +                               };
 363 +                       };
 364 +               };
 365 +       };
 366 +};
 367 +
 368 +&eth0 {
 369 +       status = "okay";
 370 +       ethernet0-port@0 {
 371 +               phy-handle = <&ethphy8>;
 372 +       };
 373 +};
 374 +
 375 +&eth1 {
 376 +       status = "okay";
 377 +       ethernet1-port@0 {
 378 +               speed = <1000>;
 379 +               duplex = <1>;
 380 +       };
 381 +};
 382 +
 383 +&nand {
 384 +       status = "okay";
 385 +       pinctrl-0 = <&pmx_nand>;
 386 +       pinctrl-names = "default";
 387 +
 388 +       partition@0 {
 389 +               label = "u-boot";
 390 +               reg = <0x00000000 0x000c0000>;
 391 +       };
 392 +
 393 +       partition@a0000 {
 394 +               label = "bootldr-env";
 395 +               reg = <0x000c0000 0x00040000>;
 396 +       };
 397 +
 398 +       partition@100000 {
 399 +               label = "kernel-1";
 400 +               reg = <0x00100000 0x00800000>;
 401 +       };
 402 +
 403 +       partition@900000 {
 404 +               label = "rootfs-1";
 405 +               reg = <0x00900000 0x07100000>;
 406 +       };
 407 +
 408 +       partition@7a00000 {
 409 +               label = "kernel-2";
 410 +               reg = <0x07a00000 0x00800000>;
 411 +       };
 412 +
 413 +       partition@8200000 {
 414 +               label = "rootfs-2";
 415 +               reg = <0x08200000 0x07100000>;
 416 +       };
 417 +
 418 +       partition@f300000 {
 419 +               label = "default_sw";
 420 +               reg = <0x0f300000 0x07900000>;
 421 +       };
 422 +
 423 +       partition@16c00000 {
 424 +               label = "logs";
 425 +               reg = <0x16c00000 0x01800000>;
 426 +       };
 427 +
 428 +       partition@18400000 {
 429 +               label = "preset_cfg";
 430 +               reg = <0x18400000 0x00100000>;
 431 +       };
 432 +
 433 +       partition@18500000 {
 434 +               label = "adsl";
 435 +               reg = <0x18500000 0x00100000>;
 436 +       };
 437 +
 438 +       partition@18600000 {
 439 +               label = "storage";
 440 +               reg = <0x18600000 0x07a00000>;
 441 +       };
 442 +};
 443 +
 444 +&rtc {
 445 +       status = "disabled";
 446 +};
 447 +
 448 +&pciec {
 449 +       status = "okay";
 450 +};
 451 +
 452 +&pcie0 {
 453 +       status = "okay";
 454 +};
 455 +
 456 +&sata_phy0 {
 457 +       status = "disabled";
 458 +};
 459 +
 460 +&sata_phy1 {
 461 +       status = "disabled";
 462 +};
 463 +
 464 +&usb0 {
 465 +       #address-cells = <1>;
 466 +       #size-cells = <0>;
 467 +       status = "okay";
 468 +
 469 +       port@1 {
 470 +               #address-cells = <1>;
 471 +               #size-cells = <0>;
 472 +               reg = <1>;
 473 +               #trigger-source-cells = <0>;
 474 +
 475 +               hub_port1: port@1 {
 476 +                       reg = <1>;
 477 +                       #trigger-source-cells = <0>;
 478 +               };
 479 +
 480 +               hub_port3: port@3 {
 481 +                       reg = <3>;
 482 +                       #trigger-source-cells = <0>;
 483 +               };
 484 +       };
 485 +};