lantiq: fix typo in EASY80920.dtsi
[openwrt/openwrt.git] / target / linux / lantiq / dts / EASY80920.dtsi
1 #include "vr9.dtsi"
2
3 #include <dt-bindings/input/input.h>
4
5 / {
6 chosen {
7 bootargs = "console=ttyLTQ0,115200";
8 };
9
10 aliases {
11 led-boot = &power;
12 led-failsafe = &power;
13 led-running = &power;
14
15 led-usb = &usb1;
16 led-usb2 = &usb2;
17 };
18
19 memory@0 {
20 reg = <0x0 0x4000000>;
21 };
22
23 fpi@10000000 {
24 gpio: pinmux@E100B10 {
25 pinctrl-names = "default";
26 pinctrl-0 = <&state_default>;
27
28 state_default: pinmux {
29 exin3 {
30 lantiq,groups = "exin3";
31 lantiq,function = "exin";
32 };
33 stp {
34 lantiq,groups = "stp";
35 lantiq,function = "stp";
36 };
37 nand {
38 lantiq,groups = "nand cle", "nand ale",
39 "nand rd", "nand rdy";
40 lantiq,function = "ebu";
41 };
42 mdio {
43 lantiq,groups = "mdio";
44 lantiq,function = "mdio";
45 };
46 pci {
47 lantiq,groups = "gnt1", "req1";
48 lantiq,function = "pci";
49 };
50 conf_out {
51 lantiq,pins = "io24", "io13", "io49", /* nand cle, ale and rd */
52 "io4", "io5", "io6", /* stp */
53 "io21",
54 "io33";
55 lantiq,open-drain;
56 lantiq,pull = <0>;
57 lantiq,output = <1>;
58 };
59 pcie-rst {
60 lantiq,pins = "io38";
61 lantiq,pull = <0>;
62 lantiq,output = <1>;
63 };
64 conf_in {
65 lantiq,pins = "io39", /* exin3 */
66 "io48"; /* nand rdy */
67 lantiq,pull = <2>;
68 };
69 };
70 pins_spi_default: pins_spi_default {
71 spi_in {
72 lantiq,groups = "spi_di";
73 lantiq,function = "spi";
74 };
75 spi_out {
76 lantiq,groups = "spi_do", "spi_clk",
77 "spi_cs4";
78 lantiq,function = "spi";
79 lantiq,output = <1>;
80 };
81 };
82 };
83
84 stp: stp@E100BB0 {
85 compatible = "lantiq,gpio-stp-xway";
86 reg = <0xE100BB0 0x40>;
87 #gpio-cells = <2>;
88 gpio-controller;
89
90 lantiq,shadow = <0xffff>;
91 lantiq,groups = <0x7>;
92 lantiq,dsl = <0x3>;
93 lantiq,phy1 = <0x7>;
94 lantiq,phy2 = <0x7>;
95 /* lantiq,rising; */
96 };
97
98 ifxhcd@E101000 {
99 status = "okay";
100 gpios = <&gpio 33 GPIO_ACTIVE_HIGH>;
101 lantiq,portmask = <0x3>;
102 };
103 };
104
105 gphy-xrx200 {
106 compatible = "lantiq,phy-xrx200";
107 firmware1 = "lantiq/vr9_phy11g_a1x.bin";
108 firmware2 = "lantiq/vr9_phy11g_a2x.bin";
109 phys = [ 00 01 ];
110 };
111
112 gpio-keys-polled {
113 compatible = "gpio-keys-polled";
114 #address-cells = <1>;
115 #size-cells = <0>;
116 poll-interval = <100>;
117 /* reset {
118 label = "reset";
119 gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
120 linux,code = <KEY_RESTART>;
121 };*/
122 paging {
123 label = "paging";
124 gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
125 linux,code = <KEY_PHONE>;
126 };
127 };
128
129 gpio-leds {
130 compatible = "gpio-leds";
131
132 power: power {
133 label = "easy80920:green:power";
134 gpios = <&stp 9 GPIO_ACTIVE_HIGH>;
135 default-state = "keep";
136 };
137 warning {
138 label = "easy80920:green:warning";
139 gpios = <&stp 22 GPIO_ACTIVE_HIGH>;
140 };
141 fxs1 {
142 label = "easy80920:green:fxs1";
143 gpios = <&stp 21 GPIO_ACTIVE_HIGH>;
144 };
145 fxs2 {
146 label = "easy80920:green:fxs2";
147 gpios = <&stp 20 GPIO_ACTIVE_HIGH>;
148 };
149 fxo {
150 label = "easy80920:green:fxo";
151 gpios = <&stp 19 GPIO_ACTIVE_HIGH>;
152 };
153 usb1: usb1 {
154 label = "easy80920:green:usb1";
155 gpios = <&stp 18 GPIO_ACTIVE_HIGH>;
156 };
157 usb2: usb2 {
158 label = "easy80920:green:usb2";
159 gpios = <&stp 15 GPIO_ACTIVE_HIGH>;
160 };
161 sd {
162 label = "easy80920:green:sd";
163 gpios = <&stp 14 GPIO_ACTIVE_HIGH>;
164 };
165 wps {
166 label = "easy80920:green:wps";
167 gpios = <&stp 12 GPIO_ACTIVE_HIGH>;
168 };
169 };
170 };
171
172 &spi {
173 pinctrl-names = "default";
174 pinctrl-0 = <&pins_spi_default>;
175
176 status = "ok";
177
178 m25p80@4 {
179 #address-cells = <1>;
180 #size-cells = <1>;
181 compatible = "jedec,spi-nor";
182 reg = <4 0>;
183 spi-max-frequency = <1000000>;
184
185 partitions {
186 compatible = "fixed-partitions";
187 #address-cells = <1>;
188 #size-cells = <1>;
189
190 partition@0 {
191 reg = <0x0 0x20000>;
192 label = "SPI (RO) U-Boot Image";
193 read-only;
194 };
195
196 partition@20000 {
197 reg = <0x20000 0x10000>;
198 label = "ENV_MAC";
199 read-only;
200 };
201
202 partition@30000 {
203 reg = <0x30000 0x10000>;
204 label = "DPF";
205 read-only;
206 };
207
208 partition@40000 {
209 reg = <0x40000 0x10000>;
210 label = "NVRAM";
211 read-only;
212 };
213
214 partition@500000 {
215 reg = <0x50000 0x003a0000>;
216 label = "kernel";
217 };
218 };
219 };
220 };
221
222 &eth0 {
223 lan: interface@0 {
224 compatible = "lantiq,xrx200-pdi";
225 #address-cells = <1>;
226 #size-cells = <0>;
227 reg = <0>;
228 lantiq,switch;
229
230 ethernet@4 {
231 compatible = "lantiq,xrx200-pdi-port";
232 reg = <4>;
233 phy-mode = "gmii";
234 phy-handle = <&phy13>;
235 };
236 ethernet@2 {
237 compatible = "lantiq,xrx200-pdi-port";
238 reg = <2>;
239 phy-mode = "gmii";
240 phy-handle = <&phy11>;
241 };
242 ethernet@1 {
243 compatible = "lantiq,xrx200-pdi-port";
244 reg = <1>;
245 phy-mode = "rgmii";
246 phy-handle = <&phy1>;
247 };
248 ethernet@0 {
249 compatible = "lantiq,xrx200-pdi-port";
250 reg = <0>;
251 phy-mode = "rgmii";
252 phy-handle = <&phy0>;
253 };
254 };
255
256 wan: interface@1 {
257 compatible = "lantiq,xrx200-pdi";
258 #address-cells = <1>;
259 #size-cells = <0>;
260 reg = <1>;
261 lantiq,wan;
262
263 ethernet@5 {
264 compatible = "lantiq,xrx200-pdi-port";
265 reg = <5>;
266 phy-mode = "rgmii";
267 phy-handle = <&phy5>;
268 };
269 };
270
271 mdio@0 {
272 #address-cells = <1>;
273 #size-cells = <0>;
274 compatible = "lantiq,xrx200-mdio";
275 phy0: ethernet-phy@0 {
276 reg = <0x0>;
277 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
278 };
279 phy1: ethernet-phy@1 {
280 reg = <0x1>;
281 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
282 };
283 phy5: ethernet-phy@5 {
284 reg = <0x5>;
285 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
286 };
287 phy11: ethernet-phy@11 {
288 reg = <0x11>;
289 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
290 };
291 phy13: ethernet-phy@13 {
292 reg = <0x13>;
293 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
294 };
295 };
296 };