56efe7150f932be91daa209c6084b653eca17990
[openwrt/openwrt.git] / target / linux / lantiq / dts / EASY80920.dtsi
1 /include/ "vr9.dtsi"
2
3 / {
4 chosen {
5 bootargs = "console=ttyLTQ0,115200 init=/etc/preinit";
6
7 leds {
8 boot = &power;
9 failsafe = &power;
10 running = &power;
11
12 usb = &usb1;
13 usb2 = &usb2;
14 };
15 };
16
17 memory@0 {
18 reg = <0x0 0x4000000>;
19 };
20
21 fpi@10000000 {
22 #address-cells = <1>;
23 #size-cells = <1>;
24 compatible = "lantiq,fpi", "simple-bus";
25 ranges = <0x0 0x10000000 0xEEFFFFF>;
26 reg = <0x10000000 0xEF00000>;
27
28 localbus@0 {
29 #address-cells = <2>;
30 #size-cells = <1>;
31 compatible = "lantiq,localbus", "simple-bus";
32
33 };
34
35 gpio: pinmux@E100B10 {
36 compatible = "lantiq,pinctrl-xr9";
37 pinctrl-names = "default";
38 pinctrl-0 = <&state_default>;
39
40 interrupt-parent = <&icu0>;
41 interrupts = <166 135 66 40 41 42 38>;
42
43 #gpio-cells = <2>;
44 gpio-controller;
45 reg = <0xE100B10 0xA0>;
46
47 state_default: pinmux {
48 exin3 {
49 lantiq,groups = "exin3";
50 lantiq,function = "exin";
51 };
52 stp {
53 lantiq,groups = "stp";
54 lantiq,function = "stp";
55 };
56 spi {
57 lantiq,groups = "spi", "spi_cs4";
58 lantiq,function = "spi";
59 };
60 nand {
61 lantiq,groups = "nand cle", "nand ale",
62 "nand rd", "nand rdy";
63 lantiq,function = "ebu";
64 };
65 mdio {
66 lantiq,groups = "mdio";
67 lantiq,function = "mdio";
68 };
69 pci {
70 lantiq,groups = "gnt1", "req1";
71 lantiq,function = "pci";
72 };
73 conf_out {
74 lantiq,pins = "io24", "io13", "io49", /* nand cle, ale and rd */
75 "io4", "io5", "io6", /* stp */
76 "io21",
77 "io33";
78 lantiq,open-drain;
79 lantiq,pull = <0>;
80 lantiq,output = <1>;
81 };
82 pcie-rst {
83 lantiq,pins = "io38";
84 lantiq,pull = <0>;
85 lantiq,output = <1>;
86 };
87 conf_in {
88 lantiq,pins = "io39", /* exin3 */
89 "io48"; /* nand rdy */
90 lantiq,pull = <2>;
91 };
92 };
93 };
94
95 eth@E108000 {
96 #address-cells = <1>;
97 #size-cells = <0>;
98 compatible = "lantiq,xrx200-net";
99 reg = < 0xE108000 0x3000 /* switch */
100 0xE10B100 0x70 /* mdio */
101 0xE10B1D8 0x30 /* mii */
102 0xE10B308 0x30 /* pmac */
103 >;
104 interrupt-parent = <&icu0>;
105 interrupts = <73 72>;
106
107 lan: interface@0 {
108 compatible = "lantiq,xrx200-pdi";
109 #address-cells = <1>;
110 #size-cells = <0>;
111 reg = <0>;
112 mac-address = [ 00 11 22 33 44 55 ];
113
114 ethernet@0 {
115 compatible = "lantiq,xrx200-pdi-port";
116 reg = <0>;
117 phy-mode = "rgmii";
118 phy-handle = <&phy0>;
119 };
120 ethernet@1 {
121 compatible = "lantiq,xrx200-pdi-port";
122 reg = <1>;
123 phy-mode = "rgmii";
124 phy-handle = <&phy1>;
125 };
126 ethernet@2 {
127 compatible = "lantiq,xrx200-pdi-port";
128 reg = <2>;
129 phy-mode = "gmii";
130 phy-handle = <&phy11>;
131 };
132 };
133
134 wan: interface@1 {
135 compatible = "lantiq,xrx200-pdi";
136 #address-cells = <1>;
137 #size-cells = <0>;
138 reg = <1>;
139 mac-address = [ 00 11 22 33 44 56 ];
140 lantiq,wan;
141 ethernet@5 {
142 compatible = "lantiq,xrx200-pdi-port";
143 reg = <5>;
144 phy-mode = "rgmii";
145 phy-handle = <&phy5>;
146 };
147 };
148
149 test: interface@2 {
150 compatible = "lantiq,xrx200-pdi";
151 #address-cells = <1>;
152 #size-cells = <0>;
153 reg = <2>;
154 mac-address = [ 00 11 22 33 44 57 ];
155 ethernet@4 {
156 compatible = "lantiq,xrx200-pdi-port";
157 reg = <4>;
158 phynmode0 = "gmii";
159 phy-handle = <&phy13>;
160 };
161 };
162
163 mdio@0 {
164 #address-cells = <1>;
165 #size-cells = <0>;
166 compatible = "lantiq,xrx200-mdio";
167 phy0: ethernet-phy@0 {
168 reg = <0x0>;
169 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
170 };
171 phy1: ethernet-phy@1 {
172 reg = <0x1>;
173 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
174 };
175 phy5: ethernet-phy@5 {
176 reg = <0x5>;
177 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
178 };
179 phy11: ethernet-phy@11 {
180 reg = <0x11>;
181 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
182 };
183 phy13: ethernet-phy@13 {
184 reg = <0x13>;
185 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
186 };
187 };
188 };
189
190 stp: stp@E100BB0 {
191 compatible = "lantiq,gpio-stp-xway";
192 reg = <0xE100BB0 0x40>;
193 #gpio-cells = <2>;
194 gpio-controller;
195
196 lantiq,shadow = <0xffff>;
197 lantiq,groups = <0x7>;
198 lantiq,dsl = <0x3>;
199 lantiq,phy1 = <0x7>;
200 lantiq,phy2 = <0x7>;
201 /* lantiq,rising; */
202 };
203
204 ifxhcd@E101000 {
205 status = "okay";
206 gpios = <&gpio 33 0>;
207 lantiq,portmask = <0x3>;
208 };
209
210 pci@E105400 {
211 #address-cells = <3>;
212 #size-cells = <2>;
213 #interrupt-cells = <1>;
214 compatible = "lantiq,pci-xway1";
215 bus-range = <0x0 0x0>;
216 ranges = <0x2000000 0 0x8000000 0x8000000 0 0x2000000 /* pci memory */
217 0x1000000 0 0x00000000 0xAE00000 0 0x200000>; /* io space */
218 reg = <0x7000000 0x8000 /* config space */
219 0xE105400 0x400>; /* pci bridge */
220 lantiq,bus-clock = <33333333>;
221 /*lantiq,external-clock;*/
222 lantiq,delay-hi = <0>; /* 0ns delay */
223 lantiq,delay-lo = <0>; /* 0.0ns delay */
224 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
225 interrupt-map = <
226 0x7000 0 0 1 &icu0 29 1 // slot 14, irq 29
227 >;
228 gpios-reset = <&gpio 21 0>;
229 req-mask = <0x1>; /* GNT1 */
230 };
231 };
232
233 gphy-xrx200 {
234 compatible = "lantiq,phy-xrx200";
235 firmware = "lantiq/vr9_phy11g_a2x.bin";
236 phys = [ 00 01 ];
237 };
238
239 gpio-keys-polled {
240 compatible = "gpio-keys-polled";
241 #address-cells = <1>;
242 #size-cells = <0>;
243 poll-interval = <100>;
244 /* reset {
245 label = "reset";
246 gpios = <&gpio 7 1>;
247 linux,code = <0x198>;
248 };*/
249 paging {
250 label = "paging";
251 gpios = <&gpio 11 1>;
252 linux,code = <0x100>;
253 };
254 };
255
256 gpio-leds {
257 compatible = "gpio-leds";
258
259 power: power {
260 label = "easy80920:green:power";
261 gpios = <&stp 9 0>;
262 default-state = "keep";
263 };
264 warning {
265 label = "easy80920:green:warning";
266 gpios = <&stp 22 0>;
267 };
268 fxs1 {
269 label = "easy80920:green:fxs1";
270 gpios = <&stp 21 0>;
271 };
272 fxs2 {
273 label = "easy80920:green:fxs2";
274 gpios = <&stp 20 0>;
275 };
276 fxo {
277 label = "easy80920:green:fxo";
278 gpios = <&stp 19 0>;
279 };
280 usb1: usb1 {
281 label = "easy80920:green:usb1";
282 gpios = <&stp 18 0>;
283 };
284 usb2: usb2 {
285 label = "easy80920:green:usb2";
286 gpios = <&stp 15 0>;
287 };
288 sd {
289 label = "easy80920:green:sd";
290 gpios = <&stp 14 0>;
291 };
292 wps {
293 label = "easy80920:green:wps";
294 gpios = <&stp 12 0>;
295 };
296 };
297 };
298
299 &spi {
300 status = "ok";
301
302 m25p80@3 {
303 #address-cells = <1>;
304 #size-cells = <1>;
305 compatible = "jedec,spi-nor";
306 reg = <3 0>;
307 spi-max-frequency = <1000000>;
308
309 partition@0 {
310 reg = <0x0 0x20000>;
311 label = "SPI (RO) U-Boot Image";
312 read-only;
313 };
314
315 partition@20000 {
316 reg = <0x20000 0x10000>;
317 label = "ENV_MAC";
318 read-only;
319 };
320
321 partition@30000 {
322 reg = <0x30000 0x10000>;
323 label = "DPF";
324 read-only;
325 };
326
327 partition@40000 {
328 reg = <0x40000 0x10000>;
329 label = "NVRAM";
330 read-only;
331 };
332
333 partition@500000 {
334 reg = <0x50000 0x003a0000>;
335 label = "kernel";
336 };
337 };
338 };