a9293af377c5ea268cd6bd953f021070ee29cc82
[openwrt/openwrt.git] / target / linux / lantiq / dts / EASY80920.dtsi
1 /include/ "vr9.dtsi"
2
3 / {
4 chosen {
5 bootargs = "console=ttyLTQ0,115200 init=/etc/preinit";
6 };
7
8 memory@0 {
9 reg = <0x0 0x4000000>;
10 };
11
12 fpi@10000000 {
13 #address-cells = <1>;
14 #size-cells = <1>;
15 compatible = "lantiq,fpi", "simple-bus";
16 ranges = <0x0 0x10000000 0xEEFFFFF>;
17 reg = <0x10000000 0xEF00000>;
18
19 localbus@0 {
20 #address-cells = <2>;
21 #size-cells = <1>;
22 compatible = "lantiq,localbus", "simple-bus";
23
24 };
25
26 spi@E100800 {
27 compatible = "lantiq,spi-xway-broken";
28 reg = <0xE100800 0x100>;
29 interrupt-parent = <&icu0>;
30 interrupts = <22 23 24>;
31 #address-cells = <1>;
32 #size-cells = <1>;
33
34 m25p80@0 {
35 #address-cells = <1>;
36 #size-cells = <1>;
37 compatible = "jedec,spi-nor";
38 reg = <0 0>;
39 spi-max-frequency = <1000000>;
40
41 partition@0 {
42 reg = <0x0 0x20000>;
43 label = "SPI (RO) U-Boot Image";
44 read-only;
45 };
46
47 partition@20000 {
48 reg = <0x20000 0x10000>;
49 label = "ENV_MAC";
50 read-only;
51 };
52
53 partition@30000 {
54 reg = <0x30000 0x10000>;
55 label = "DPF";
56 read-only;
57 };
58
59 partition@40000 {
60 reg = <0x40000 0x10000>;
61 label = "NVRAM";
62 read-only;
63 };
64
65 partition@500000 {
66 reg = <0x50000 0x003a0000>;
67 label = "kernel";
68 };
69 };
70 };
71
72 gpio: pinmux@E100B10 {
73 compatible = "lantiq,pinctrl-xr9";
74 pinctrl-names = "default";
75 pinctrl-0 = <&state_default>;
76
77 interrupt-parent = <&icu0>;
78 interrupts = <166 135 66 40 41 42 38>;
79
80 #gpio-cells = <2>;
81 gpio-controller;
82 reg = <0xE100B10 0xA0>;
83
84 state_default: pinmux {
85 exin3 {
86 lantiq,groups = "exin3";
87 lantiq,function = "exin";
88 };
89 stp {
90 lantiq,groups = "stp";
91 lantiq,function = "stp";
92 };
93 spi {
94 lantiq,groups = "spi", "spi_cs4";
95 lantiq,function = "spi";
96 };
97 nand {
98 lantiq,groups = "nand cle", "nand ale",
99 "nand rd", "nand rdy";
100 lantiq,function = "ebu";
101 };
102 mdio {
103 lantiq,groups = "mdio";
104 lantiq,function = "mdio";
105 };
106 pci {
107 lantiq,groups = "gnt1", "req1";
108 lantiq,function = "pci";
109 };
110 conf_out {
111 lantiq,pins = "io24", "io13", "io49", /* nand cle, ale and rd */
112 "io4", "io5", "io6", /* stp */
113 "io21",
114 "io33";
115 lantiq,open-drain;
116 lantiq,pull = <0>;
117 lantiq,output = <1>;
118 };
119 pcie-rst {
120 lantiq,pins = "io38";
121 lantiq,pull = <0>;
122 lantiq,output = <1>;
123 };
124 conf_in {
125 lantiq,pins = "io39", /* exin3 */
126 "io48"; /* nand rdy */
127 lantiq,pull = <2>;
128 };
129 };
130 };
131
132 eth@E108000 {
133 #address-cells = <1>;
134 #size-cells = <0>;
135 compatible = "lantiq,xrx200-net";
136 reg = < 0xE108000 0x3000 /* switch */
137 0xE10B100 0x70 /* mdio */
138 0xE10B1D8 0x30 /* mii */
139 0xE10B308 0x30 /* pmac */
140 >;
141 interrupt-parent = <&icu0>;
142 interrupts = <73 72>;
143
144 lan: interface@0 {
145 compatible = "lantiq,xrx200-pdi";
146 #address-cells = <1>;
147 #size-cells = <0>;
148 reg = <0>;
149 mac-address = [ 00 11 22 33 44 55 ];
150
151 ethernet@0 {
152 compatible = "lantiq,xrx200-pdi-port";
153 reg = <0>;
154 phy-mode = "rgmii";
155 phy-handle = <&phy0>;
156 };
157 ethernet@1 {
158 compatible = "lantiq,xrx200-pdi-port";
159 reg = <1>;
160 phy-mode = "rgmii";
161 phy-handle = <&phy1>;
162 };
163 ethernet@2 {
164 compatible = "lantiq,xrx200-pdi-port";
165 reg = <2>;
166 phy-mode = "gmii";
167 phy-handle = <&phy11>;
168 };
169 };
170
171 wan: interface@1 {
172 compatible = "lantiq,xrx200-pdi";
173 #address-cells = <1>;
174 #size-cells = <0>;
175 reg = <1>;
176 mac-address = [ 00 11 22 33 44 56 ];
177 lantiq,wan;
178 ethernet@5 {
179 compatible = "lantiq,xrx200-pdi-port";
180 reg = <5>;
181 phy-mode = "rgmii";
182 phy-handle = <&phy5>;
183 };
184 };
185
186 test: interface@2 {
187 compatible = "lantiq,xrx200-pdi";
188 #address-cells = <1>;
189 #size-cells = <0>;
190 reg = <2>;
191 mac-address = [ 00 11 22 33 44 57 ];
192 ethernet@4 {
193 compatible = "lantiq,xrx200-pdi-port";
194 reg = <4>;
195 phynmode0 = "gmii";
196 phy-handle = <&phy13>;
197 };
198 };
199
200 mdio@0 {
201 #address-cells = <1>;
202 #size-cells = <0>;
203 compatible = "lantiq,xrx200-mdio";
204 phy0: ethernet-phy@0 {
205 reg = <0x0>;
206 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
207 };
208 phy1: ethernet-phy@1 {
209 reg = <0x1>;
210 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
211 };
212 phy5: ethernet-phy@5 {
213 reg = <0x5>;
214 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
215 };
216 phy11: ethernet-phy@11 {
217 reg = <0x11>;
218 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
219 };
220 phy13: ethernet-phy@13 {
221 reg = <0x13>;
222 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
223 };
224 };
225 };
226
227 stp: stp@E100BB0 {
228 compatible = "lantiq,gpio-stp-xway";
229 reg = <0xE100BB0 0x40>;
230 #gpio-cells = <2>;
231 gpio-controller;
232
233 lantiq,shadow = <0xffff>;
234 lantiq,groups = <0x7>;
235 lantiq,dsl = <0x3>;
236 lantiq,phy1 = <0x7>;
237 lantiq,phy2 = <0x7>;
238 /* lantiq,rising; */
239 };
240
241 ifxhcd@E101000 {
242 status = "okay";
243 gpios = <&gpio 33 0>;
244 lantiq,portmask = <0x3>;
245 };
246
247 pci@E105400 {
248 #address-cells = <3>;
249 #size-cells = <2>;
250 #interrupt-cells = <1>;
251 compatible = "lantiq,pci-xway1";
252 bus-range = <0x0 0x0>;
253 ranges = <0x2000000 0 0x8000000 0x8000000 0 0x2000000 /* pci memory */
254 0x1000000 0 0x00000000 0xAE00000 0 0x200000>; /* io space */
255 reg = <0x7000000 0x8000 /* config space */
256 0xE105400 0x400>; /* pci bridge */
257 lantiq,bus-clock = <33333333>;
258 /*lantiq,external-clock;*/
259 lantiq,delay-hi = <0>; /* 0ns delay */
260 lantiq,delay-lo = <0>; /* 0.0ns delay */
261 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
262 interrupt-map = <
263 0x7000 0 0 1 &icu0 29 1 // slot 14, irq 29
264 >;
265 gpios-reset = <&gpio 21 0>;
266 req-mask = <0x1>; /* GNT1 */
267 };
268 };
269
270 gphy-xrx200 {
271 compatible = "lantiq,phy-xrx200";
272 firmware = "lantiq/vr9_phy11g_a2x.bin";
273 phys = [ 00 01 ];
274 };
275
276 gpio-keys-polled {
277 compatible = "gpio-keys-polled";
278 #address-cells = <1>;
279 #size-cells = <0>;
280 poll-interval = <100>;
281 /* reset {
282 label = "reset";
283 gpios = <&gpio 7 1>;
284 linux,code = <0x198>;
285 };*/
286 paging {
287 label = "paging";
288 gpios = <&gpio 11 1>;
289 linux,code = <0x100>;
290 };
291 };
292
293 gpio-leds {
294 compatible = "gpio-leds";
295
296 power {
297 label = "power";
298 gpios = <&stp 9 0>;
299 default-state = "on";
300 };
301 warning {
302 label = "warning";
303 gpios = <&stp 22 0>;
304 };
305 fxs1 {
306 label = "fxs1";
307 gpios = <&stp 21 0>;
308 };
309 fxs2 {
310 label = "fxs2";
311 gpios = <&stp 20 0>;
312 };
313 fxo {
314 label = "fxo";
315 gpios = <&stp 19 0>;
316 };
317 usb1 {
318 label = "usb1";
319 gpios = <&stp 18 0>;
320 };
321 usb2 {
322 label = "usb2";
323 gpios = <&stp 15 0>;
324 };
325 sd {
326 label = "sd";
327 gpios = <&stp 14 0>;
328 };
329 wps {
330 label = "wps";
331 gpios = <&stp 12 0>;
332 };
333 };
334 };