target/linux/lantiq/dts/EASY80920.dtsi

   1 /include/ "vr9.dtsi"
   2
   3 / {
   4         chosen {
   5                 bootargs = "console=ttyLTQ0,115200 init=/etc/preinit";
   6
   7                 leds {
   8                         boot = &power;
   9                         failsafe = &power;
  10                         running = &power;
  11
  12                         usb = &usb1;
  13                         usb2 = &usb2;
  14                 };
  15         };
  16
  17         memory@0 {
  18                 reg = <0x0 0x4000000>;
  19         };
  20
  21         fpi@10000000 {
  22                 #address-cells = <1>;
  23                 #size-cells = <1>;
  24                 compatible = "lantiq,fpi", "simple-bus";
  25                 ranges = <0x0 0x10000000 0xEEFFFFF>;
  26                 reg = <0x10000000 0xEF00000>;
  27
  28                 localbus@0 {
  29                         #address-cells = <2>;
  30                         #size-cells = <1>;
  31                         compatible = "lantiq,localbus", "simple-bus";
  32
  33                 };
  34
  35                 gpio: pinmux@E100B10 {
  36                         compatible = "lantiq,pinctrl-xr9";
  37                         pinctrl-names = "default";
  38                         pinctrl-0 = <&state_default>;
  39
  40                         interrupt-parent = <&icu0>;
  41                         interrupts = <166 135 66 40 41 42 38>;
  42
  43                         #gpio-cells = <2>;
  44                         gpio-controller;
  45                         reg = <0xE100B10 0xA0>;
  46
  47                         state_default: pinmux {
  48                                 exin3 {
  49                                         lantiq,groups = "exin3";
  50                                         lantiq,function = "exin";
  51                                 };
  52                                 stp {
  53                                         lantiq,groups = "stp";
  54                                         lantiq,function = "stp";
  55                                 };
  56                                 nand {
  57                                         lantiq,groups = "nand cle", "nand ale",
  58                                                         "nand rd", "nand rdy";
  59                                         lantiq,function = "ebu";
  60                                 };
  61                                 mdio {
  62                                         lantiq,groups = "mdio";
  63                                         lantiq,function = "mdio";
  64                                 };
  65                                 pci {
  66                                         lantiq,groups = "gnt1", "req1";
  67                                         lantiq,function = "pci";
  68                                 };
  69                                 conf_out {
  70                                         lantiq,pins = "io24", "io13", "io49", /* nand cle, ale and rd */
  71                                                         "io4", "io5", "io6", /* stp */
  72                                                         "io21",
  73                                                         "io33";
  74                                         lantiq,open-drain;
  75                                         lantiq,pull = <0>;
  76                                         lantiq,output = <1>;
  77                                 };
  78                                 pcie-rst {
  79                                         lantiq,pins = "io38";
  80                                         lantiq,pull = <0>;
  81                                         lantiq,output = <1>;
  82                                 };
  83                                 conf_in {
  84                                         lantiq,pins = "io39", /* exin3 */
  85                                                         "io48"; /* nand rdy */
  86                                         lantiq,pull = <2>;
  87                                 };
  88                         };
  89                         pins_spi_default: pins_spi_default {
  90                                 spi_in {
  91                                         lantiq,groups = "spi_di";
  92                                         lantiq,function = "spi";
  93                                 };
  94                                 spi_out {
  95                                         lantiq,groups = "spi_do", "spi_clk",
  96                                                 "spi_cs4";
  97                                         lantiq,function = "spi";
  98                                         lantiq,output = <1>;
  99                                 };
 100                         };
 101                 };
 102
 103                 stp: stp@E100BB0 {
 104                         compatible = "lantiq,gpio-stp-xway";
 105                         reg = <0xE100BB0 0x40>;
 106                         #gpio-cells = <2>;
 107                         gpio-controller;
 108
 109                         lantiq,shadow = <0xffff>;
 110                         lantiq,groups = <0x7>;
 111                         lantiq,dsl = <0x3>;
 112                         lantiq,phy1 = <0x7>;
 113                         lantiq,phy2 = <0x7>;
 114                         /* lantiq,rising; */
 115                 };
 116
 117                 ifxhcd@E101000 {
 118                         status = "okay";
 119                         gpios = <&gpio 33 0>;
 120                         lantiq,portmask = <0x3>;
 121                 };
 122
 123                 pci@E105400 {
 124                         #address-cells = <3>;
 125                         #size-cells = <2>;
 126                         #interrupt-cells = <1>;
 127                         compatible = "lantiq,pci-xway1";
 128                         bus-range = <0x0 0x0>;
 129                         ranges = <0x2000000 0 0x8000000 0x8000000 0 0x2000000   /* pci memory */
 130                                 0x1000000 0 0x00000000 0xAE00000 0 0x200000>; /* io space */
 131                         reg = <0x7000000 0x8000         /* config space */
 132                                 0xE105400 0x400>;       /* pci bridge */
 133                         lantiq,bus-clock = <33333333>;
 134                         /*lantiq,external-clock;*/
 135                         lantiq,delay-hi = <0>; /* 0ns delay */
 136                         lantiq,delay-lo = <0>; /* 0.0ns delay */
 137                         interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
 138                         interrupt-map = <
 139                                 0x7000 0 0 1 &icu0 29 1 // slot 14, irq 29
 140                                 >;
 141                         gpios-reset = <&gpio 21 0>;
 142                         req-mask = <0x1>;       /* GNT1 */
 143                 };
 144         };
 145
 146         gphy-xrx200 {
 147                 compatible = "lantiq,phy-xrx200";
 148                 firmware = "lantiq/vr9_phy11g_a2x.bin";
 149                 phys = [ 00 01 ];
 150         };
 151
 152         gpio-keys-polled {
 153                 compatible = "gpio-keys-polled";
 154                 #address-cells = <1>;
 155                 #size-cells = <0>;
 156                 poll-interval = <100>;
 157 /*              reset {
 158                         label = "reset";
 159                         gpios = <&gpio 7 1>;
 160                         linux,code = <0x198>;
 161                 };*/
 162                 paging {
 163                         label = "paging";
 164                         gpios = <&gpio 11 1>;
 165                         linux,code = <0x100>;
 166                 };
 167         };
 168
 169         gpio-leds {
 170                 compatible = "gpio-leds";
 171
 172                 power: power {
 173                         label = "easy80920:green:power";
 174                         gpios = <&stp 9 0>;
 175                         default-state = "keep";
 176                 };
 177                 warning {
 178                         label = "easy80920:green:warning";
 179                         gpios = <&stp 22 0>;
 180                 };
 181                 fxs1 {
 182                         label = "easy80920:green:fxs1";
 183                         gpios = <&stp 21 0>;
 184                 };
 185                 fxs2 {
 186                         label = "easy80920:green:fxs2";
 187                         gpios = <&stp 20 0>;
 188                 };
 189                 fxo {
 190                         label = "easy80920:green:fxo";
 191                         gpios = <&stp 19 0>;
 192                 };
 193                 usb1: usb1 {
 194                         label = "easy80920:green:usb1";
 195                         gpios = <&stp 18 0>;
 196                 };
 197                 usb2: usb2 {
 198                         label = "easy80920:green:usb2";
 199                         gpios = <&stp 15 0>;
 200                 };
 201                 sd {
 202                         label = "easy80920:green:sd";
 203                         gpios = <&stp 14 0>;
 204                 };
 205                 wps {
 206                         label = "easy80920:green:wps";
 207                         gpios = <&stp 12 0>;
 208                 };
 209         };
 210 };
 211
 212 &spi {
 213         pinctrl-names = "default";
 214         pinctrl-0 = <&pins_spi_default>;
 215
 216         status = "ok";
 217
 218         m25p80@4 {
 219                 #address-cells = <1>;
 220                 #size-cells = <1>;
 221                 compatible = "jedec,spi-nor";
 222                 reg = <4 0>;
 223                 spi-max-frequency = <1000000>;
 224
 225                 partitions {
 226                         compatible = "fixed-partitions";
 227                         #address-cells = <1>;
 228                         #size-cells = <1>;
 229
 230                         partition@0 {
 231                                 reg = <0x0 0x20000>;
 232                                 label = "SPI (RO) U-Boot Image";
 233                                 read-only;
 234                         };
 235
 236                         partition@20000 {
 237                                 reg = <0x20000 0x10000>;
 238                                 label = "ENV_MAC";
 239                                 read-only;
 240                         };
 241
 242                         partition@30000 {
 243                                 reg = <0x30000 0x10000>;
 244                                 label = "DPF";
 245                                 read-only;
 246                         };
 247
 248                         partition@40000 {
 249                                 reg = <0x40000 0x10000>;
 250                                 label = "NVRAM";
 251                                 read-only;
 252                         };
 253
 254                         partition@500000 {
 255                                 reg = <0x50000 0x003a0000>;
 256                                 label = "kernel";
 257                         };
 258                 };
 259         };
 260 };
 261
 262 &eth0 {
 263         lan: interface@0 {
 264                 compatible = "lantiq,xrx200-pdi";
 265                 #address-cells = <1>;
 266                 #size-cells = <0>;
 267                 reg = <0>;
 268                 mac-address = [ 00 11 22 33 44 55 ];
 269
 270                 ethernet@0 {
 271                         compatible = "lantiq,xrx200-pdi-port";
 272                         reg = <0>;
 273                         phy-mode = "rgmii";
 274                         phy-handle = <&phy0>;
 275                 };
 276                 ethernet@1 {
 277                         compatible = "lantiq,xrx200-pdi-port";
 278                         reg = <1>;
 279                         phy-mode = "rgmii";
 280                         phy-handle = <&phy1>;
 281                 };
 282                 ethernet@2 {
 283                         compatible = "lantiq,xrx200-pdi-port";
 284                         reg = <2>;
 285                         phy-mode = "gmii";
 286                         phy-handle = <&phy11>;
 287                 };
 288         };
 289
 290         wan: interface@1 {
 291                 compatible = "lantiq,xrx200-pdi";
 292                 #address-cells = <1>;
 293                 #size-cells = <0>;
 294                 reg = <1>;
 295                 mac-address = [ 00 11 22 33 44 56 ];
 296                 lantiq,wan;
 297                 ethernet@5 {
 298                         compatible = "lantiq,xrx200-pdi-port";
 299                         reg = <5>;
 300                         phy-mode = "rgmii";
 301                         phy-handle = <&phy5>;
 302                 };
 303         };
 304
 305         test: interface@2 {
 306                 compatible = "lantiq,xrx200-pdi";
 307                 #address-cells = <1>;
 308                 #size-cells = <0>;
 309                 reg = <2>;
 310                 mac-address = [ 00 11 22 33 44 57 ];
 311                 ethernet@4 {
 312                         compatible = "lantiq,xrx200-pdi-port";
 313                         reg = <4>;
 314                         phynmode0 = "gmii";
 315                         phy-handle = <&phy13>;
 316                 };
 317         };
 318
 319         mdio@0 {
 320                 #address-cells = <1>;
 321                 #size-cells = <0>;
 322                 compatible = "lantiq,xrx200-mdio";
 323                 phy0: ethernet-phy@0 {
 324                         reg = <0x0>;
 325                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 326                 };
 327                 phy1: ethernet-phy@1 {
 328                         reg = <0x1>;
 329                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 330                 };
 331                 phy5: ethernet-phy@5 {
 332                         reg = <0x5>;
 333                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 334                 };
 335                 phy11: ethernet-phy@11 {
 336                         reg = <0x11>;
 337                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 338                 };
 339                 phy13: ethernet-phy@13 {
 340                         reg = <0x13>;
 341                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 342                 };
 343         };
 344 };