target/linux/lantiq/dts/P2812HNUFX.dtsi

   1 /include/ "vr9.dtsi"
   2
   3 / {
   4         chosen {
   5                 bootargs = "console=ttyLTQ0,115200 init=/etc/preinit";
   6
   7                 leds {
   8                         boot = &power_green;
   9                         failsafe = &power_red;
  10                         running = &power_green;
  11
  12                         dsl = &dsl_green;
  13                         internet = &internet_green;
  14                         wifi = &wireless_green;
  15                 };
  16         };
  17
  18         memory@0 {
  19                 reg = <0x0 0x8000000>;
  20         };
  21
  22         fpi@10000000 {
  23                 #address-cells = <1>;
  24                 #size-cells = <1>;
  25                 compatible = "lantiq,fpi", "simple-bus";
  26                 ranges = <0x0 0x10000000 0xEEFFFFF>;
  27                 reg = <0x10000000 0xEF00000>;
  28
  29                 localbus@0 {
  30                         #address-cells = <2>;
  31                         #size-cells = <1>;
  32                         ranges = <0 0 0x0 0x3ffffff /* addrsel0 */
  33                                 1 0 0x4000000 0x4000010>; /* addsel1 */
  34                         compatible = "lantiq,localbus", "simple-bus";
  35                 };
  36
  37                 gpio: pinmux@E100B10 {
  38                         compatible = "lantiq,pinctrl-xr9";
  39                         pinctrl-names = "default";
  40                         pinctrl-0 = <&state_default>;
  41
  42                         interrupt-parent = <&icu0>;
  43                         interrupts = <166 135 66 40 41 42 38>;
  44
  45                         #gpio-cells = <2>;
  46                         gpio-controller;
  47                         reg = <0xE100B10 0xA0>;
  48
  49                         state_default: pinmux {
  50                                 exin3 {
  51                                         lantiq,groups = "exin3";
  52                                         lantiq,function = "exin";
  53                                 };
  54                                 mdio {
  55                                         lantiq,groups = "mdio";
  56                                         lantiq,function = "mdio";
  57                                 };
  58                                 gphy-leds {
  59                                         lantiq,groups = "gphy0 led1", "gphy1 led1",
  60                                                         "gphy0 led2", "gphy1 led2";
  61                                         lantiq,function = "gphy";
  62                                         lantiq,pull = <2>;
  63                                         lantiq,open-drain = <0>;
  64                                         lantiq,output = <1>;
  65                                 };
  66                                 stp {
  67                                         lantiq,groups = "stp";
  68                                         lantiq,function = "stp";
  69                                         lantiq,pull = <2>;
  70                                         lantiq,open-drain = <0>;
  71                                         lantiq,output = <1>;
  72                                 };
  73                                 pci-in {
  74                                         lantiq,groups = "req1";
  75                                         lantiq,function = "pci";
  76                                         lantiq,output = <0>;
  77                                         lantiq,open-drain = <1>;
  78                                         lantiq,pull = <2>;
  79                                 };
  80                                 pci-out {
  81                                         lantiq,groups = "gnt1";
  82                                         lantiq,function = "pci";
  83                                         lantiq,output = <1>;
  84                                         lantiq,open-drain = <0>;
  85                                         lantiq,pull = <0>;
  86                                 };
  87                                 pci_rst {
  88                                         lantiq,pins = "io21";
  89                                         lantiq,output = <1>;
  90                                         lantiq,open-drain = <0>;
  91                                         lantiq,pull = <2>;
  92                                 };
  93                                 pcie-rst {
  94                                         lantiq,pins = "io38";
  95                                         lantiq,pull = <0>;
  96                                         lantiq,output = <1>;
  97                                 };
  98                                 ifxhcd-rst {
  99                                         lantiq,pins = "io33";
 100                                         lantiq,pull = <0>;
 101                                         lantiq,open-drain = <0>;
 102                                         lantiq,output = <1>;
 103                                 };
 104                                 nand_out {
 105                                         lantiq,groups = "nand cle", "nand ale";
 106                                         lantiq,function = "ebu";
 107                                         lantiq,output = <1>;
 108                                         lantiq,open-drain = <0>;
 109                                         lantiq,pull = <0>;
 110                                 };
 111                                 nand_cs1 {
 112                                         lantiq,groups = "nand cs1";
 113                                         lantiq,function = "ebu";
 114                                         lantiq,open-drain = <0>;
 115                                         lantiq,pull = <0>;
 116                                 };
 117                         };
 118                 };
 119
 120                 eth@E108000 {
 121                         #address-cells = <1>;
 122                         #size-cells = <0>;
 123                         compatible = "lantiq,xrx200-net";
 124                         reg = < 0xE108000 0x3000        /* switch */
 125                                 0xE10B100 0x70          /* mdio */
 126                                 0xE10B1D8 0x30          /* mii */
 127                                 0xE10B308 0x30 >;       /* pmac */
 128                         interrupt-parent = <&icu0>;
 129                         interrupts = <73 72>;
 130
 131                         lan: interface@0 {
 132                                 compatible = "lantiq,xrx200-pdi";
 133                                 #address-cells = <1>;
 134                                 #size-cells = <0>;
 135                                 reg = <0>;
 136                                 mac-address = [ 00 11 22 33 44 55 ];
 137                                 lantiq,switch;
 138
 139                                 ethernet@0 {
 140                                         compatible = "lantiq,xrx200-pdi-port";
 141                                         reg = <0>;
 142                                         phy-mode = "rgmii";
 143                                         phy-handle = <&phy0>;
 144                                 };
 145                                 ethernet@1 {
 146                                         compatible = "lantiq,xrx200-pdi-port";
 147                                         reg = <1>;
 148                                         phy-mode = "rgmii";
 149                                         phy-handle = <&phy1>;
 150                                 };
 151                                 ethernet@2 {
 152                                         compatible = "lantiq,xrx200-pdi-port";
 153                                         reg = <2>;
 154                                         phy-mode = "gmii";
 155                                         phy-handle = <&phy11>;
 156                                 };
 157                                 ethernet@4 {
 158                                         compatible = "lantiq,xrx200-pdi-port";
 159                                         reg = <4>;
 160                                         phy-mode = "gmii";
 161                                         phy-handle = <&phy13>;
 162                                 };
 163                                 ethernet@5 {
 164                                         compatible = "lantiq,xrx200-pdi-port";
 165                                         reg = <5>;
 166                                         phy-mode = "rgmii";
 167                                         phy-handle = <&phy5>;
 168                                 };
 169                         };
 170
 171                         mdio@0 {
 172                                 #address-cells = <1>;
 173                                 #size-cells = <0>;
 174                                 compatible = "lantiq,xrx200-mdio";
 175
 176                                 phy0: ethernet-phy@0 {
 177                                         reg = <0x0>;
 178                                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 179                                 };
 180                                 phy1: ethernet-phy@1 {
 181                                         reg = <0x1>;
 182                                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 183                                 };
 184                                 phy5: ethernet-phy@5 {
 185                                         reg = <0x5>;
 186                                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 187                                 };
 188                                 phy11: ethernet-phy@11 {
 189                                         reg = <0x11>;
 190                                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 191                                 };
 192                                 phy13: ethernet-phy@13 {
 193                                         reg = <0x13>;
 194                                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 195                                 };
 196                         };
 197                 };
 198
 199                 stp: stp@E100BB0 {
 200                         compatible = "lantiq,gpio-stp-xway";
 201                         reg = <0xE100BB0 0x40>;
 202                         #gpio-cells = <2>;
 203                         gpio-controller;
 204
 205                         lantiq,shadow = <0xffffff>;
 206                         lantiq,groups = <0x7>;
 207                         lantiq,dsl = <0x0>;
 208                         lantiq,phy1 = <0x0>;
 209                         lantiq,phy2 = <0x0>;
 210                 };
 211
 212                 ifxhcd@E101000 {
 213                         status = "okay";
 214                         gpios = <&gpio 33 0>;
 215                         lantiq,portmask = <0x3>;
 216                 };
 217
 218                 ifxhcd@E106000 {
 219                         status = "okay";
 220                         gpios = <&gpio 33 0>;
 221                 };
 222
 223                 pci@E105400 {
 224                         status = "okay";
 225                         #address-cells = <3>;
 226                         #size-cells = <2>;
 227                         #interrupt-cells = <1>;
 228                         compatible = "lantiq,pci-xway";
 229                         bus-range = <0x0 0x0>;
 230                         ranges = <0x2000000 0 0x8000000 0x8000000 0 0x2000000   /* pci memory */
 231                                 0x1000000 0 0x00000000 0xAE00000 0 0x200000>; /* io space */
 232                         reg = <0x7000000 0x8000         /* config space */
 233                                 0xE105400 0x400>;       /* pci bridge */
 234                         lantiq,bus-clock = <33333333>;
 235                         /*lantiq,external-clock;*/
 236                         lantiq,delay-hi = <0>; /* 0ns delay */
 237                         lantiq,delay-lo = <0>; /* 0.0ns delay */
 238                         interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
 239                         interrupt-map = <
 240                                 0x7000 0 0 1 &icu0 30 1 // slot 14, irq 30
 241                                 >;
 242                         gpio-reset = <&gpio 21 0>;
 243                         req-mask = <0x1>;       /* GNT1 */
 244                 };
 245         };
 246
 247         gphy-xrx200 {
 248                 compatible = "lantiq,phy-xrx200";
 249                 firmware1 = "lantiq/vr9_phy11g_a1x.bin";        /*VR9 1.1*/
 250                 firmware2 = "lantiq/vr9_phy11g_a2x.bin";        /*VR9 1.2*/
 251                 phys = [ 00 01 ];
 252         };
 253
 254         gpio-keys-polled {
 255                 compatible = "gpio-keys-polled";
 256                 #address-cells = <1>;
 257                 #size-cells = <0>;
 258                 poll-interval = <100>;
 259
 260                 reset {
 261                         label = "reset";
 262                         gpios = <&gpio 39 1>;
 263                         linux,code = <0x198>;
 264                 };
 265
 266                 rfkill {
 267                         label = "rfkill";
 268                         gpios = <&gpio 1 1>;
 269                         linux,code = <0xf7>;
 270                 };
 271         };
 272
 273         gpio-leds {
 274                 compatible = "gpio-leds";
 275
 276                 internet_red {
 277                         label = "p2812hnufx:red:internet";
 278                         gpios = <&stp 16 1>;
 279                 };
 280                 internet_green: internet_green {
 281                         label = "p2812hnufx:green:internet";
 282                         gpios = <&stp 17 1>;
 283                 };
 284                 dsl_green: dsl_green {
 285                         label = "p2812hnufx:green:dsl";
 286                         gpios = <&stp 18 1>;
 287                 };
 288                 dsl_orange {
 289                         label = "p2812hnufx:orange:dsl";
 290                         gpios = <&stp 19 1>;
 291                 };
 292                 wireless_orange {
 293                         label = "p2812hnufx:orange:wlan";
 294                         gpios = <&stp 20 1>;
 295                 };
 296                 wireless_green: wireless_green {
 297                         label = "p2812hnufx:green:wlan";
 298                         gpios = <&stp 21 1>;
 299                 };
 300                 power_red: power {
 301                         label = "p2812hnufx:red:power";
 302                         gpios = <&stp 22 1>;
 303                 };
 304                 power_green: power2 {
 305                         label = "p2812hnufx:green:power";
 306                         gpios = <&stp 23 1>;
 307                         default-state = "keep";
 308                 };
 309                 phone1 {
 310                         label = "p2812hnufx:green:phone";
 311                         gpios = <&gpio 11 1>;
 312                 };
 313                 phone1warn {
 314                         label = "p2812hnufx:orange:phone";
 315                         gpios = <&gpio 12 1>;
 316                 };
 317                 phone2warn {
 318                         label = "p2812hnufx:orange:phone2";
 319                         gpios = <&gpio 26 1>;
 320                 };
 321                 phone2 {
 322                         label = "p2812hnufx:green:phone2";
 323                         gpios = <&gpio 28 1>;
 324                 };
 325         };
 326 };