7199d9a8654c0bec160b0d7857adaa4dd78ddd74
[openwrt/openwrt.git] / target / linux / lantiq / dts / P2812HNUFX.dtsi
1 /include/ "vr9.dtsi"
2
3 / {
4 chosen {
5 bootargs = "console=ttyLTQ0,115200 init=/etc/preinit";
6
7 leds {
8 boot = &power2;
9 failsafe = &power;
10 running = &power2;
11
12 dsl = &dsl;
13 internet = &internet_green;
14 usb = &usb1;
15 usb2 = &usb2;
16 wifi = &wireless_green;
17 };
18 };
19
20 memory@0 {
21 reg = <0x0 0x8000000>;
22 };
23
24 fpi@10000000 {
25 #address-cells = <1>;
26 #size-cells = <1>;
27 compatible = "lantiq,fpi", "simple-bus";
28 ranges = <0x0 0x10000000 0xEEFFFFF>;
29 reg = <0x10000000 0xEF00000>;
30
31 localbus@0 {
32 #address-cells = <2>;
33 #size-cells = <1>;
34 ranges = <0 0 0x0 0x3ffffff /* addrsel0 */
35 1 0 0x4000000 0x4000010>; /* addsel1 */
36 compatible = "lantiq,localbus", "simple-bus";
37 };
38
39 gpio: pinmux@E100B10 {
40 compatible = "lantiq,pinctrl-xr9";
41 pinctrl-names = "default";
42 pinctrl-0 = <&state_default>;
43
44 interrupt-parent = <&icu0>;
45 interrupts = <166 135 66 40 41 42 38>;
46
47 #gpio-cells = <2>;
48 gpio-controller;
49 reg = <0xE100B10 0xA0>;
50
51 state_default: pinmux {
52 exin3 {
53 lantiq,groups = "exin3";
54 lantiq,function = "exin";
55 };
56 mdio {
57 lantiq,groups = "mdio";
58 lantiq,function = "mdio";
59 };
60 gphy-leds {
61 lantiq,groups = "gphy0 led1", "gphy1 led1",
62 "gphy0 led2", "gphy1 led2";
63 lantiq,function = "gphy";
64 lantiq,pull = <2>;
65 lantiq,open-drain = <0>;
66 lantiq,output = <1>;
67 };
68 stp {
69 lantiq,groups = "stp";
70 lantiq,function = "stp";
71 lantiq,pull = <2>;
72 lantiq,open-drain = <0>;
73 lantiq,output = <1>;
74 };
75 pci-in {
76 lantiq,groups = "req1";
77 lantiq,function = "pci";
78 lantiq,output = <0>;
79 lantiq,open-drain = <1>;
80 lantiq,pull = <2>;
81 };
82 pci-out {
83 lantiq,groups = "gnt1";
84 lantiq,function = "pci";
85 lantiq,output = <1>;
86 lantiq,open-drain = <0>;
87 lantiq,pull = <0>;
88 };
89 pci_rst {
90 lantiq,pins = "io21";
91 lantiq,output = <1>;
92 lantiq,open-drain = <0>;
93 lantiq,pull = <2>;
94 };
95 pcie-rst {
96 lantiq,pins = "io38";
97 lantiq,pull = <0>;
98 lantiq,output = <1>;
99 };
100 ifxhcd-rst {
101 lantiq,pins = "io33";
102 lantiq,pull = <0>;
103 lantiq,open-drain = <0>;
104 lantiq,output = <1>;
105 };
106 nand_out {
107 lantiq,groups = "nand cle", "nand ale";
108 lantiq,function = "ebu";
109 lantiq,output = <1>;
110 lantiq,open-drain = <0>;
111 lantiq,pull = <0>;
112 };
113 nand_cs1 {
114 lantiq,groups = "nand cs1";
115 lantiq,function = "ebu";
116 lantiq,open-drain = <0>;
117 lantiq,pull = <0>;
118 };
119 };
120 };
121
122 eth@E108000 {
123 #address-cells = <1>;
124 #size-cells = <0>;
125 compatible = "lantiq,xrx200-net";
126 reg = < 0xE108000 0x3000 /* switch */
127 0xE10B100 0x70 /* mdio */
128 0xE10B1D8 0x30 /* mii */
129 0xE10B308 0x30 >; /* pmac */
130 interrupt-parent = <&icu0>;
131 interrupts = <73 72>;
132
133 lan: interface@0 {
134 compatible = "lantiq,xrx200-pdi";
135 #address-cells = <1>;
136 #size-cells = <0>;
137 reg = <0>;
138 mac-address = [ 00 11 22 33 44 55 ];
139 lantiq,switch;
140
141 ethernet@0 {
142 compatible = "lantiq,xrx200-pdi-port";
143 reg = <0>;
144 phy-mode = "rgmii";
145 phy-handle = <&phy0>;
146 };
147 ethernet@1 {
148 compatible = "lantiq,xrx200-pdi-port";
149 reg = <1>;
150 phy-mode = "rgmii";
151 phy-handle = <&phy1>;
152 };
153 ethernet@2 {
154 compatible = "lantiq,xrx200-pdi-port";
155 reg = <2>;
156 phy-mode = "gmii";
157 phy-handle = <&phy11>;
158 };
159 ethernet@4 {
160 compatible = "lantiq,xrx200-pdi-port";
161 reg = <4>;
162 phy-mode = "gmii";
163 phy-handle = <&phy13>;
164 };
165 ethernet@5 {
166 compatible = "lantiq,xrx200-pdi-port";
167 reg = <5>;
168 phy-mode = "rgmii";
169 phy-handle = <&phy5>;
170 };
171 };
172
173 mdio@0 {
174 #address-cells = <1>;
175 #size-cells = <0>;
176 compatible = "lantiq,xrx200-mdio";
177
178 phy0: ethernet-phy@0 {
179 reg = <0x0>;
180 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
181 };
182 phy1: ethernet-phy@1 {
183 reg = <0x1>;
184 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
185 };
186 phy5: ethernet-phy@5 {
187 reg = <0x5>;
188 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
189 };
190 phy11: ethernet-phy@11 {
191 reg = <0x11>;
192 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
193 };
194 phy13: ethernet-phy@13 {
195 reg = <0x13>;
196 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
197 };
198 };
199 };
200
201 stp: stp@E100BB0 {
202 compatible = "lantiq,gpio-stp-xway";
203 reg = <0xE100BB0 0x40>;
204 #gpio-cells = <2>;
205 gpio-controller;
206
207 lantiq,shadow = <0xffffff>;
208 lantiq,groups = <0x7>;
209 lantiq,dsl = <0x0>;
210 lantiq,phy1 = <0x0>;
211 lantiq,phy2 = <0x0>;
212 };
213
214 ifxhcd@E101000 {
215 status = "okay";
216 gpios = <&gpio 33 0>;
217 lantiq,portmask = <0x3>;
218 };
219
220 ifxhcd@E106000 {
221 status = "okay";
222 gpios = <&gpio 33 0>;
223 };
224
225 pci@E105400 {
226 status = "okay";
227 #address-cells = <3>;
228 #size-cells = <2>;
229 #interrupt-cells = <1>;
230 compatible = "lantiq,pci-xway";
231 bus-range = <0x0 0x0>;
232 ranges = <0x2000000 0 0x8000000 0x8000000 0 0x2000000 /* pci memory */
233 0x1000000 0 0x00000000 0xAE00000 0 0x200000>; /* io space */
234 reg = <0x7000000 0x8000 /* config space */
235 0xE105400 0x400>; /* pci bridge */
236 lantiq,bus-clock = <33333333>;
237 /*lantiq,external-clock;*/
238 lantiq,delay-hi = <0>; /* 0ns delay */
239 lantiq,delay-lo = <0>; /* 0.0ns delay */
240 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
241 interrupt-map = <
242 0x7000 0 0 1 &icu0 30 1 // slot 14, irq 30
243 >;
244 gpio-reset = <&gpio 21 0>;
245 req-mask = <0x1>; /* GNT1 */
246 };
247 };
248
249 gphy-xrx200 {
250 compatible = "lantiq,phy-xrx200";
251 firmware1 = "lantiq/vr9_phy11g_a1x.bin"; /*VR9 1.1*/
252 firmware2 = "lantiq/vr9_phy11g_a2x.bin"; /*VR9 1.2*/
253 phys = [ 00 01 ];
254 };
255
256 gpio-keys-polled {
257 compatible = "gpio-keys-polled";
258 #address-cells = <1>;
259 #size-cells = <0>;
260 poll-interval = <100>;
261
262 reset {
263 label = "reset";
264 gpios = <&gpio 39 1>;
265 linux,code = <0x198>;
266 };
267
268 rfkill {
269 label = "rfkill";
270 gpios = <&gpio 1 1>;
271 linux,code = <0xf7>;
272 };
273 };
274
275 gpio-leds {
276 compatible = "gpio-leds";
277
278 internet_red { /* red */
279 label = "internet_red";
280 gpios = <&stp 16 1>;
281 };
282 internet_green: internet_green {
283 label = "internet_green"; /* green */
284 gpios = <&stp 17 1>;
285 };
286 dsl: dsl {
287 label = "dsl";
288 gpios = <&stp 18 1>;
289 };
290 dsl2 {
291 label = "dsl2";
292 gpios = <&stp 19 1>;
293 };
294 wireless_red { /* red */
295 label = "wireless_red";
296 gpios = <&stp 20 1>;
297 };
298 wireless_green: wireless_green { /* green */
299 label = "wireless_green";
300 gpios = <&stp 21 1>;
301 };
302 power: power { /* red */
303 label = "power";
304 gpios = <&stp 22 1>;
305 };
306 power2: power2 { /* green */
307 label = "power2";
308 gpios = <&stp 23 1>;
309 default-state = "keep";
310 };
311 usb1: usb1 { /* green */
312 label = "usb1";
313 gpios = <&gpio 38 1>;
314 };
315 usb2: usb2 { /* green */
316 label = "usb2";
317 gpios = <&gpio 44 1>;
318 };
319 phone1 { /* green */
320 label = "phone1";
321 gpios = <&gpio 11 1>;
322 };
323 phone1warn { /* red */
324 label = "phone1warn";
325 gpios = <&gpio 12 1>;
326 };
327 phone2warn { /* red */
328 label = "phone2warn";
329 gpios = <&gpio 26 1>;
330 };
331 phone2 { /* green */
332 label = "phone2";
333 gpios = <&gpio 28 1>;
334 };
335 };
336 };