lantiq: Move the definition of the xrx200-net node to vr9.dtsi
[openwrt/openwrt.git] / target / linux / lantiq / dts / P2812HNUFX.dtsi
1 /include/ "vr9.dtsi"
2
3 / {
4 chosen {
5 bootargs = "console=ttyLTQ0,115200 init=/etc/preinit";
6
7 leds {
8 boot = &power_green;
9 failsafe = &power_red;
10 running = &power_green;
11
12 dsl = &dsl_green;
13 internet = &internet_green;
14 wifi = &wireless_green;
15 };
16 };
17
18 memory@0 {
19 reg = <0x0 0x8000000>;
20 };
21
22 fpi@10000000 {
23 #address-cells = <1>;
24 #size-cells = <1>;
25 compatible = "lantiq,fpi", "simple-bus";
26 ranges = <0x0 0x10000000 0xEEFFFFF>;
27 reg = <0x10000000 0xEF00000>;
28
29 localbus@0 {
30 #address-cells = <2>;
31 #size-cells = <1>;
32 ranges = <0 0 0x0 0x3ffffff /* addrsel0 */
33 1 0 0x4000000 0x4000010>; /* addsel1 */
34 compatible = "lantiq,localbus", "simple-bus";
35 };
36
37 gpio: pinmux@E100B10 {
38 compatible = "lantiq,pinctrl-xr9";
39 pinctrl-names = "default";
40 pinctrl-0 = <&state_default>;
41
42 interrupt-parent = <&icu0>;
43 interrupts = <166 135 66 40 41 42 38>;
44
45 #gpio-cells = <2>;
46 gpio-controller;
47 reg = <0xE100B10 0xA0>;
48
49 state_default: pinmux {
50 exin3 {
51 lantiq,groups = "exin3";
52 lantiq,function = "exin";
53 };
54 mdio {
55 lantiq,groups = "mdio";
56 lantiq,function = "mdio";
57 };
58 gphy-leds {
59 lantiq,groups = "gphy0 led1", "gphy1 led1",
60 "gphy0 led2", "gphy1 led2";
61 lantiq,function = "gphy";
62 lantiq,pull = <2>;
63 lantiq,open-drain = <0>;
64 lantiq,output = <1>;
65 };
66 stp {
67 lantiq,groups = "stp";
68 lantiq,function = "stp";
69 lantiq,pull = <2>;
70 lantiq,open-drain = <0>;
71 lantiq,output = <1>;
72 };
73 pci-in {
74 lantiq,groups = "req1";
75 lantiq,function = "pci";
76 lantiq,output = <0>;
77 lantiq,open-drain = <1>;
78 lantiq,pull = <2>;
79 };
80 pci-out {
81 lantiq,groups = "gnt1";
82 lantiq,function = "pci";
83 lantiq,output = <1>;
84 lantiq,open-drain = <0>;
85 lantiq,pull = <0>;
86 };
87 pci_rst {
88 lantiq,pins = "io21";
89 lantiq,output = <1>;
90 lantiq,open-drain = <0>;
91 lantiq,pull = <2>;
92 };
93 pcie-rst {
94 lantiq,pins = "io38";
95 lantiq,pull = <0>;
96 lantiq,output = <1>;
97 };
98 ifxhcd-rst {
99 lantiq,pins = "io33";
100 lantiq,pull = <0>;
101 lantiq,open-drain = <0>;
102 lantiq,output = <1>;
103 };
104 nand_out {
105 lantiq,groups = "nand cle", "nand ale";
106 lantiq,function = "ebu";
107 lantiq,output = <1>;
108 lantiq,open-drain = <0>;
109 lantiq,pull = <0>;
110 };
111 nand_cs1 {
112 lantiq,groups = "nand cs1";
113 lantiq,function = "ebu";
114 lantiq,open-drain = <0>;
115 lantiq,pull = <0>;
116 };
117 };
118 };
119
120 stp: stp@E100BB0 {
121 compatible = "lantiq,gpio-stp-xway";
122 reg = <0xE100BB0 0x40>;
123 #gpio-cells = <2>;
124 gpio-controller;
125
126 lantiq,shadow = <0xffffff>;
127 lantiq,groups = <0x7>;
128 lantiq,dsl = <0x0>;
129 lantiq,phy1 = <0x0>;
130 lantiq,phy2 = <0x0>;
131 };
132
133 ifxhcd@E101000 {
134 status = "okay";
135 gpios = <&gpio 33 0>;
136 lantiq,portmask = <0x3>;
137 };
138
139 ifxhcd@E106000 {
140 status = "okay";
141 gpios = <&gpio 33 0>;
142 };
143
144 pci@E105400 {
145 status = "okay";
146 #address-cells = <3>;
147 #size-cells = <2>;
148 #interrupt-cells = <1>;
149 compatible = "lantiq,pci-xway";
150 bus-range = <0x0 0x0>;
151 ranges = <0x2000000 0 0x8000000 0x8000000 0 0x2000000 /* pci memory */
152 0x1000000 0 0x00000000 0xAE00000 0 0x200000>; /* io space */
153 reg = <0x7000000 0x8000 /* config space */
154 0xE105400 0x400>; /* pci bridge */
155 lantiq,bus-clock = <33333333>;
156 /*lantiq,external-clock;*/
157 lantiq,delay-hi = <0>; /* 0ns delay */
158 lantiq,delay-lo = <0>; /* 0.0ns delay */
159 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
160 interrupt-map = <
161 0x7000 0 0 1 &icu0 30 1 // slot 14, irq 30
162 >;
163 gpio-reset = <&gpio 21 0>;
164 req-mask = <0x1>; /* GNT1 */
165 };
166 };
167
168 gphy-xrx200 {
169 compatible = "lantiq,phy-xrx200";
170 firmware1 = "lantiq/vr9_phy11g_a1x.bin"; /*VR9 1.1*/
171 firmware2 = "lantiq/vr9_phy11g_a2x.bin"; /*VR9 1.2*/
172 phys = [ 00 01 ];
173 };
174
175 gpio-keys-polled {
176 compatible = "gpio-keys-polled";
177 #address-cells = <1>;
178 #size-cells = <0>;
179 poll-interval = <100>;
180
181 reset {
182 label = "reset";
183 gpios = <&gpio 39 1>;
184 linux,code = <0x198>;
185 };
186
187 rfkill {
188 label = "rfkill";
189 gpios = <&gpio 1 1>;
190 linux,code = <0xf7>;
191 };
192 };
193
194 gpio-leds {
195 compatible = "gpio-leds";
196
197 internet_red {
198 label = "p2812hnufx:red:internet";
199 gpios = <&stp 16 1>;
200 };
201 internet_green: internet_green {
202 label = "p2812hnufx:green:internet";
203 gpios = <&stp 17 1>;
204 };
205 dsl_green: dsl_green {
206 label = "p2812hnufx:green:dsl";
207 gpios = <&stp 18 1>;
208 };
209 dsl_orange {
210 label = "p2812hnufx:orange:dsl";
211 gpios = <&stp 19 1>;
212 };
213 wireless_orange {
214 label = "p2812hnufx:orange:wlan";
215 gpios = <&stp 20 1>;
216 };
217 wireless_green: wireless_green {
218 label = "p2812hnufx:green:wlan";
219 gpios = <&stp 21 1>;
220 };
221 power_red: power {
222 label = "p2812hnufx:red:power";
223 gpios = <&stp 22 1>;
224 };
225 power_green: power2 {
226 label = "p2812hnufx:green:power";
227 gpios = <&stp 23 1>;
228 default-state = "keep";
229 };
230 phone1 {
231 label = "p2812hnufx:green:phone";
232 gpios = <&gpio 11 1>;
233 };
234 phone1warn {
235 label = "p2812hnufx:orange:phone";
236 gpios = <&gpio 12 1>;
237 };
238 phone2warn {
239 label = "p2812hnufx:orange:phone2";
240 gpios = <&gpio 26 1>;
241 };
242 phone2 {
243 label = "p2812hnufx:green:phone2";
244 gpios = <&gpio 28 1>;
245 };
246 };
247 };
248
249 &eth0 {
250 lan: interface@0 {
251 compatible = "lantiq,xrx200-pdi";
252 #address-cells = <1>;
253 #size-cells = <0>;
254 reg = <0>;
255 mac-address = [ 00 11 22 33 44 55 ];
256 lantiq,switch;
257
258 ethernet@0 {
259 compatible = "lantiq,xrx200-pdi-port";
260 reg = <0>;
261 phy-mode = "rgmii";
262 phy-handle = <&phy0>;
263 };
264 ethernet@1 {
265 compatible = "lantiq,xrx200-pdi-port";
266 reg = <1>;
267 phy-mode = "rgmii";
268 phy-handle = <&phy1>;
269 };
270 ethernet@2 {
271 compatible = "lantiq,xrx200-pdi-port";
272 reg = <2>;
273 phy-mode = "gmii";
274 phy-handle = <&phy11>;
275 };
276 ethernet@4 {
277 compatible = "lantiq,xrx200-pdi-port";
278 reg = <4>;
279 phy-mode = "gmii";
280 phy-handle = <&phy13>;
281 };
282 ethernet@5 {
283 compatible = "lantiq,xrx200-pdi-port";
284 reg = <5>;
285 phy-mode = "rgmii";
286 phy-handle = <&phy5>;
287 };
288 };
289
290 mdio@0 {
291 #address-cells = <1>;
292 #size-cells = <0>;
293 compatible = "lantiq,xrx200-mdio";
294
295 phy0: ethernet-phy@0 {
296 reg = <0x0>;
297 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
298 };
299 phy1: ethernet-phy@1 {
300 reg = <0x1>;
301 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
302 };
303 phy5: ethernet-phy@5 {
304 reg = <0x5>;
305 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
306 };
307 phy11: ethernet-phy@11 {
308 reg = <0x11>;
309 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
310 };
311 phy13: ethernet-phy@13 {
312 reg = <0x13>;
313 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
314 };
315 };
316 };