cb0d5ddecd2f1220a10593b283e77c33a3e962d3
[openwrt/openwrt.git] / target / linux / lantiq / dts / VG3503J.dts
1 /dts-v1/;
2
3 #include "vr9.dtsi"
4
5 #include <dt-bindings/input/input.h>
6
7 / {
8 compatible = "arcadyan,vg3503j", "lantiq,xway", "lantiq,vr9";
9 model = "BT OpenReach VDSL Modem";
10
11 chosen {
12 bootargs = "console=ttyLTQ0,115200";
13 };
14
15 aliases {
16 led-boot = &power_green;
17 led-failsafe = &power_red;
18 led-running = &power_green;
19
20 led-dsl = &dsl;
21 };
22
23 memory@0 {
24 reg = <0x0 0x2000000>;
25 };
26
27 fpi@10000000 {
28 localbus@0 {
29 ranges = <0 0 0x0 0x3ffffff>;
30 nor-boot@0 {
31 compatible = "lantiq,nor";
32 bank-width = <2>;
33 reg = <0 0x0 0x2000000>;
34 #address-cells = <1>;
35 #size-cells = <1>;
36
37 partitions {
38 compatible = "fixed-partitions";
39 #address-cells = <1>;
40 #size-cells = <1>;
41
42 partition@0 {
43 label = "uboot";
44 reg = <0x00000 0x20000>;
45 };
46
47 partition@20000 {
48 label = "firmware";
49 reg = <0x20000 0x7d0000>;
50 };
51
52 partition@7f0000 {
53 label = "uboot-env";
54 reg = <0x7f0000 0x10000>;
55 };
56 };
57 };
58 };
59
60 gpio: pinmux@E100B10 {
61 pinctrl-names = "default";
62 pinctrl-0 = <&state_default>;
63
64 state_default: pinmux {
65 mdio {
66 lantiq,groups = "mdio";
67 lantiq,function = "mdio";
68 };
69 gphy-leds {
70 lantiq,groups = "gphy0 led0", "gphy0 led1",
71 "gphy0 led2", "gphy1 led0",
72 "gphy1 led1", "gphy1 led2";
73 lantiq,function = "gphy";
74 lantiq,pull = <2>;
75 lantiq,open-drain = <0>;
76 lantiq,output = <1>;
77 };
78 };
79 };
80 };
81
82 gphy-xrx200 {
83 compatible = "lantiq,phy-xrx200";
84 firmware1 = "lantiq/vr9_phy11g_a1x.bin"; /*VR9 1.1*/
85 firmware2 = "lantiq/vr9_phy11g_a2x.bin"; /*VR9 1.2*/
86 phys = [ 00 01 ];
87 };
88
89 gpio-keys-polled {
90 compatible = "gpio-keys-polled";
91 #address-cells = <1>;
92 #size-cells = <0>;
93 poll-interval = <100>;
94 reset {
95 label = "reset";
96 gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
97 linux,code = <KEY_RESTART>;
98 };
99 };
100
101 gpio-leds {
102 compatible = "gpio-leds";
103
104 power_red: power2 {
105 label = "vg3503j:red:power";
106 gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
107 };
108 dsl: dsl {
109 label = "vg3503j:green:dsl";
110 gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
111 };
112 power_green: power {
113 label = "vg3503j:green:power";
114 gpios = <&gpio 28 GPIO_ACTIVE_LOW>;
115 default-state = "keep";
116 };
117 };
118 };
119
120 &eth0 {
121 interface@0 {
122 compatible = "lantiq,xrx200-pdi";
123 #address-cells = <1>;
124 #size-cells = <0>;
125 reg = <0>;
126
127 lantiq,switch;
128 ethernet@2 {
129 compatible = "lantiq,xrx200-pdi-port";
130 reg = <2>;
131 phy-mode = "mii";
132 phy-handle = <&phy11>;
133 };
134 ethernet@4 {
135 compatible = "lantiq,xrx200-pdi-port";
136 reg = <4>;
137 phy-mode = "mii";
138 phy-handle = <&phy13>;
139 };
140 };
141
142 mdio@0 {
143 #address-cells = <1>;
144 #size-cells = <0>;
145 compatible = "lantiq,xrx200-mdio";
146 phy11: ethernet-phy@11 {
147 reg = <0x11>;
148 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
149 lantiq,led1h = <0x70>;
150 lantiq,led1l = <0x00>;
151 lantiq,led2h = <0x00>;
152 lantiq,led2l = <0x03>;
153 };
154 phy13: ethernet-phy@13 {
155 reg = <0x13>;
156 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
157 lantiq,led1h = <0x70>;
158 lantiq,led1l = <0x00>;
159 lantiq,led2h = <0x00>;
160 lantiq,led2l = <0x03>;
161 };
162 };
163 };