6754afd2017443e5a171bd732e432ac9ff5f068c
[openwrt/openwrt.git] / target / linux / lantiq / dts / vr9.dtsi
1 #include <dt-bindings/gpio/gpio.h>
2 #include <dt-bindings/input/input.h>
3
4 / {
5 #address-cells = <1>;
6 #size-cells = <1>;
7 compatible = "lantiq,xway", "lantiq,vr9";
8
9 cpus {
10 cpu@0 {
11 compatible = "mips,mips34Kc";
12 };
13 };
14
15 memory@0 {
16 device_type = "memory";
17 };
18
19 biu@1F800000 {
20 #address-cells = <1>;
21 #size-cells = <1>;
22 compatible = "lantiq,biu", "simple-bus";
23 reg = <0x1F800000 0x800000>;
24 ranges = <0x0 0x1F800000 0x7FFFFF>;
25
26 icu0: icu@80200 {
27 #interrupt-cells = <1>;
28 interrupt-controller;
29 compatible = "lantiq,icu";
30 reg = <0x80200 0x28
31 0x80228 0x28
32 0x80250 0x28
33 0x80278 0x28
34 0x802a0 0x28>;
35 };
36
37 watchdog@803F0 {
38 compatible = "lantiq,wdt";
39 reg = <0x803F0 0x10>;
40 };
41 };
42
43 sram@1F000000 {
44 #address-cells = <1>;
45 #size-cells = <1>;
46 compatible = "lantiq,sram", "simple-bus";
47 reg = <0x1F000000 0x800000>;
48 ranges = <0x0 0x1F000000 0x7FFFFF>;
49
50 eiu0: eiu@101000 {
51 #interrupt-cells = <1>;
52 interrupt-controller;
53 compatible = "lantiq,eiu-xway";
54 reg = <0x101000 0x1000>;
55 interrupt-parent = <&icu0>;
56 lantiq,eiu-irqs = <166 135 66 40 41 42>;
57 };
58
59 pmu0: pmu@102000 {
60 compatible = "lantiq,pmu-xway";
61 reg = <0x102000 0x1000>;
62 };
63
64 cgu0: cgu@103000 {
65 compatible = "lantiq,cgu-xway";
66 reg = <0x103000 0x1000>;
67 };
68
69 dcdc@106a00 {
70 compatible = "lantiq,dcdc-xrx200";
71 reg = <0x106a00 0x200>;
72 };
73
74 rcu0: rcu@203000 {
75 compatible = "lantiq,rcu-xrx200";
76 reg = <0x203000 0x1000>;
77 /* irq for thermal sensor */
78 interrupt-parent = <&icu0>;
79 interrupts = <115>;
80 };
81
82 xbar0: xbar@400000 {
83 compatible = "lantiq,xbar-xway";
84 reg = <0x400000 0x1000>;
85 };
86 };
87
88 fpi@10000000 {
89 #address-cells = <1>;
90 #size-cells = <1>;
91 compatible = "lantiq,fpi", "simple-bus";
92 ranges = <0x0 0x10000000 0xEEFFFFF>;
93 reg = <0x10000000 0xEF00000>;
94
95 localbus@0 {
96 #address-cells = <2>;
97 #size-cells = <1>;
98 ranges = <0 0 0x0 0x3ffffff /* addrsel0 */
99 1 0 0x4000000 0x4000010>; /* addsel1 */
100 compatible = "lantiq,localbus", "simple-bus";
101 };
102
103 gptu@E100A00 {
104 compatible = "lantiq,gptu-xway";
105 reg = <0xE100A00 0x100>;
106 interrupt-parent = <&icu0>;
107 interrupts = <126 127 128 129 130 131>;
108 };
109
110 asc0: serial@E100400 {
111 compatible = "lantiq,asc";
112 reg = <0xE100400 0x400>;
113 interrupt-parent = <&icu0>;
114 interrupts = <104 105 106>;
115 status = "disabled";
116 };
117
118 spi: spi@E100800 {
119 compatible = "lantiq,xrx200-spi";
120 reg = <0xE100800 0x100>;
121 interrupt-parent = <&icu0>;
122 interrupts = <22 23 24>;
123 interrupt-names = "spi_rx", "spi_tx", "spi_err",
124 "spi_frm";
125 #address-cells = <1>;
126 #size-cells = <1>;
127 status = "disabled";
128 };
129
130 gpio: pinmux@E100B10 {
131 compatible = "lantiq,xrx200-pinctrl";
132 #gpio-cells = <2>;
133 gpio-controller;
134 reg = <0xE100B10 0xA0>;
135 };
136
137 asc1: serial@E100C00 {
138 compatible = "lantiq,asc";
139 reg = <0xE100C00 0x400>;
140 interrupt-parent = <&icu0>;
141 interrupts = <112 113 114>;
142 };
143
144 deu@E103100 {
145 compatible = "lantiq,deu-xrx200";
146 reg = <0xE103100 0xf00>;
147 };
148
149 dma0: dma@E104100 {
150 compatible = "lantiq,dma-xway";
151 reg = <0xE104100 0x800>;
152 };
153
154 ebu0: ebu@E105300 {
155 compatible = "lantiq,ebu-xway";
156 reg = <0xE105300 0x100>;
157 };
158
159 ifxhcd@E101000 {
160 status = "disabled";
161 compatible = "lantiq,ifxhcd-xrx200", "lantiq,ifxhcd-xrx200-dwc2";
162 reg = <0xE101000 0x1000
163 0xE120000 0x3f000>;
164 interrupt-parent = <&icu0>;
165 interrupts = <62 91>;
166 };
167
168 ifxhcd@E106000 {
169 status = "disabled";
170 compatible = "lantiq,ifxhcd-xrx200-dwc2";
171 reg = <0xE106000 0x1000>;
172 interrupt-parent = <&icu0>;
173 interrupts = <91>;
174 };
175
176 eth0: eth@E108000 {
177 #address-cells = <1>;
178 #size-cells = <0>;
179 compatible = "lantiq,xrx200-net";
180 reg = < 0xE108000 0x3000 /* switch */
181 0xE10B100 0x70 /* mdio */
182 0xE10B1D8 0x30 /* mii */
183 0xE10B308 0x30 /* pmac */
184 >;
185 interrupt-parent = <&icu0>;
186 interrupts = <75 73 72>;
187 };
188
189 mei@E116000 {
190 compatible = "lantiq,mei-xrx200";
191 reg = <0xE116000 0x9c>;
192 interrupt-parent = <&icu0>;
193 interrupts = <63>;
194 };
195
196 ppe@E234000 {
197 compatible = "lantiq,ppe-xrx200";
198 interrupt-parent = <&icu0>;
199 interrupts = <96>;
200 };
201
202 pcie@d900000 {
203 interrupt-parent = <&icu0>;
204 interrupts = <161 144>;
205 compatible = "lantiq,pcie-xrx200";
206 gpio-reset = <&gpio 38 GPIO_ACTIVE_HIGH>;
207 };
208
209 pci0: pci@E105400 {
210 #address-cells = <3>;
211 #size-cells = <2>;
212 #interrupt-cells = <1>;
213 compatible = "lantiq,pci-xway";
214 bus-range = <0x0 0x0>;
215 ranges = <0x2000000 0 0x8000000 0x8000000 0 0x2000000 /* pci memory */
216 0x1000000 0 0x00000000 0xAE00000 0 0x200000>; /* io space */
217 reg = <0x7000000 0x8000 /* config space */
218 0xE105400 0x400>; /* pci bridge */
219 status = "disabled";
220 };
221 };
222
223 vdsl {
224 compatible = "lantiq,vdsl-vrx200";
225 };
226 };