lantiq: kernel 4.14: use vbus-supply devicetree property
[openwrt/openwrt.git] / target / linux / lantiq / files-4.14 / arch / mips / boot / dts / FRITZ3370-REV2.dtsi
1 #include "vr9.dtsi"
2
3 #include <dt-bindings/input/input.h>
4 #include <dt-bindings/mips/lantiq_rcu_gphy.h>
5
6 / {
7 compatible = "avm,fritz3370-rev2", "lantiq,xway", "lantiq,vr9";
8 model = "AVM Fritz!Box WLAN 3370 Rev. 2";
9
10 chosen {
11 bootargs = "console=ttyLTQ0,115200";
12 };
13
14 aliases {
15 led-boot = &power_green;
16 led-failsafe = &power_red;
17 led-running = &power_green;
18
19 led-dsl = &dsl;
20 led-internet = &info_green;
21 led-wifi = &wifi;
22 };
23
24 memory@0 {
25 reg = <0x0 0x8000000>;
26 };
27
28 gpio-poweroff {
29 compatible = "gpio-poweroff";
30 gpios = <&gpio 45 GPIO_ACTIVE_HIGH>;
31 };
32
33 gpio-keys-polled {
34 compatible = "gpio-keys-polled";
35 #address-cells = <1>;
36 #size-cells = <0>;
37 poll-interval = <100>;
38
39 power {
40 label = "power";
41 gpios = <&gpio 1 GPIO_ACTIVE_HIGH>;
42 linux,code = <KEY_POWER>;
43 };
44
45 wifi {
46 label = "wlan";
47 gpios = <&gpio 29 GPIO_ACTIVE_HIGH>;
48 linux,code = <KEY_WLAN>;
49 };
50 };
51
52 gpio-leds {
53 compatible = "gpio-leds";
54
55 power_green: power {
56 label = "fritz3370:green:power";
57 gpios = <&gpio 32 GPIO_ACTIVE_LOW>;
58 default-state = "keep";
59 };
60
61 power_red: power2 {
62 label = "fritz3370:red:power";
63 gpios = <&gpio 33 GPIO_ACTIVE_LOW>;
64 };
65
66 info_red {
67 label = "fritz3370:red:info";
68 gpios = <&gpio 34 GPIO_ACTIVE_LOW>;
69 };
70
71 wifi: wifi {
72 label = "fritz3370:green:wlan";
73 gpios = <&gpio 35 GPIO_ACTIVE_LOW>;
74 };
75
76 dsl: dsl {
77 label = "fritz3370:green:dsl";
78 gpios = <&gpio 36 GPIO_ACTIVE_LOW>;
79 };
80
81 lan {
82 label = "fritz3370:green:lan";
83 gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
84 };
85
86 info_green: info_green {
87 label = "fritz3370:green:info";
88 gpios = <&gpio 47 GPIO_ACTIVE_LOW>;
89 };
90 };
91
92 usb0_vbus: regulator-usb0-vbus {
93 compatible = "regulator-fixed";
94
95 regulator-name = "USB0_VBUS";
96
97 regulator-min-microvolt = <5000000>;
98 regulator-max-microvolt = <5000000>;
99
100 gpio = <&gpio 14 GPIO_ACTIVE_HIGH>;
101 enable-active-high;
102 };
103
104 usb1_vbus: regulator-usb1-vbus {
105 compatible = "regulator-fixed";
106
107 regulator-name = "USB1_VBUS";
108
109 regulator-min-microvolt = <5000000>;
110 regulator-max-microvolt = <5000000>;
111
112 gpio = <&gpio 5 GPIO_ACTIVE_HIGH>;
113 enable-active-high;
114 };
115 };
116
117 &eth0 {
118 lan: interface@0 {
119 compatible = "lantiq,xrx200-pdi";
120 #address-cells = <1>;
121 #size-cells = <0>;
122 reg = <0>;
123 lantiq,switch;
124
125 ethernet@0 {
126 compatible = "lantiq,xrx200-pdi-port";
127 reg = <0>;
128 phy-mode = "rgmii";
129 phy-handle = <&phy0>;
130 gpios = <&gpio 37 GPIO_ACTIVE_HIGH>;
131 };
132
133 ethernet@1 {
134 compatible = "lantiq,xrx200-pdi-port";
135 reg = <1>;
136 phy-mode = "rgmii";
137 phy-handle = <&phy1>;
138 gpios = <&gpio 44 GPIO_ACTIVE_HIGH>;
139 };
140
141 ethernet@2 {
142 compatible = "lantiq,xrx200-pdi-port";
143 reg = <2>;
144 phy-mode = "gmii";
145 phy-handle = <&phy11>;
146 };
147
148 ethernet@4 {
149 compatible = "lantiq,xrx200-pdi-port";
150 reg = <4>;
151 phy-mode = "gmii";
152 phy-handle = <&phy13>;
153 };
154 };
155
156 mdio@0 {
157 #address-cells = <1>;
158 #size-cells = <0>;
159 compatible = "lantiq,xrx200-mdio";
160 reg = <0>;
161
162 phy0: ethernet-phy@0 {
163 reg = <0x0>;
164 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
165 };
166
167 phy1: ethernet-phy@1 {
168 reg = <0x1>;
169 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
170 };
171
172 phy11: ethernet-phy@11 {
173 reg = <0x11>;
174 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
175 };
176
177 phy13: ethernet-phy@13 {
178 reg = <0x13>;
179 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
180 };
181 };
182 };
183
184 &gphy0 {
185 lantiq,gphy-mode = <GPHY_MODE_GE>;
186 };
187
188 &gphy1 {
189 lantiq,gphy-mode = <GPHY_MODE_GE>;
190 };
191
192 &gpio {
193 pinctrl-names = "default";
194 pinctrl-0 = <&state_default>;
195
196 state_default: pinmux {
197 mdio {
198 lantiq,groups = "mdio";
199 lantiq,function = "mdio";
200 };
201
202 nand {
203 lantiq,groups = "nand cle", "nand ale",
204 "nand rd", "nand cs1", "nand rdy";
205 lantiq,function = "ebu";
206 lantiq,pull = <1>;
207 };
208
209 phy-rst {
210 lantiq,pins = "io37", "io44";
211 lantiq,pull = <0>;
212 lantiq,open-drain = <0>;
213 lantiq,output = <1>;
214 };
215
216 pcie-rst {
217 lantiq,pins = "io21";
218 lantiq,pull = <0>;
219 lantiq,output = <1>;
220 };
221 };
222
223 pins_spi_default: pins_spi_default {
224 spi_in {
225 lantiq,groups = "spi_di";
226 lantiq,function = "spi";
227 };
228
229 spi_out {
230 lantiq,groups = "spi_do", "spi_clk",
231 "spi_cs4";
232 lantiq,function = "spi";
233 lantiq,output = <1>;
234 };
235 };
236 };
237
238 &pcie0 {
239 gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
240
241 pcie@0 {
242 reg = <0 0 0 0 0>;
243 #interrupt-cells = <1>;
244 #size-cells = <2>;
245 #address-cells = <3>;
246 device_type = "pci";
247
248 wifi@0,0 {
249 compatible = "pci0,0";
250 reg = <0 0 0 0 0>;
251 qca,no-eeprom; /* load from ath9k-eeprom-pci-0000:01:00.0.bin */
252 };
253 };
254 };
255
256 &spi {
257 status = "okay";
258
259 pinctrl-names = "default";
260 pinctrl-0 = <&pins_spi_default>;
261
262 m25p80@4 {
263 #address-cells = <1>;
264 #size-cells = <1>;
265 compatible = "jedec,spi-nor";
266 reg = <4 0>;
267 spi-max-frequency = <1000000>;
268
269 urlader: partition@0 {
270 reg = <0x0 0x20000>;
271 label = "urlader";
272 read-only;
273 };
274
275 partition@20000 {
276 reg = <0x20000 0x10000>;
277 label = "tffs (1)";
278 read-only;
279 };
280
281 partition@30000 {
282 reg = <0x30000 0x10000>;
283 label = "tffs (2)";
284 read-only;
285 };
286 };
287 };
288
289 &usb_phy0 {
290 status = "okay";
291 };
292
293 &usb_phy1 {
294 status = "okay";
295 };
296
297 &usb0 {
298 status = "okay";
299 vbus-supply = <&usb0_vbus>;
300 };
301
302 &usb1 {
303 status = "okay";
304 vbus-supply = <&usb1_vbus>;
305 };