target/linux/lantiq/files-4.14/arch/mips/boot/dts/TDW89X0.dtsi

   1 #include "vr9.dtsi"
   2
   3 #include <dt-bindings/input/input.h>
   4 #include <dt-bindings/mips/lantiq_rcu_gphy.h>
   5
   6 / {
   7         compatible = "tplink,tdw89x0", "lantiq,xway", "lantiq,vr9";
   8
   9         chosen {
  10                 bootargs = "console=ttyLTQ0,115200";
  11         };
  12
  13         aliases {
  14                 /* the power led can't be controlled, use the wps led instead */
  15                 led-boot = &wps;
  16                 led-failsafe = &wps;
  17
  18                 led-dsl = &dsl;
  19                 led-internet = &internet;
  20                 led-wifi = &wifi;
  21                 led-usb = &led_usb0;
  22                 led-usb2 = &led_usb2;
  23         };
  24
  25         memory@0 {
  26                 reg = <0x0 0x4000000>;
  27         };
  28
  29         gpio-keys-polled {
  30                 compatible = "gpio-keys-polled";
  31                 #address-cells = <1>;
  32                 #size-cells = <0>;
  33                 poll-interval = <100>;
  34                 reset {
  35                         label = "reset";
  36                         gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
  37                         linux,code = <KEY_RESTART>;
  38                 };
  39
  40                 wifi {
  41                         label = "wifi";
  42                         gpios = <&gpio 9 GPIO_ACTIVE_HIGH>;
  43                         linux,code = <KEY_RFKILL>;
  44                         linux,input-type = <EV_SW>;
  45                 };
  46
  47                 wps {
  48                         label = "wps";
  49                         gpios = <&gpio 39 GPIO_ACTIVE_LOW>;
  50                         linux,code = <KEY_WPS_BUTTON>;
  51                 };
  52         };
  53
  54         gpio-leds {
  55                 compatible = "gpio-leds";
  56                 /*
  57                         power is not controllable via gpio
  58                 */
  59                 dsl: dsl {
  60                         label = "tdw89x0:green:dsl";
  61                         gpios = <&gpio 4 GPIO_ACTIVE_HIGH>;
  62                 };
  63                 internet: internet {
  64                         label = "tdw89x0:green:internet";
  65                         gpios = <&gpio 5 GPIO_ACTIVE_HIGH>;
  66                 };
  67
  68                 led_usb0: usb0 {
  69                         label = "tdw89x0:green:usb";
  70                         gpios = <&gpio 19 GPIO_ACTIVE_HIGH>;
  71                 };
  72                 led_usb2: usb2 {
  73                         label = "tdw89x0:green:usb2";
  74                         gpios = <&gpio 20 GPIO_ACTIVE_HIGH>;
  75                 };
  76                 wps: wps {
  77                         label = "tdw89x0:green:wps";
  78                         gpios = <&gpio 37 GPIO_ACTIVE_HIGH>;
  79                 };
  80         };
  81
  82         wifi-leds {
  83                 compatible = "gpio-leds";
  84
  85                 wifi: wifi {
  86                         label = "tdw89x0:green:wifi";
  87                         gpios = <&ath9k 0 GPIO_ACTIVE_HIGH>;
  88                 };
  89         };
  90
  91
  92         usb_vbus: regulator-usb-vbus {
  93                 compatible = "regulator-fixed";
  94
  95                 regulator-name = "USB_VBUS";
  96
  97                 regulator-min-microvolt = <5000000>;
  98                 regulator-max-microvolt = <5000000>;
  99
 100                 gpio = <&gpio 33 GPIO_ACTIVE_HIGH>;
 101                 enable-active-high;
 102         };
 103 };
 104
 105 &eth0 {
 106         lan: interface@0 {
 107                 compatible = "lantiq,xrx200-pdi";
 108                 #address-cells = <1>;
 109                 #size-cells = <0>;
 110                 reg = <0>;
 111                 mtd-mac-address = <&ath9k_cal 0xf100>;
 112                 lantiq,switch;
 113
 114                 ethernet@0 {
 115                         compatible = "lantiq,xrx200-pdi-port";
 116                         reg = <0>;
 117                         phy-mode = "rgmii";
 118                         phy-handle = <&phy0>;
 119                         // gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
 120                 };
 121                 ethernet@5 {
 122                         compatible = "lantiq,xrx200-pdi-port";
 123                         reg = <5>;
 124                         phy-mode = "rgmii";
 125                         phy-handle = <&phy5>;
 126                 };
 127                 ethernet@2 {
 128                         compatible = "lantiq,xrx200-pdi-port";
 129                         reg = <2>;
 130                         phy-mode = "gmii";
 131                         phy-handle = <&phy11>;
 132                 };
 133                 ethernet@3 {
 134                         compatible = "lantiq,xrx200-pdi-port";
 135                         reg = <4>;
 136                         phy-mode = "gmii";
 137                         phy-handle = <&phy13>;
 138                 };
 139         };
 140
 141         mdio@0 {
 142                 #address-cells = <1>;
 143                 #size-cells = <0>;
 144                 compatible = "lantiq,xrx200-mdio";
 145                 reg = <0>;
 146
 147                 phy0: ethernet-phy@0 {
 148                         reg = <0x0>;
 149                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 150                 };
 151                 phy5: ethernet-phy@5 {
 152                         reg = <0x5>;
 153                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 154                 };
 155                 phy11: ethernet-phy@11 {
 156                         reg = <0x11>;
 157                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 158                 };
 159                 phy13: ethernet-phy@13 {
 160                         reg = <0x13>;
 161                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 162                 };
 163         };
 164 };
 165
 166 &gphy0 {
 167         lantiq,gphy-mode = <GPHY_MODE_GE>;
 168 };
 169
 170 &gphy1 {
 171         lantiq,gphy-mode = <GPHY_MODE_GE>;
 172 };
 173
 174 &gpio {
 175         pinctrl-names = "default";
 176         pinctrl-0 = <&state_default>;
 177
 178         state_default: pinmux {
 179                 mdio {
 180                         lantiq,groups = "mdio";
 181                         lantiq,function = "mdio";
 182                 };
 183                 gphy-leds {
 184                         lantiq,groups = "gphy0 led1", "gphy1 led1";
 185                         lantiq,function = "gphy";
 186                         lantiq,pull = <2>;
 187                         lantiq,open-drain = <0>;
 188                         lantiq,output = <1>;
 189                 };
 190                 phy-rst {
 191                         lantiq,pins = "io42";
 192                         lantiq,pull = <0>;
 193                         lantiq,open-drain = <0>;
 194                         lantiq,output = <1>;
 195                 };
 196                 pcie-rst {
 197                         lantiq,pins = "io38";
 198                         lantiq,pull = <0>;
 199                         lantiq,output = <1>;
 200                 };
 201         };
 202         pins_spi_default: pins_spi_default {
 203                 spi_in {
 204                         lantiq,groups = "spi_di";
 205                         lantiq,function = "spi";
 206                 };
 207                 spi_out {
 208                         lantiq,groups = "spi_do", "spi_clk",
 209                                 "spi_cs4";
 210                         lantiq,function = "spi";
 211                         lantiq,output = <1>;
 212                 };
 213         };
 214 };
 215
 216 &pcie0 {
 217         pcie@0 {
 218                 reg = <0 0 0 0 0>;
 219                 #interrupt-cells = <1>;
 220                 #size-cells = <2>;
 221                 #address-cells = <3>;
 222                 device_type = "pci";
 223
 224                 ath9k: wifi@168c,002e {
 225                         compatible = "pci168c,002e";
 226                         reg = <0 0 0 0 0>;
 227                         #gpio-cells = <2>;
 228                         gpio-controller;
 229                         qca,no-eeprom;
 230                         qca,disable-5ghz;
 231                         mtd-mac-address = <&ath9k_cal 0xf100>;
 232                         mtd-mac-address-increment = <2>;
 233                 };
 234         };
 235 };
 236
 237 &spi {
 238         status = "okay";
 239
 240         pinctrl-names = "default";
 241         pinctrl-0 = <&pins_spi_default>;
 242
 243         m25p80@4 {
 244                 #address-cells = <1>;
 245                 #size-cells = <1>;
 246                 compatible = "jedec,spi-nor";
 247                 reg = <4 0>;
 248                 spi-max-frequency = <33250000>;
 249                 m25p,fast-read;
 250
 251                 partitions {
 252                         compatible = "fixed-partitions";
 253                         #address-cells = <1>;
 254                         #size-cells = <1>;
 255
 256                         partition@0 {
 257                                 reg = <0x0 0x20000>;
 258                                 label = "u-boot";
 259                                 read-only;
 260                         };
 261
 262                         partition@20000 {
 263                                 reg = <0x20000 0x7a0000>;
 264                                 label = "firmware";
 265                         };
 266
 267                         partition@7c0000 {
 268                                 reg = <0x7c0000 0x10000>;
 269                                 label = "config";
 270                                 read-only;
 271                         };
 272
 273                         ath9k_cal: partition@7d0000 {
 274                                 reg = <0x7d0000 0x30000>;
 275                                 label = "boardconfig";
 276                                 read-only;
 277                         };
 278                 };
 279         };
 280 };
 281
 282 &usb_phy0 {
 283         status = "okay";
 284         phy-supply = <&usb_vbus>;
 285 };
 286
 287 &usb_phy1 {
 288         status = "okay";
 289         phy-supply = <&usb_vbus>;
 290 };
 291
 292 &usb0 {
 293         status = "okay";
 294 };
 295
 296 &usb1 {
 297         status = "okay";
 298 };