lantiq: set correct gphy pins for Zyxel P-2812
[openwrt/openwrt.git] / target / linux / lantiq / files-4.19 / arch / mips / boot / dts / lantiq / vr9_zyxel_p-2812hnu-fx.dtsi
1 #include "vr9.dtsi"
2
3 #include <dt-bindings/input/input.h>
4 #include <dt-bindings/mips/lantiq_rcu_gphy.h>
5
6 / {
7 compatible = "zyxel,p-2812hnu", "lantiq,xway", "lantiq,vr9";
8
9 chosen {
10 bootargs = "console=ttyLTQ0,115200";
11 };
12
13 aliases {
14 led-boot = &power_green;
15 led-failsafe = &power_red;
16 led-running = &power_green;
17 led-upgrade = &power_green;
18
19 led-dsl = &dsl_green;
20 led-internet = &internet_green;
21 led-wifi = &wireless_green;
22 };
23
24 memory@0 {
25 device_type = "memory";
26 reg = <0x0 0x8000000>;
27 };
28
29 keys {
30 compatible = "gpio-keys-polled";
31 poll-interval = <100>;
32
33 reset {
34 label = "reset";
35 gpios = <&gpio 39 GPIO_ACTIVE_LOW>;
36 linux,code = <KEY_RESTART>;
37 };
38
39 rfkill {
40 label = "rfkill";
41 gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
42 linux,code = <KEY_RFKILL>;
43 };
44 };
45
46 leds {
47 compatible = "gpio-leds";
48
49 internet_red {
50 label = "p2812hnufx:red:internet";
51 gpios = <&stp 16 GPIO_ACTIVE_LOW>;
52 };
53 internet_green: internet_green {
54 label = "p2812hnufx:green:internet";
55 gpios = <&stp 17 GPIO_ACTIVE_LOW>;
56 };
57 dsl_green: dsl_green {
58 label = "p2812hnufx:green:dsl";
59 gpios = <&stp 18 GPIO_ACTIVE_LOW>;
60 };
61 dsl_orange {
62 label = "p2812hnufx:orange:dsl";
63 gpios = <&stp 19 GPIO_ACTIVE_LOW>;
64 };
65 wireless_orange {
66 label = "p2812hnufx:orange:wlan";
67 gpios = <&stp 20 GPIO_ACTIVE_LOW>;
68 };
69 wireless_green: wireless_green {
70 label = "p2812hnufx:green:wlan";
71 gpios = <&stp 21 GPIO_ACTIVE_LOW>;
72 };
73 power_red: power {
74 label = "p2812hnufx:red:power";
75 gpios = <&stp 22 GPIO_ACTIVE_LOW>;
76 };
77 power_green: power2 {
78 label = "p2812hnufx:green:power";
79 gpios = <&stp 23 GPIO_ACTIVE_LOW>;
80 default-state = "keep";
81 };
82 phone1 {
83 label = "p2812hnufx:green:phone";
84 gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
85 };
86 phone1warn {
87 label = "p2812hnufx:orange:phone";
88 gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
89 };
90 phone2warn {
91 label = "p2812hnufx:orange:phone2";
92 gpios = <&gpio 26 GPIO_ACTIVE_LOW>;
93 };
94 phone2 {
95 label = "p2812hnufx:green:phone2";
96 gpios = <&gpio 28 GPIO_ACTIVE_LOW>;
97 };
98 };
99
100 usb_vbus: regulator-usb-vbus {
101 compatible = "regulator-fixed";
102
103 regulator-name = "USB_VBUS";
104
105 regulator-min-microvolt = <5000000>;
106 regulator-max-microvolt = <5000000>;
107
108 gpio = <&gpio 33 GPIO_ACTIVE_HIGH>;
109 enable-active-high;
110 };
111 };
112
113 &eth0 {
114 pinctrl-0 = <&mdio_pins>,
115 <&gphy0_led1_pins>, <&gphy0_led2_pins>,
116 <&gphy1_led1_pins>, <&gphy1_led2_pins>;
117 pinctrl-names = "default";
118
119 lan: interface@0 {
120 compatible = "lantiq,xrx200-pdi";
121 #address-cells = <1>;
122 #size-cells = <0>;
123 reg = <0>;
124 mac-address = [ 00 11 22 33 44 55 ];
125 lantiq,switch;
126
127 ethernet@0 {
128 compatible = "lantiq,xrx200-pdi-port";
129 reg = <0>;
130 phy-mode = "rgmii";
131 phy-handle = <&phy0>;
132 };
133 ethernet@1 {
134 compatible = "lantiq,xrx200-pdi-port";
135 reg = <1>;
136 phy-mode = "rgmii";
137 phy-handle = <&phy1>;
138 };
139 ethernet@2 {
140 compatible = "lantiq,xrx200-pdi-port";
141 reg = <2>;
142 phy-mode = "gmii";
143 phy-handle = <&phy11>;
144 };
145 ethernet@4 {
146 compatible = "lantiq,xrx200-pdi-port";
147 reg = <4>;
148 phy-mode = "gmii";
149 phy-handle = <&phy13>;
150 };
151 ethernet@5 {
152 compatible = "lantiq,xrx200-pdi-port";
153 reg = <5>;
154 phy-mode = "rgmii";
155 phy-handle = <&phy5>;
156 };
157 };
158
159 mdio {
160 #address-cells = <1>;
161 #size-cells = <0>;
162 compatible = "lantiq,xrx200-mdio";
163
164 phy0: ethernet-phy@0 {
165 reg = <0x0>;
166 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
167 };
168 phy1: ethernet-phy@1 {
169 reg = <0x1>;
170 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
171 };
172 phy5: ethernet-phy@5 {
173 reg = <0x5>;
174 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
175 };
176 phy11: ethernet-phy@11 {
177 reg = <0x11>;
178 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
179 };
180 phy13: ethernet-phy@13 {
181 reg = <0x13>;
182 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
183 };
184 };
185 };
186
187 &gphy0 {
188 lantiq,gphy-mode = <GPHY_MODE_GE>;
189 };
190
191 &gphy1 {
192 lantiq,gphy-mode = <GPHY_MODE_GE>;
193 };
194
195 &gpio {
196 pinctrl-names = "default";
197 pinctrl-0 = <&state_default>;
198
199 state_default: pinmux {
200 exin3 {
201 lantiq,groups = "exin3";
202 lantiq,function = "exin";
203 };
204 pci_rst {
205 lantiq,pins = "io21";
206 lantiq,output = <1>;
207 lantiq,open-drain = <0>;
208 lantiq,pull = <2>;
209 };
210 pcie-rst {
211 lantiq,pins = "io38";
212 lantiq,pull = <0>;
213 lantiq,output = <1>;
214 };
215 ifxhcd-rst {
216 lantiq,pins = "io33";
217 lantiq,pull = <0>;
218 lantiq,open-drain = <0>;
219 lantiq,output = <1>;
220 };
221 };
222 };
223
224 &pci0 {
225 status = "okay";
226
227 pinctrl-0 = <&pci_gnt1_pins>, <&pci_req1_pins>;
228 pinctrl-names = "default";
229
230 gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
231 };
232
233 &stp {
234 status = "okay";
235
236 lantiq,shadow = <0xffffff>;
237 lantiq,groups = <0x7>;
238 lantiq,dsl = <0x0>;
239 lantiq,phy1 = <0x0>;
240 lantiq,phy2 = <0x0>;
241 };
242
243 &usb_phy0 {
244 status = "okay";
245 };
246
247 &usb_phy1 {
248 status = "okay";
249 };
250
251 &usb0 {
252 status = "okay";
253 vbus-supply = <&usb_vbus>;
254 };
255
256 &usb1 {
257 status = "okay";
258 vbus-supply = <&usb_vbus>;
259 };