target/linux/lantiq/patches-3.2/0068-MIPS-lantiq-adds-bootsel-helper.patch

   1 From 091358d0004ae2d2a28c9132e6976d46cf96fd3e Mon Sep 17 00:00:00 2001
   2 From: John Crispin <blogic@openwrt.org>
   3 Date: Wed, 21 Mar 2012 14:17:37 +0100
   4 Subject: [PATCH 68/70] MIPS: lantiq: adds bootsel helper
   5
   6 ---
   7  .../mips/include/asm/mach-lantiq/xway/lantiq_soc.h |   12 ++++++++++++
   8  arch/mips/lantiq/xway/reset.c                      |   12 +++++++++++-
   9  2 files changed, 23 insertions(+), 1 deletions(-)
  10
  11 diff --git a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
  12 index bfdeb16..1ec8f2a 100644
  13 --- a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
  14 +++ b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
  15 @@ -144,6 +144,18 @@
  16  #define LTQ_MPS_BASE_ADDR      (KSEG1 + 0x1F107000)
  17  #define LTQ_MPS_CHIPID         ((u32 *)(LTQ_MPS_BASE_ADDR + 0x0344))
  18
  19 +/* BOOT_SEL - find what boot media we have */
  20 +#define BS_EXT_ROM     0x0
  21 +#define BS_FLASH       0x1
  22 +#define BS_MII0                0x2
  23 +#define BS_PCI         0x3
  24 +#define BS_UART1       0x4
  25 +#define BS_SPI         0x5
  26 +#define BS_NAND                0x6
  27 +#define BS_RMII0       0x7
  28 +
  29 +extern unsigned char ltq_boot_select(void);
  30 +
  31  /* register access macros for EBU and CGU */
  32  #define ltq_ebu_w32(x, y)      ltq_w32((x), ltq_ebu_membase + (y))
  33  #define ltq_ebu_r32(x)         ltq_r32(ltq_ebu_membase + (x))
  34 diff --git a/arch/mips/lantiq/xway/reset.c b/arch/mips/lantiq/xway/reset.c
  35 index 8a5dff1..b8f7ffb 100644
  36 --- a/arch/mips/lantiq/xway/reset.c
  37 +++ b/arch/mips/lantiq/xway/reset.c
  38 @@ -27,7 +27,11 @@
  39  #define RCU_RST_STAT   0x0014
  40
  41  /* reset cause */
  42 -#define RCU_STAT_SHIFT 26
  43 +#define RCU_STAT_SHIFT         26
  44 +/* boot selection */
  45 +#define RCU_BOOT_SEL_SHIFT     26
  46 +#define RCU_BOOT_SEL_MASK      0x7
  47 +
  48  /* Global SW Reset */
  49  #define RCU_RD_SRST            BIT(30)
  50  /* Memory Controller */
  51 @@ -75,6 +79,12 @@ int ltq_reset_cause(void)
  52  }
  53  EXPORT_SYMBOL_GPL(ltq_reset_cause);
  54
  55 +unsigned char ltq_boot_select(void)
  56 +{
  57 +       u32 val = ltq_rcu_r32(RCU_RST_STAT);
  58 +       return (val >> RCU_BOOT_SEL_SHIFT) & RCU_BOOT_SEL_MASK;
  59 +}
  60 +
  61  void ltq_reset_once(unsigned int module, ulong usec)
  62  {
  63         ltq_rcu_w32(ltq_rcu_r32(RCU_RST_REQ) | module, RCU_RST_REQ);
  64 --
  65 1.7.7.1
  66