b0b5bd3a57e30d6bfbdb91a71629db561636f5fc
[openwrt/openwrt.git] / target / linux / lantiq / patches-4.14 / 0152-lantiq-VPE.patch
1 --- a/arch/mips/Kconfig
2 +++ b/arch/mips/Kconfig
3 @@ -2327,6 +2327,12 @@ config MIPS_VPE_LOADER
4 Includes a loader for loading an elf relocatable object
5 onto another VPE and running it.
6
7 +config IFX_VPE_EXT
8 + bool "IFX APRP Extensions"
9 + depends on MIPS_VPE_LOADER
10 + help
11 + IFX included extensions in APRP
12 +
13 config MIPS_VPE_LOADER_CMP
14 bool
15 default "y"
16 --- a/arch/mips/include/asm/vpe.h
17 +++ b/arch/mips/include/asm/vpe.h
18 @@ -127,4 +127,13 @@ void cleanup_tc(struct tc *tc);
19
20 int __init vpe_module_init(void);
21 void __exit vpe_module_exit(void);
22 +
23 +/* For the explanation of the APIs please refer the section "MT APRP Kernel
24 + * Programming" in AR9 SW Architecture Specification
25 + */
26 +int32_t vpe1_sw_start(void *sw_start_addr, uint32_t tcmask, uint32_t flags);
27 +int32_t vpe1_sw_stop(uint32_t flags);
28 +uint32_t vpe1_get_load_addr(uint32_t flags);
29 +uint32_t vpe1_get_max_mem(uint32_t flags);
30 +
31 #endif /* _ASM_VPE_H */
32 --- a/arch/mips/kernel/vpe-mt.c
33 +++ b/arch/mips/kernel/vpe-mt.c
34 @@ -29,6 +29,7 @@ int vpe_run(struct vpe *v)
35 struct vpe_notifications *notifier;
36 unsigned int vpeflags;
37 struct tc *t;
38 + unsigned long physical_memsize = 0L;
39
40 /* check we are the Master VPE */
41 local_irq_save(flags);
42 @@ -417,6 +418,8 @@ int __init vpe_module_init(void)
43 }
44
45 v->ntcs = hw_tcs - aprp_cpu_index();
46 + write_tc_c0_tcbind((read_tc_c0_tcbind() &
47 + ~TCBIND_CURVPE) | 1);
48
49 /* add the tc to the list of this vpe's tc's. */
50 list_add(&t->tc, &v->tc);
51 @@ -519,3 +522,47 @@ void __exit vpe_module_exit(void)
52 release_vpe(v);
53 }
54 }
55 +
56 +#ifdef CONFIG_IFX_VPE_EXT
57 +int32_t vpe1_sw_start(void *sw_start_addr, uint32_t tcmask, uint32_t flags)
58 +{
59 + enum vpe_state state;
60 + struct vpe *v = get_vpe(tclimit);
61 + struct vpe_notifications *not;
62 +
63 + if (tcmask || flags) {
64 + pr_warn("Currently tcmask and flags should be 0. Other values are not supported\n");
65 + return -1;
66 + }
67 +
68 + state = xchg(&v->state, VPE_STATE_INUSE);
69 + if (state != VPE_STATE_UNUSED) {
70 + vpe_stop(v);
71 +
72 + list_for_each_entry(not, &v->notify, list) {
73 + not->stop(tclimit);
74 + }
75 + }
76 +
77 + v->__start = (unsigned long)sw_start_addr;
78 +
79 + if (!vpe_run(v)) {
80 + pr_debug("VPE loader: VPE1 running successfully\n");
81 + return 0;
82 + }
83 + return -1;
84 +}
85 +EXPORT_SYMBOL(vpe1_sw_start);
86 +
87 +int32_t vpe1_sw_stop(uint32_t flags)
88 +{
89 + struct vpe *v = get_vpe(tclimit);
90 +
91 + if (!vpe_free(v)) {
92 + pr_debug("RP Stopped\n");
93 + return 0;
94 + } else
95 + return -1;
96 +}
97 +EXPORT_SYMBOL(vpe1_sw_stop);
98 +#endif
99 --- a/arch/mips/kernel/vpe.c
100 +++ b/arch/mips/kernel/vpe.c
101 @@ -49,6 +49,41 @@ struct vpe_control vpecontrol = {
102 .tc_list = LIST_HEAD_INIT(vpecontrol.tc_list)
103 };
104
105 +#ifdef CONFIG_IFX_VPE_EXT
106 +unsigned int vpe1_load_addr;
107 +
108 +static int __init load_address(char *str)
109 +{
110 + get_option(&str, &vpe1_load_addr);
111 + return 1;
112 +}
113 +__setup("vpe1_load_addr=", load_address);
114 +
115 +static unsigned int vpe1_mem;
116 +static int __init vpe1mem(char *str)
117 +{
118 + vpe1_mem = memparse(str, &str);
119 + return 1;
120 +}
121 +__setup("vpe1_mem=", vpe1mem);
122 +
123 +uint32_t vpe1_get_load_addr(uint32_t flags)
124 +{
125 + return vpe1_load_addr;
126 +}
127 +EXPORT_SYMBOL(vpe1_get_load_addr);
128 +
129 +uint32_t vpe1_get_max_mem(uint32_t flags)
130 +{
131 + if (!vpe1_mem)
132 + return P_SIZE;
133 + else
134 + return vpe1_mem;
135 +}
136 +EXPORT_SYMBOL(vpe1_get_max_mem);
137 +
138 +#endif
139 +
140 /* get the vpe associated with this minor */
141 struct vpe *get_vpe(int minor)
142 {
143 --- a/arch/mips/lantiq/prom.c
144 +++ b/arch/mips/lantiq/prom.c
145 @@ -37,10 +37,14 @@ unsigned long physical_memsize = 0L;
146 */
147 static struct ltq_soc_info soc_info;
148
149 +/* for Multithreading (APRP), vpe.c will use it */
150 +unsigned long cp0_memsize;
151 +
152 const char *get_system_type(void)
153 {
154 return soc_info.sys_type;
155 }
156 +EXPORT_SYMBOL(ltq_soc_type);
157
158 int ltq_soc_type(void)
159 {
160 --- a/arch/mips/include/asm/mipsmtregs.h
161 +++ b/arch/mips/include/asm/mipsmtregs.h
162 @@ -32,6 +32,9 @@
163 #define read_c0_vpeconf1() __read_32bit_c0_register($1, 3)
164 #define write_c0_vpeconf1(val) __write_32bit_c0_register($1, 3, val)
165
166 +#define read_c0_vpeopt() __read_32bit_c0_register($1, 7)
167 +#define write_c0_vpeopt(val) __write_32bit_c0_register($1, 7, val)
168 +
169 #define read_c0_tcstatus() __read_32bit_c0_register($2, 1)
170 #define write_c0_tcstatus(val) __write_32bit_c0_register($2, 1, val)
171
172 @@ -377,6 +380,8 @@ do { \
173 #define write_vpe_c0_vpeconf0(val) mttc0(1, 2, val)
174 #define read_vpe_c0_vpeconf1() mftc0(1, 3)
175 #define write_vpe_c0_vpeconf1(val) mttc0(1, 3, val)
176 +#define read_vpe_c0_vpeopt() mftc0(1, 7)
177 +#define write_vpe_c0_vpeopt(val) mttc0(1, 7, val)
178 #define read_vpe_c0_count() mftc0(9, 0)
179 #define write_vpe_c0_count(val) mttc0(9, 0, val)
180 #define read_vpe_c0_status() mftc0(12, 0)