lantiq: 4.19: increase usb reset timeouts
[openwrt/openwrt.git] / target / linux / lantiq / patches-4.19 / 0003-usb-dwc2-use-a-longer-core-rest-timeout-in-dwc2_core.patch
1 From 09bbf8c732e7a6ce290fc7c2d5a3e79ec6c3e8d2 Mon Sep 17 00:00:00 2001
2 From: Mathias Kresin <dev@kresin.me>
3 Date: Wed, 3 Jul 2019 17:03:02 +0200
4 Subject: [PATCH] usb: dwc2: use a longer core rest timeout in
5 dwc2_core_reset()
6
7 Testing on different generations of Lantiq MIPS SoC based boards, showed
8 that it takes up to 1500 us until the core reset bit is cleared.
9
10 The driver from the vendor SDK (ifxhcd) uses a 1 second timeout. Use the
11 same timeout to fix wrong hang detections and make the driver work for
12 Lantiq MIPS SoCs.
13
14 Signed-off-by: Mathias Kresin <dev@kresin.me>
15 ---
16 drivers/usb/dwc2/core.c | 2 +-
17 1 file changed, 1 insertion(+), 1 deletion(-)
18
19 --- a/drivers/usb/dwc2/core.c
20 +++ b/drivers/usb/dwc2/core.c
21 @@ -524,7 +524,7 @@ int dwc2_core_reset(struct dwc2_hsotg *h
22 greset |= GRSTCTL_CSFTRST;
23 dwc2_writel(hsotg, greset, GRSTCTL);
24
25 - if (dwc2_hsotg_wait_bit_clear(hsotg, GRSTCTL, GRSTCTL_CSFTRST, 50)) {
26 + if (dwc2_hsotg_wait_bit_clear(hsotg, GRSTCTL, GRSTCTL_CSFTRST, 10000)) {
27 dev_warn(hsotg->dev, "%s: HANG! Soft Reset timeout GRSTCTL GRSTCTL_CSFTRST\n",
28 __func__);
29 return -EBUSY;