lantiq: fix missing otg_cap on danube platform
[openwrt/openwrt.git] / target / linux / lantiq / patches-4.4 / 0061-USB-DWC2-make-the-lantiq-settings-match-vendor-drive.patch
1 From de2cad82c4d0872066f83ce59462603852b47f03 Mon Sep 17 00:00:00 2001
2 From: Hauke Mehrtens <hauke@hauke-m.de>
3 Date: Fri, 6 Jan 2017 17:55:24 +0100
4 Subject: [PATCH 2/2] usb: dwc2: add support for other Lantiq SoCs
5
6 The size of the internal RAM of the DesignWare USB controller changed
7 between the different Lantiq SoCs. We have the following sizes:
8
9 Amazon + Danube: 8 KByte
10 Amazon SE + arx100: 2 KByte
11 xrx200 + xrx300: 2.5 KByte
12
13 For Danube SoC we do not provide the params and let the driver decide
14 to use sane defaults, for the Amazon SE and arx100 we use small fifos
15 and for the xrx200 and xrx300 SCs a little bit bigger periodic fifo.
16 The auto detection of max_transfer_size and max_packet_count should
17 work, so remove it.
18
19 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
20 ---
21 drivers/usb/dwc2/platform.c | 46 ++++++++++++++++++++++++++++++++++++++-------
22 1 file changed, 39 insertions(+), 7 deletions(-)
23
24 --- a/drivers/usb/dwc2/platform.c
25 +++ b/drivers/usb/dwc2/platform.c
26 @@ -116,7 +116,37 @@ static const struct dwc2_core_params par
27 .hibernation = -1,
28 };
29
30 -static const struct dwc2_core_params params_ltq = {
31 +static const struct dwc2_core_params params_danube = {
32 + .otg_cap = 2, /* non-HNP/non-SRP */
33 + .otg_ver = -1,
34 + .dma_enable = -1,
35 + .dma_desc_enable = -1,
36 + .speed = -1,
37 + .enable_dynamic_fifo = -1,
38 + .en_multiple_tx_fifo = -1,
39 + .host_rx_fifo_size = -1,
40 + .host_nperio_tx_fifo_size = -1,
41 + .host_perio_tx_fifo_size = -1,
42 + .max_transfer_size = -1,
43 + .max_packet_count = -1,
44 + .host_channels = -1,
45 + .phy_type = -1,
46 + .phy_utmi_width = -1,
47 + .phy_ulpi_ddr = -1,
48 + .phy_ulpi_ext_vbus = -1,
49 + .i2c_enable = -1,
50 + .ulpi_fs_ls = -1,
51 + .host_support_fs_ls_low_power = -1,
52 + .host_ls_low_power_phy_clk = -1,
53 + .ts_dline = -1,
54 + .reload_ctl = -1,
55 + .ahbcfg = -1,
56 + .uframe_sched = -1,
57 + .external_id_pin_ctl = -1,
58 + .hibernation = -1,
59 +};
60 +
61 +static const struct dwc2_core_params params_ase = {
62 .otg_cap = 2, /* non-HNP/non-SRP */
63 .otg_ver = -1,
64 .dma_enable = -1,
65 @@ -127,8 +157,38 @@ static const struct dwc2_core_params par
66 .host_rx_fifo_size = 288, /* 288 DWORDs */
67 .host_nperio_tx_fifo_size = 128, /* 128 DWORDs */
68 .host_perio_tx_fifo_size = 96, /* 96 DWORDs */
69 - .max_transfer_size = 65535,
70 - .max_packet_count = 511,
71 + .max_transfer_size = -1,
72 + .max_packet_count = -1,
73 + .host_channels = -1,
74 + .phy_type = -1,
75 + .phy_utmi_width = -1,
76 + .phy_ulpi_ddr = -1,
77 + .phy_ulpi_ext_vbus = -1,
78 + .i2c_enable = -1,
79 + .ulpi_fs_ls = -1,
80 + .host_support_fs_ls_low_power = -1,
81 + .host_ls_low_power_phy_clk = -1,
82 + .ts_dline = -1,
83 + .reload_ctl = -1,
84 + .ahbcfg = -1,
85 + .uframe_sched = -1,
86 + .external_id_pin_ctl = -1,
87 + .hibernation = -1,
88 +};
89 +
90 +static const struct dwc2_core_params params_xrx200 = {
91 + .otg_cap = 2, /* non-HNP/non-SRP */
92 + .otg_ver = -1,
93 + .dma_enable = -1,
94 + .dma_desc_enable = -1,
95 + .speed = -1,
96 + .enable_dynamic_fifo = -1,
97 + .en_multiple_tx_fifo = -1,
98 + .host_rx_fifo_size = 288, /* 288 DWORDs */
99 + .host_nperio_tx_fifo_size = 128, /* 128 DWORDs */
100 + .host_perio_tx_fifo_size = 136, /* 136 DWORDs */
101 + .max_transfer_size = -1,
102 + .max_packet_count = -1,
103 .host_channels = -1,
104 .phy_type = -1,
105 .phy_utmi_width = -1,
106 @@ -140,8 +200,7 @@ static const struct dwc2_core_params par
107 .host_ls_low_power_phy_clk = -1,
108 .ts_dline = -1,
109 .reload_ctl = -1,
110 - .ahbcfg = GAHBCFG_HBSTLEN_INCR16 <<
111 - GAHBCFG_HBSTLEN_SHIFT,
112 + .ahbcfg = -1,
113 .uframe_sched = -1,
114 .external_id_pin_ctl = -1,
115 .hibernation = -1,
116 @@ -341,8 +400,11 @@ static int dwc2_driver_remove(struct pla
117 static const struct of_device_id dwc2_of_match_table[] = {
118 { .compatible = "brcm,bcm2835-usb", .data = &params_bcm2835 },
119 { .compatible = "rockchip,rk3066-usb", .data = &params_rk3066 },
120 - { .compatible = "lantiq,arx100-usb", .data = &params_ltq },
121 - { .compatible = "lantiq,xrx200-usb", .data = &params_ltq },
122 + { .compatible = "lantiq,danube-usb", .data = &params_danube },
123 + { .compatible = "lantiq,ase-usb", .data = &params_ase },
124 + { .compatible = "lantiq,arx100-usb", .data = &params_ase },
125 + { .compatible = "lantiq,xrx200-usb", .data = &params_xrx200 },
126 + { .compatible = "lantiq,xrx300-usb", .data = &params_xrx200 },
127 { .compatible = "snps,dwc2", .data = NULL },
128 { .compatible = "samsung,s3c6400-hsotg", .data = NULL},
129 {},