layerscape: add Traverse LS1043-S support
[openwrt/openwrt.git] / target / linux / layerscape / files / arch / arm64 / boot / dts / freescale / traverse-ls1043v.dts
1 /*
2 * Device Tree Include file for Traverse LS1043V board.
3 *
4 * Copyright 2014-2015, Freescale Semiconductor
5 * Copyright 2017, Traverse Technologies
6 *
7 * This file is dual-licensed: you can use it either under the terms
8 * of the GPLv2 or the X11 license, at your option. Note that this dual
9 * licensing only applies to this file, and not this project as a
10 * whole.
11 *
12 * a) This library is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of the
15 * License, or (at your option) any later version.
16 *
17 * This library is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * Or, alternatively,
23 *
24 * b) Permission is hereby granted, free of charge, to any person
25 * obtaining a copy of this software and associated documentation
26 * files (the "Software"), to deal in the Software without
27 * restriction, including without limitation the rights to use,
28 * copy, modify, merge, publish, distribute, sublicense, and/or
29 * sell copies of the Software, and to permit persons to whom the
30 * Software is furnished to do so, subject to the following
31 * conditions:
32 *
33 * The above copyright notice and this permission notice shall be
34 * included in all copies or substantial portions of the Software.
35 *
36 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
37 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
38 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
39 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
40 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
41 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
42 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
43 * OTHER DEALINGS IN THE SOFTWARE.
44 */
45
46 /dts-v1/;
47 #include "fsl-ls1043a.dtsi"
48 #include <dt-bindings/gpio/gpio.h>
49 #include <dt-bindings/input/input.h>
50
51 / {
52 model = "Traverse LS1043V";
53 compatible = "traverse,ls1043v";
54
55 aliases {
56 crypto = &crypto;
57 ethernet0 = &EMAC0;
58 ethernet1 = &EMAC1;
59 ethernet2 = &EMAC2;
60 ethernet3 = &EMAC3;
61 ethernet4 = &EMAC4;
62 ethernet5 = &EMAC5;
63 pca9555 = &pca9555;
64 };
65
66 leds {
67 compatible = "gpio-leds";
68 gpio0 {
69 label = "ls1043v:green:user0";
70 gpios = <&pca9555 0 GPIO_ACTIVE_LOW>;
71 };
72 gpio1 {
73 label = "ls1043v:yellow:user0";
74 gpios = <&pca9555 1 GPIO_ACTIVE_LOW>;
75 };
76 gpio2 {
77 label = "ls1043v:green:user1";
78 gpios = <&pca9555 2 GPIO_ACTIVE_LOW>;
79 };
80 gpio3 {
81 label = "ls1043v:yellow:user1";
82 gpios = <&pca9555 3 GPIO_ACTIVE_LOW>;
83 };
84 gpio4 {
85 label = "ls1043v:green:user2";
86 gpios = <&pca9555 4 GPIO_ACTIVE_HIGH>;
87 };
88 gpio5 {
89 label = "ls1043v:yellow:wlan";
90 gpios = <&pca9555 5 GPIO_ACTIVE_HIGH>;
91 };
92 gpio6 {
93 label = "ls1043v:yellow:wan";
94 gpios = <&pca9555 6 GPIO_ACTIVE_HIGH>;
95 };
96 };
97
98 gpio-keys-polled {
99 compatible = "gpio-keys-polled";
100 #address-cells = <1>;
101 #size-cells = <0>;
102 poll-interval = <1000>;
103 button@0 {
104 label = "Front button";
105 linux,code = <KEY_SETUP>;
106 gpios = <&pca9555 14 GPIO_ACTIVE_LOW>;
107 };
108 button@1 {
109 label = "Rear button";
110 linux,code = <KEY_WPS_BUTTON>;
111 gpios = <&pca9555 15 GPIO_ACTIVE_LOW>;
112 };
113 };
114 };
115
116 &i2c0 {
117 status = "okay";
118 rtc@6f {
119 compatible = "intersil,isl1208";
120 reg = <0x6f>;
121 };
122
123 pca9555: pca9555@20 {
124 compatible = "nxp,pca9555";
125 gpio-controller;
126 #gpio-cells = <2>;
127 reg = <0x20>;
128 gpio-base = <0>;
129 };
130
131 /* CPU core temp sensor and VDD (1.0V) sensor */
132 ltc2990@4c {
133 compatible = "lltc,ltc2990";
134 reg = <0x4C>;
135 lltc,meas-mode = <4 3>;
136 };
137
138 /* 3.3V and 5V monitor (may not be loaded on some SKUs) */
139 ltc2990@4f {
140 compatible = "lltc,ltc2990";
141 reg = <0x4F>;
142 lltc,meas-mode = <6 3>;
143 };
144 };
145
146 &ifc {
147 status = "okay";
148 #address-cells = <2>;
149 #size-cells = <1>;
150 /* Only NAND flash is used on this board */
151 ranges = <0x0 0x0 0x0 0x7e800000 0x00010000>;
152
153 nand@1,0 {
154 compatible = "fsl,ifc-nand";
155 #address-cells = <1>;
156 #size-cells = <1>;
157 reg = <0x0 0x0 0x10000>;
158 };
159 };
160
161 &duart0 {
162 status = "okay";
163 };
164
165 &duart1 {
166 status = "okay";
167 };
168
169 #include "fsl-ls1043-post.dtsi"
170
171 &fman0 {
172 EMAC0: ethernet@e0000 {
173 phy-handle = <&qsgmii_phy1>;
174 phy-connection-type = "qsgmii";
175 local-mac-address = [0A 00 00 00 00 01];
176 };
177
178 EMAC1: ethernet@e2000 {
179 phy-handle = <&qsgmii_phy2>;
180 phy-connection-type = "qsgmii";
181 local-mac-address = [0A 00 00 00 00 02];
182 };
183
184 EMAC2: ethernet@e8000 {
185 phy-handle = <&qsgmii_phy3>;
186 phy-connection-type = "qsgmii";
187 local-mac-address = [0A 00 00 00 00 03];
188 };
189
190 EMAC3: ethernet@ea000 {
191 phy-handle = <&qsgmii_phy4>;
192 phy-connection-type = "qsgmii";
193 local-mac-address = [0A 00 00 00 00 04];
194 };
195 EMAC4: ethernet@e4000 {
196 phy-handle = <&rgmii_phy1>;
197 phy-connection-type = "rgmii";
198 local-mac-address = [0A 00 00 00 00 05];
199 };
200
201 /* Connection to VDSL SoC */
202 EMAC5: ethernet@e6000 {
203 phy-connection-type = "rgmii-id";
204 local-mac-address = [00 00 00 00 00 06];
205 fixed-link {
206 speed = <1000>;
207 full-duplex;
208 };
209 };
210
211 /* 10G XFI interface - not in use on this platform */
212 TENSFP: ethernet@f0000 {
213 status = "disabled";
214
215 phy-connection-type = "sgmii";
216 fixed-link {
217 /* NB: speed = 1000 and sgmii allows forward compatibility
218 * with both 1G and 10G, the same is not true
219 * in the reverse.
220 */
221 speed = <1000>;
222 full-duplex;
223 };
224 };
225
226 mdio@fc000 {
227 rgmii_phy1: ethernet-phy@3 {
228 reg = <0x3>;
229 };
230 qsgmii_phy1: ethernet-phy@4 {
231 reg = <0x4>;
232 };
233 qsgmii_phy2: ethernet-phy@5 {
234 reg = <0x5>;
235 };
236 qsgmii_phy3: ethernet-phy@6 {
237 reg = <0x6>;
238 };
239 qsgmii_phy4: ethernet-phy@7 {
240 reg = <0x7>;
241 };
242 };
243 };
244
245 /* No QUICC engine functions on this board */
246 &uqe {
247 status = "disabled";
248 };
249
250 /* No SATA/AHCI on this board */
251 &sata {
252 status = "disabled";
253 };