kernel: bump 4.14 to 4.14.228
[openwrt/openwrt.git] / target / linux / layerscape / patches-4.14 / 302-dts-support-layerscape.patch
1 From cc1d1d1b68d18a31aeb8a572ca6b3929b083855c Mon Sep 17 00:00:00 2001
2 From: Biwen Li <biwen.li@nxp.com>
3 Date: Wed, 17 Apr 2019 18:58:33 +0800
4 Subject: [PATCH] dts: support layerscape
5 MIME-Version: 1.0
6 Content-Type: text/plain; charset=UTF-8
7 Content-Transfer-Encoding: 8bit
8
9 This is an integrated patch of dts for layerscape
10
11 Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com>
12 Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
13 Signed-off-by: Alan Wang <alan.wang@nxp.com>
14 Signed-off-by: Alison Wang <alison.wang@nxp.com>
15 Signed-off-by: Amrita Kumari <amrita.kumari@nxp.com>
16 Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
17 Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
18 Signed-off-by: Bharat Bhushan <Bharat.Bhushan@nxp.com>
19 Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
20 Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
21 Signed-off-by: Biwen Li <biwen.li@nxp.com>
22 Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com>
23 Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
24 Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
25 Signed-off-by: Catalin Neacsu <valentin-catalin.neacsu@nxp.com>
26 Signed-off-by: Changming Huang <jerry.huang@nxp.com>
27 Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
28 Signed-off-by: Constantin Tudor <constantin.tudor@nxp.com>
29 Signed-off-by: David S. Miller <davem@davemloft.net>
30 Signed-off-by: Florin Chiculita <florinlaurentiu.chiculita@nxp.com>
31 Signed-off-by: Florinel Iordache <florinel.iordache@nxp.com>
32 Signed-off-by: Guanhua Gao <guanhua.gao@nxp.com>
33 Signed-off-by: Honghua Yin <Hong-Hua.Yin@freescale.com>
34 Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
35 Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
36 Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
37 Signed-off-by: Iordache Florinel-R70177 <florinel.iordache@nxp.com>
38 Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com>
39 Signed-off-by: jiaheng.fan <jiaheng.fan@nxp.com>
40 Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
41 Signed-off-by: Li Yang <leoyang.li@nxp.com>
42 Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
43 Signed-off-by: Mathew McBride <matt@traverse.com.au>
44 Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
45 Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
46 Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
47 Signed-off-by: Peng Ma <peng.ma@nxp.com>
48 Signed-off-by: Po Liu <po.liu@nxp.com>
49 Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
50 Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com>
51 Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
52 Signed-off-by: Raghav Dogra <raghav.dogra@nxp.com>
53 Signed-off-by: Rai Harninder <harninder.rai@nxp.com>
54 Signed-off-by: Ramneek Mehresh <ramneek.mehresh@nxp.com>
55 Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
56 Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
57 Signed-off-by: Sakar Arora <Sakar.Arora@freescale.com>
58 Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
59 Signed-off-by: Scott Wood <oss@buserror.net>
60 Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com>
61 Signed-off-by: Shawn Guo <shawnguo@kernel.org>
62 Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
63 Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
64 Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
65 Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
66 Signed-off-by: Tao Yang <b31903@freescale.com>
67 Signed-off-by: Vabhav Sharma <vabhav.sharma@nxp.com>
68 Signed-off-by: Vicentiu Galanopulo <vicentiu.galanopulo@nxp.com>
69 Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
70 Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
71 Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
72 Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
73 Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
74 Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com>
75 Signed-off-by: Yuantian Tang <andy.tang@nxp.com>
76 Signed-off-by: Yuan Yao <yao.yuan@nxp.com>
77 Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
78 Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
79 Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
80 ---
81 arch/arm/boot/dts/Makefile | 3 +-
82 arch/arm/boot/dts/imx25.dtsi | 4 +-
83 arch/arm/boot/dts/imx28.dtsi | 4 +-
84 arch/arm/boot/dts/imx35.dtsi | 4 +-
85 arch/arm/boot/dts/imx53.dtsi | 4 +-
86 arch/arm/boot/dts/ls1021a-iot.dts | 262 ++++
87 arch/arm/boot/dts/ls1021a-qds.dts | 32 +
88 arch/arm/boot/dts/ls1021a-twr.dts | 27 +
89 arch/arm/boot/dts/ls1021a.dtsi | 111 +-
90 arch/arm64/boot/dts/freescale/Makefile | 16 +-
91 .../boot/dts/freescale/fsl-ls1012a-2g5rdb.dts | 126 ++
92 .../boot/dts/freescale/fsl-ls1012a-frdm.dts | 97 +-
93 .../boot/dts/freescale/fsl-ls1012a-frwy.dts | 179 +++
94 .../boot/dts/freescale/fsl-ls1012a-qds.dts | 136 +-
95 .../boot/dts/freescale/fsl-ls1012a-rdb.dts | 100 +-
96 .../arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 210 ++-
97 .../boot/dts/freescale/fsl-ls1043-post.dtsi | 3 +-
98 .../dts/freescale/fsl-ls1043a-qds-sdk.dts | 263 ++++
99 .../boot/dts/freescale/fsl-ls1043a-qds.dts | 206 ++-
100 .../dts/freescale/fsl-ls1043a-rdb-sdk.dts | 262 ++++
101 .../dts/freescale/fsl-ls1043a-rdb-usdpaa.dts | 140 ++
102 .../boot/dts/freescale/fsl-ls1043a-rdb.dts | 76 +-
103 .../arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 382 +++--
104 .../boot/dts/freescale/fsl-ls1046-post.dtsi | 2 +-
105 .../dts/freescale/fsl-ls1046a-qds-sdk.dts | 268 ++++
106 .../boot/dts/freescale/fsl-ls1046a-qds.dts | 194 ++-
107 .../dts/freescale/fsl-ls1046a-rdb-sdk.dts | 307 ++++
108 .../dts/freescale/fsl-ls1046a-rdb-usdpaa.dts | 133 ++
109 .../boot/dts/freescale/fsl-ls1046a-rdb.dts | 48 +-
110 .../arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 386 +++--
111 .../boot/dts/freescale/fsl-ls1088a-qds.dts | 88 +-
112 .../boot/dts/freescale/fsl-ls1088a-rdb.dts | 150 +-
113 .../arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 546 ++++++-
114 .../boot/dts/freescale/fsl-ls2080a-qds.dts | 100 +-
115 .../boot/dts/freescale/fsl-ls2080a-rdb.dts | 118 +-
116 .../boot/dts/freescale/fsl-ls2080a-simu.dts | 38 +-
117 .../arm64/boot/dts/freescale/fsl-ls2080a.dtsi | 50 +-
118 .../boot/dts/freescale/fsl-ls2081a-rdb.dts | 163 ++
119 .../boot/dts/freescale/fsl-ls2088a-qds.dts | 158 +-
120 .../boot/dts/freescale/fsl-ls2088a-rdb.dts | 118 +-
121 .../arm64/boot/dts/freescale/fsl-ls2088a.dtsi | 52 +-
122 .../boot/dts/freescale/fsl-ls208xa-qds.dtsi | 43 +-
123 .../boot/dts/freescale/fsl-ls208xa-rdb.dtsi | 60 +-
124 .../arm64/boot/dts/freescale/fsl-ls208xa.dtsi | 299 ++--
125 .../boot/dts/freescale/fsl-lx2160a-qds.dts | 353 +++++
126 .../boot/dts/freescale/fsl-lx2160a-rdb.dts | 241 +++
127 .../arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 1318 +++++++++++++++++
128 .../boot/dts/freescale/fsl-tmu-map1.dtsi | 99 ++
129 .../boot/dts/freescale/fsl-tmu-map2.dtsi | 99 ++
130 .../boot/dts/freescale/fsl-tmu-map3.dtsi | 99 ++
131 arch/arm64/boot/dts/freescale/fsl-tmu.dtsi | 251 ++++
132 .../dts/freescale/qoriq-bman-portals-sdk.dtsi | 55 +
133 .../dts/freescale/qoriq-bman-portals.dtsi | 8 +-
134 .../boot/dts/freescale/qoriq-dpaa-eth.dtsi | 97 ++
135 .../dts/freescale/qoriq-fman3-0-10g-0.dtsi | 11 +-
136 .../dts/freescale/qoriq-fman3-0-10g-1.dtsi | 11 +-
137 .../dts/freescale/qoriq-fman3-0-1g-0.dtsi | 7 +-
138 .../dts/freescale/qoriq-fman3-0-1g-1.dtsi | 7 +-
139 .../dts/freescale/qoriq-fman3-0-1g-2.dtsi | 7 +-
140 .../dts/freescale/qoriq-fman3-0-1g-3.dtsi | 7 +-
141 .../dts/freescale/qoriq-fman3-0-1g-4.dtsi | 7 +-
142 .../dts/freescale/qoriq-fman3-0-1g-5.dtsi | 7 +-
143 .../boot/dts/freescale/qoriq-fman3-0-6oh.dtsi | 47 +
144 .../boot/dts/freescale/qoriq-fman3-0.dtsi | 67 +-
145 .../dts/freescale/qoriq-qman-portals-sdk.dtsi | 38 +
146 .../dts/freescale/qoriq-qman-portals.dtsi | 9 +-
147 .../boot/dts/freescale/traverse-ls1043s.dts | 29 +
148 .../boot/dts/freescale/traverse-ls1043v.dts | 29 +
149 68 files changed, 7660 insertions(+), 1211 deletions(-)
150 create mode 100644 arch/arm/boot/dts/ls1021a-iot.dts
151 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1012a-2g5rdb.dts
152 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1012a-frwy.dts
153 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1043a-qds-sdk.dts
154 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb-sdk.dts
155 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb-usdpaa.dts
156 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1046a-qds-sdk.dts
157 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-sdk.dts
158 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-usdpaa.dts
159 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls2081a-rdb.dts
160 create mode 100644 arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
161 create mode 100644 arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
162 create mode 100644 arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
163 create mode 100644 arch/arm64/boot/dts/freescale/fsl-tmu-map1.dtsi
164 create mode 100644 arch/arm64/boot/dts/freescale/fsl-tmu-map2.dtsi
165 create mode 100644 arch/arm64/boot/dts/freescale/fsl-tmu-map3.dtsi
166 create mode 100644 arch/arm64/boot/dts/freescale/fsl-tmu.dtsi
167 create mode 100644 arch/arm64/boot/dts/freescale/qoriq-bman-portals-sdk.dtsi
168 create mode 100644 arch/arm64/boot/dts/freescale/qoriq-dpaa-eth.dtsi
169 create mode 100644 arch/arm64/boot/dts/freescale/qoriq-fman3-0-6oh.dtsi
170 create mode 100644 arch/arm64/boot/dts/freescale/qoriq-qman-portals-sdk.dtsi
171
172 --- a/arch/arm/boot/dts/Makefile
173 +++ b/arch/arm/boot/dts/Makefile
174 @@ -496,7 +496,8 @@ dtb-$(CONFIG_SOC_IMX7D) += \
175 imx7s-warp.dtb
176 dtb-$(CONFIG_SOC_LS1021A) += \
177 ls1021a-qds.dtb \
178 - ls1021a-twr.dtb
179 + ls1021a-twr.dtb \
180 + ls1021a-iot.dtb
181 dtb-$(CONFIG_SOC_VF610) += \
182 vf500-colibri-eval-v3.dtb \
183 vf610-colibri-eval-v3.dtb \
184 --- a/arch/arm/boot/dts/imx25.dtsi
185 +++ b/arch/arm/boot/dts/imx25.dtsi
186 @@ -122,7 +122,7 @@
187 };
188
189 can1: can@43f88000 {
190 - compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan";
191 + compatible = "fsl,imx25-flexcan";
192 reg = <0x43f88000 0x4000>;
193 interrupts = <43>;
194 clocks = <&clks 75>, <&clks 75>;
195 @@ -131,7 +131,7 @@
196 };
197
198 can2: can@43f8c000 {
199 - compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan";
200 + compatible = "fsl,imx25-flexcan";
201 reg = <0x43f8c000 0x4000>;
202 interrupts = <44>;
203 clocks = <&clks 76>, <&clks 76>;
204 --- a/arch/arm/boot/dts/imx28.dtsi
205 +++ b/arch/arm/boot/dts/imx28.dtsi
206 @@ -1038,7 +1038,7 @@
207 };
208
209 can0: can@80032000 {
210 - compatible = "fsl,imx28-flexcan", "fsl,p1010-flexcan";
211 + compatible = "fsl,imx28-flexcan";
212 reg = <0x80032000 0x2000>;
213 interrupts = <8>;
214 clocks = <&clks 58>, <&clks 58>;
215 @@ -1047,7 +1047,7 @@
216 };
217
218 can1: can@80034000 {
219 - compatible = "fsl,imx28-flexcan", "fsl,p1010-flexcan";
220 + compatible = "fsl,imx28-flexcan";
221 reg = <0x80034000 0x2000>;
222 interrupts = <9>;
223 clocks = <&clks 59>, <&clks 59>;
224 --- a/arch/arm/boot/dts/imx35.dtsi
225 +++ b/arch/arm/boot/dts/imx35.dtsi
226 @@ -303,7 +303,7 @@
227 };
228
229 can1: can@53fe4000 {
230 - compatible = "fsl,imx35-flexcan", "fsl,p1010-flexcan";
231 + compatible = "fsl,imx35-flexcan";
232 reg = <0x53fe4000 0x1000>;
233 clocks = <&clks 33>, <&clks 33>;
234 clock-names = "ipg", "per";
235 @@ -312,7 +312,7 @@
236 };
237
238 can2: can@53fe8000 {
239 - compatible = "fsl,imx35-flexcan", "fsl,p1010-flexcan";
240 + compatible = "fsl,imx35-flexcan";
241 reg = <0x53fe8000 0x1000>;
242 clocks = <&clks 34>, <&clks 34>;
243 clock-names = "ipg", "per";
244 --- a/arch/arm/boot/dts/imx53.dtsi
245 +++ b/arch/arm/boot/dts/imx53.dtsi
246 @@ -536,7 +536,7 @@
247 };
248
249 can1: can@53fc8000 {
250 - compatible = "fsl,imx53-flexcan", "fsl,p1010-flexcan";
251 + compatible = "fsl,imx53-flexcan";
252 reg = <0x53fc8000 0x4000>;
253 interrupts = <82>;
254 clocks = <&clks IMX5_CLK_CAN1_IPG_GATE>,
255 @@ -546,7 +546,7 @@
256 };
257
258 can2: can@53fcc000 {
259 - compatible = "fsl,imx53-flexcan", "fsl,p1010-flexcan";
260 + compatible = "fsl,imx53-flexcan";
261 reg = <0x53fcc000 0x4000>;
262 interrupts = <83>;
263 clocks = <&clks IMX5_CLK_CAN2_IPG_GATE>,
264 --- /dev/null
265 +++ b/arch/arm/boot/dts/ls1021a-iot.dts
266 @@ -0,0 +1,262 @@
267 +/*
268 + * Copyright 2013-2016 Freescale Semiconductor, Inc.
269 + *
270 + * This program is free software; you can redistribute it and/or modify
271 + * it under the terms of the GNU General Public License as published by
272 + * the Free Software Foundation; either version 2 of the License, or
273 + * (at your option) any later version.
274 + */
275 +
276 +/dts-v1/;
277 +#include "ls1021a.dtsi"
278 +
279 +/ {
280 + model = "LS1021A IOT Board";
281 +
282 + sys_mclk: clock-mclk {
283 + compatible = "fixed-clock";
284 + #clock-cells = <0>;
285 + clock-frequency = <24576000>;
286 + };
287 +
288 + regulators {
289 + compatible = "simple-bus";
290 + #address-cells = <1>;
291 + #size-cells = <0>;
292 +
293 + reg_3p3v: regulator@0 {
294 + compatible = "regulator-fixed";
295 + reg = <0>;
296 + regulator-name = "3P3V";
297 + regulator-min-microvolt = <3300000>;
298 + regulator-max-microvolt = <3300000>;
299 + regulator-always-on;
300 + };
301 +
302 + reg_2p5v: regulator@1 {
303 + compatible = "regulator-fixed";
304 + reg = <1>;
305 + regulator-name = "2P5V";
306 + regulator-min-microvolt = <2500000>;
307 + regulator-max-microvolt = <2500000>;
308 + regulator-always-on;
309 + };
310 + };
311 +
312 + sound {
313 + compatible = "simple-audio-card";
314 + simple-audio-card,format = "i2s";
315 + simple-audio-card,widgets =
316 + "Microphone", "Microphone Jack",
317 + "Headphone", "Headphone Jack",
318 + "Speaker", "Speaker Ext",
319 + "Line", "Line In Jack";
320 + simple-audio-card,routing =
321 + "MIC_IN", "Microphone Jack",
322 + "Microphone Jack", "Mic Bias",
323 + "LINE_IN", "Line In Jack",
324 + "Headphone Jack", "HP_OUT",
325 + "Speaker Ext", "LINE_OUT";
326 +
327 + simple-audio-card,cpu {
328 + sound-dai = <&sai2>;
329 + frame-master;
330 + bitclock-master;
331 + };
332 +
333 + simple-audio-card,codec {
334 + sound-dai = <&codec>;
335 + frame-master;
336 + bitclock-master;
337 + };
338 + };
339 +
340 + firmware {
341 + optee {
342 + compatible = "linaro,optee-tz";
343 + method = "smc";
344 + };
345 + };
346 +};
347 +
348 +&enet0 {
349 + tbi-handle = <&tbi1>;
350 + phy-handle = <&phy1>;
351 + phy-connection-type = "sgmii";
352 + status = "okay";
353 +};
354 +
355 +&enet1 {
356 + tbi-handle = <&tbi1>;
357 + phy-handle = <&phy3>;
358 + phy-connection-type = "sgmii";
359 + status = "okay";
360 +};
361 +
362 +&enet2 {
363 + fixed-link = <0 1 1000 0 0>;
364 + phy-connection-type = "rgmii-id";
365 + status = "okay";
366 +};
367 +
368 +&can0{
369 + status = "disabled";
370 +};
371 +
372 +&can1{
373 + status = "disabled";
374 +};
375 +
376 +&can2{
377 + status = "disabled";
378 +};
379 +
380 +&can3{
381 + status = "okay";
382 +};
383 +
384 +&esdhc{
385 + status = "okay";
386 +};
387 +
388 +&i2c0 {
389 + status = "okay";
390 +
391 + max1239@35 {
392 + compatible = "maxim,max1239";
393 + reg = <0x35>;
394 + #io-channel-cells = <1>;
395 + };
396 +
397 + codec: sgtl5000@2a {
398 + #sound-dai-cells=<0x0>;
399 + compatible = "fsl,sgtl5000";
400 + reg = <0x2a>;
401 + VDDA-supply = <&reg_3p3v>;
402 + VDDIO-supply = <&reg_2p5v>;
403 + clocks = <&sys_mclk 1>;
404 + };
405 +
406 + pca9555: pca9555@23 {
407 + compatible = "nxp,pca9555";
408 + /*pinctrl-names = "default";*/
409 + /*interrupt-parent = <&gpio2>;
410 + interrupts = <19 0x2>;*/
411 + gpio-controller;
412 + #gpio-cells = <2>;
413 + interrupt-controller;
414 + #interrupt-cells = <2>;
415 + reg = <0x23>;
416 + };
417 +
418 + ina220@44 {
419 + compatible = "ti,ina220";
420 + reg = <0x44>;
421 + shunt-resistor = <1000>;
422 + };
423 +
424 + ina220@45 {
425 + compatible = "ti,ina220";
426 + reg = <0x45>;
427 + shunt-resistor = <1000>;
428 + };
429 +
430 + lm75b@48 {
431 + compatible = "nxp,lm75a";
432 + reg = <0x48>;
433 + };
434 +
435 + adt7461a@4c {
436 + compatible = "adt7461a";
437 + reg = <0x4c>;
438 + };
439 +
440 + hdmi: sii9022a@39 {
441 + compatible = "fsl,sii902x";
442 + reg = <0x39>;
443 + interrupts = <GIC_SPI 163 IRQ_TYPE_EDGE_RISING>;
444 + };
445 +};
446 +
447 +&i2c1 {
448 + status = "disabled";
449 +};
450 +
451 +&ifc {
452 + status = "disabled";
453 +};
454 +
455 +&lpuart0 {
456 + status = "okay";
457 +};
458 +
459 +&mdio0 {
460 + phy0: ethernet-phy@0 {
461 + reg = <0x0>;
462 + };
463 + phy1: ethernet-phy@1 {
464 + reg = <0x1>;
465 + };
466 + phy2: ethernet-phy@2 {
467 + reg = <0x2>;
468 + };
469 + phy3: ethernet-phy@3 {
470 + reg = <0x3>;
471 + };
472 + tbi1: tbi-phy@1f {
473 + reg = <0x1f>;
474 + device_type = "tbi-phy";
475 + };
476 +};
477 +
478 +&qspi {
479 + num-cs = <2>;
480 + status = "okay";
481 +
482 + qflash0: s25fl128s@0 {
483 + compatible = "spansion,s25fl129p1";
484 + #address-cells = <1>;
485 + #size-cells = <1>;
486 + spi-max-frequency = <20000000>;
487 + reg = <0>;
488 + };
489 +};
490 +
491 +&sai2 {
492 + status = "okay";
493 +};
494 +
495 +&uart0 {
496 + status = "okay";
497 +};
498 +
499 +&uart1 {
500 + status = "okay";
501 +};
502 +
503 +&dcu {
504 + display = <&display>;
505 + status = "okay";
506 +
507 + display: display@0 {
508 + bits-per-pixel = <24>;
509 +
510 + display-timings {
511 + native-mode = <&timing0>;
512 +
513 + timing0: mode0 {
514 + clock-frequency = <25000000>;
515 + hactive = <640>;
516 + vactive = <480>;
517 + hback-porch = <80>;
518 + hfront-porch = <80>;
519 + vback-porch = <16>;
520 + vfront-porch = <16>;
521 + hsync-len = <12>;
522 + vsync-len = <2>;
523 + hsync-active = <1>;
524 + vsync-active = <1>;
525 + };
526 + };
527 + };
528 +};
529 --- a/arch/arm/boot/dts/ls1021a-qds.dts
530 +++ b/arch/arm/boot/dts/ls1021a-qds.dts
531 @@ -124,6 +124,21 @@
532 };
533 };
534
535 +&qspi {
536 + num-cs = <2>;
537 + status = "okay";
538 +
539 + qflash0: s25fl128s@0 {
540 + compatible = "spansion,m25p80";
541 + #address-cells = <1>;
542 + #size-cells = <1>;
543 + spi-max-frequency = <20000000>;
544 + reg = <0>;
545 + spi-rx-bus-width = <4>;
546 + spi-tx-bus-width = <4>;
547 + };
548 +};
549 +
550 &enet0 {
551 tbi-handle = <&tbi0>;
552 phy-handle = <&sgmii_phy1c>;
553 @@ -239,6 +254,11 @@
554 device-width = <1>;
555 };
556
557 + nand@2,0 {
558 + compatible = "fsl,ifc-nand";
559 + reg = <0x2 0x0 0x10000>;
560 + };
561 +
562 fpga: board-control@3,0 {
563 #address-cells = <1>;
564 #size-cells = <1>;
565 @@ -316,6 +336,10 @@
566 };
567 };
568
569 +&esdhc {
570 + status = "okay";
571 +};
572 +
573 &sai2 {
574 status = "okay";
575 };
576 @@ -331,3 +355,11 @@
577 &uart1 {
578 status = "okay";
579 };
580 +
581 +&can0 {
582 + status = "okay";
583 +};
584 +
585 +&can1 {
586 + status = "okay";
587 +};
588 --- a/arch/arm/boot/dts/ls1021a-twr.dts
589 +++ b/arch/arm/boot/dts/ls1021a-twr.dts
590 @@ -142,6 +142,21 @@
591 };
592 };
593
594 +&qspi {
595 + num-cs = <2>;
596 + status = "okay";
597 +
598 + qflash0: n25q128a13@0 {
599 + compatible = "n25q128a13", "jedec,spi-nor";
600 + #address-cells = <1>;
601 + #size-cells = <1>;
602 + spi-max-frequency = <20000000>;
603 + reg = <0>;
604 + spi-rx-bus-width = <4>;
605 + spi-tx-bus-width = <4>;
606 + };
607 +};
608 +
609 &enet0 {
610 tbi-handle = <&tbi0>;
611 phy-handle = <&sgmii_phy2>;
612 @@ -235,6 +250,10 @@
613 };
614 };
615
616 +&esdhc {
617 + status = "okay";
618 +};
619 +
620 &sai1 {
621 status = "okay";
622 };
623 @@ -250,3 +269,11 @@
624 &uart1 {
625 status = "okay";
626 };
627 +
628 +&can0 {
629 + status = "okay";
630 +};
631 +
632 +&can1 {
633 + status = "okay";
634 +};
635 --- a/arch/arm/boot/dts/ls1021a.dtsi
636 +++ b/arch/arm/boot/dts/ls1021a.dtsi
637 @@ -146,12 +146,13 @@
638 ifc: ifc@1530000 {
639 compatible = "fsl,ifc", "simple-bus";
640 reg = <0x0 0x1530000 0x0 0x10000>;
641 + big-endian;
642 interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
643 };
644
645 dcfg: dcfg@1ee0000 {
646 compatible = "fsl,ls1021a-dcfg", "syscon";
647 - reg = <0x0 0x1ee0000 0x0 0x10000>;
648 + reg = <0x0 0x1ee0000 0x0 0x1000>;
649 big-endian;
650 };
651
652 @@ -334,25 +335,44 @@
653 status = "disabled";
654 };
655
656 + qspi: quadspi@1550000 {
657 + compatible = "fsl,ls1021a-qspi";
658 + #address-cells = <1>;
659 + #size-cells = <0>;
660 + reg = <0x0 0x1550000 0x0 0x10000>,
661 + <0x0 0x40000000 0x0 0x4000000>;
662 + reg-names = "QuadSPI", "QuadSPI-memory";
663 + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
664 + clock-names = "qspi_en", "qspi";
665 + clocks = <&clockgen 4 1>, <&clockgen 4 1>;
666 + big-endian;
667 + status = "disabled";
668 + };
669 +
670 i2c0: i2c@2180000 {
671 - compatible = "fsl,vf610-i2c";
672 + compatible = "fsl,vf610-i2c", "fsl,ls1021a-vf610-i2c";
673 #address-cells = <1>;
674 #size-cells = <0>;
675 reg = <0x0 0x2180000 0x0 0x10000>;
676 interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
677 clock-names = "i2c";
678 clocks = <&clockgen 4 1>;
679 + dma-names = "tx", "rx";
680 + dmas = <&edma0 1 39>,
681 + <&edma0 1 38>;
682 + fsl-scl-gpio = <&gpio3 23 0>;
683 status = "disabled";
684 };
685
686 i2c1: i2c@2190000 {
687 - compatible = "fsl,vf610-i2c";
688 + compatible = "fsl,vf610-i2c", "fsl,ls1021a-vf610-i2c";
689 #address-cells = <1>;
690 #size-cells = <0>;
691 reg = <0x0 0x2190000 0x0 0x10000>;
692 interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
693 clock-names = "i2c";
694 clocks = <&clockgen 4 1>;
695 + fsl-scl-gpio = <&gpio3 23 0>;
696 status = "disabled";
697 };
698
699 @@ -497,6 +517,17 @@
700 status = "disabled";
701 };
702
703 + ftm0: ftm0@29d0000 {
704 + compatible = "fsl,ls1021a-ftm-alarm";
705 + reg = <0x0 0x29d0000 0x0 0x10000>,
706 + <0x0 0x1ee2144 0x0 0x4>,
707 + <0x0 0x0157051c 0x0 0x4>;
708 + reg-names = "ftm", "pmctrl", "scrachpad";
709 + interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
710 + big-endian;
711 + status = "okay";
712 + };
713 +
714 wdog0: watchdog@2ad0000 {
715 compatible = "fsl,imx21-wdt";
716 reg = <0x0 0x2ad0000 0x0 0x10000>;
717 @@ -550,6 +581,25 @@
718 <&clockgen 4 1>;
719 };
720
721 + qdma: qdma@8390000 {
722 + compatible = "fsl,ls1021a-qdma";
723 + reg = <0x0 0x8388000 0x0 0x1000>, /* Controller regs */
724 + <0x0 0x8389000 0x0 0x1000>, /* Status regs */
725 + <0x0 0x838a000 0x0 0x2000>; /* Block regs */
726 + interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>,
727 + <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>,
728 + <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
729 + interrupt-names = "qdma-error",
730 + "qdma-queue0", "qdma-queue1";
731 + channels = <8>;
732 + block-number = <2>;
733 + block-offset = <0x1000>;
734 + queues = <2>;
735 + status-sizes = <64>;
736 + queue-sizes = <64 64>;
737 + big-endian;
738 + };
739 +
740 dcu: dcu@2ce0000 {
741 compatible = "fsl,ls1021a-dcu";
742 reg = <0x0 0x2ce0000 0x0 0x10000>;
743 @@ -693,6 +743,11 @@
744 dr_mode = "host";
745 snps,quirk-frame-length-adjustment = <0x20>;
746 snps,dis_rxdet_inp3_quirk;
747 + configure-gfladj;
748 + usb3-lpm-capable;
749 + snps,dis-u1u2-when-u3-quirk;
750 + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
751 + snps,host-vbus-glitches;
752 };
753
754 pcie@3400000 {
755 @@ -700,7 +755,9 @@
756 reg = <0x00 0x03400000 0x0 0x00010000 /* controller registers */
757 0x40 0x00000000 0x0 0x00002000>; /* configuration space */
758 reg-names = "regs", "config";
759 - interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */
760 + interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>,
761 + <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>; /* aer interrupt */
762 + interrupt-names = "pme", "aer";
763 fsl,pcie-scfg = <&scfg 0>;
764 #address-cells = <3>;
765 #size-cells = <2>;
766 @@ -716,6 +773,7 @@
767 <0000 0 0 2 &gic GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>,
768 <0000 0 0 3 &gic GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>,
769 <0000 0 0 4 &gic GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
770 + status = "disabled";
771 };
772
773 pcie@3500000 {
774 @@ -723,7 +781,9 @@
775 reg = <0x00 0x03500000 0x0 0x00010000 /* controller registers */
776 0x48 0x00000000 0x0 0x00002000>; /* configuration space */
777 reg-names = "regs", "config";
778 - interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
779 + interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>,
780 + <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; /* aer interrupt */
781 + interrupt-names = "pme", "aer";
782 fsl,pcie-scfg = <&scfg 1>;
783 #address-cells = <3>;
784 #size-cells = <2>;
785 @@ -739,6 +799,47 @@
786 <0000 0 0 2 &gic GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>,
787 <0000 0 0 3 &gic GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>,
788 <0000 0 0 4 &gic GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
789 + status = "disabled";
790 + };
791 +
792 + can0: can@2a70000 {
793 + compatible = "fsl,ls1021ar2-flexcan";
794 + reg = <0x0 0x2a70000 0x0 0x1000>;
795 + interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
796 + clocks = <&clockgen 4 1>, <&clockgen 4 1>;
797 + clock-names = "ipg", "per";
798 + big-endian;
799 + status = "disabled";
800 + };
801 +
802 + can1: can@2a80000 {
803 + compatible = "fsl,ls1021ar2-flexcan";
804 + reg = <0x0 0x2a80000 0x0 0x1000>;
805 + interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
806 + clocks = <&clockgen 4 1>, <&clockgen 4 1>;
807 + clock-names = "ipg", "per";
808 + big-endian;
809 + status = "disabled";
810 + };
811 +
812 + can2: can@2a90000 {
813 + compatible = "fsl,ls1021ar2-flexcan";
814 + reg = <0x0 0x2a90000 0x0 0x1000>;
815 + interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;
816 + clocks = <&clockgen 4 1>, <&clockgen 4 1>;
817 + clock-names = "ipg", "per";
818 + big-endian;
819 + status = "disabled";
820 + };
821 +
822 + can3: can@2aa0000 {
823 + compatible = "fsl,ls1021ar2-flexcan";
824 + reg = <0x0 0x2aa0000 0x0 0x1000>;
825 + interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>;
826 + clocks = <&clockgen 4 1>, <&clockgen 4 1>;
827 + clock-names = "ipg", "per";
828 + big-endian;
829 + status = "disabled";
830 };
831 };
832 };
833 --- a/arch/arm64/boot/dts/freescale/Makefile
834 +++ b/arch/arm64/boot/dts/freescale/Makefile
835 @@ -1,19 +1,33 @@
836 # SPDX-License-Identifier: GPL-2.0
837 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-frdm.dtb
838 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-frwy.dtb
839 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-qds.dtb
840 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-rdb.dtb
841 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-2g5rdb.dtb
842 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-qds.dtb
843 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-qds-sdk.dtb
844 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-rdb.dtb
845 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-rdb-sdk.dtb
846 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-rdb-usdpaa.dtb
847 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-qds.dtb
848 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-qds-sdk.dtb
849 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-rdb.dtb
850 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-rdb-sdk.dtb
851 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-rdb-usdpaa.dtb
852 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1088a-qds.dtb
853 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1088a-rdb.dtb
854 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-qds.dtb
855 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-rdb.dtb
856 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2081a-rdb.dtb
857 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-simu.dtb
858 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2088a-qds.dtb
859 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2088a-rdb.dtb
860 -
861 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-qds.dtb
862 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-rdb.dtb
863 +
864 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += traverse-ls1043v.dtb
865 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += traverse-ls1043s.dtb
866 +
867 always := $(dtb-y)
868 subdir-y := $(dts-dirs)
869 clean-files := *.dtb
870 --- /dev/null
871 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-2g5rdb.dts
872 @@ -0,0 +1,126 @@
873 +/*
874 + * Device Tree file for NXP LS1012A 2G5RDB Board.
875 + *
876 + * Copyright 2017 NXP
877 + *
878 + * Bhaskar Upadhaya <bhaskar.upadhaya@nxp.com>
879 + *
880 + * This file is dual-licensed: you can use it either under the terms
881 + * of the GPLv2 or the X11 license, at your option. Note that this dual
882 + * licensing only applies to this file, and not this project as a
883 + * whole.
884 + *
885 + * a) This library is free software; you can redistribute it and/or
886 + * modify it under the terms of the GNU General Public License as
887 + * published by the Free Software Foundation; either version 2 of the
888 + * License, or (at your option) any later version.
889 + *
890 + * This library is distributed in the hope that it will be useful,
891 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
892 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
893 + * GNU General Public License for more details.
894 + *
895 + * Or, alternatively,
896 + *
897 + * b) Permission is hereby granted, free of charge, to any person
898 + * obtaining a copy of this software and associated documentation
899 + * files (the "Software"), to deal in the Software without
900 + * restriction, including without limitation the rights to use,
901 + * copy, modify, merge, publish, distribute, sublicense, and/or
902 + * sell copies of the Software, and to permit persons to whom the
903 + * Software is furnished to do so, subject to the following
904 + * conditions:
905 + *
906 + * The above copyright notice and this permission notice shall be
907 + * included in all copies or substantial portions of the Software.
908 + *
909 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
910 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
911 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
912 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
913 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
914 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
915 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
916 + * OTHER DEALINGS IN THE SOFTWARE.
917 + */
918 +/dts-v1/;
919 +
920 +#include "fsl-ls1012a.dtsi"
921 +
922 +/ {
923 + model = "LS1012A 2G5RDB Board";
924 + compatible = "fsl,ls1012a-rdb", "fsl,ls1012a";
925 +
926 + aliases {
927 + ethernet0 = &pfe_mac0;
928 + ethernet1 = &pfe_mac1;
929 + };
930 +};
931 +
932 +&duart0 {
933 + status = "okay";
934 +};
935 +
936 +&i2c0 {
937 + status = "okay";
938 +};
939 +
940 +&qspi {
941 + num-cs = <2>;
942 + bus-num = <0>;
943 + status = "okay";
944 +
945 + qflash0: s25fs512s@0 {
946 + compatible = "spansion,m25p80";
947 + #address-cells = <1>;
948 + #size-cells = <1>;
949 + spi-max-frequency = <20000000>;
950 + m25p,fast-read;
951 + reg = <0>;
952 + };
953 +};
954 +
955 +&sata {
956 + status = "okay";
957 +};
958 +
959 +&pfe {
960 + status = "okay";
961 + #address-cells = <1>;
962 + #size-cells = <0>;
963 +
964 + pfe_mac0: ethernet@0 {
965 + compatible = "fsl,pfe-gemac-port";
966 + #address-cells = <1>;
967 + #size-cells = <0>;
968 + reg = <0x0>; /* GEM_ID */
969 + fsl,mdio-mux-val = <0x0>;
970 + phy-mode = "sgmii-2500";
971 + phy-handle = <&sgmii_phy1>;
972 + };
973 +
974 + pfe_mac1: ethernet@1 {
975 + compatible = "fsl,pfe-gemac-port";
976 + #address-cells = <1>;
977 + #size-cells = <0>;
978 + reg = <0x1>; /* GEM_ID */
979 + fsl,mdio-mux-val = <0x0>;
980 + phy-mode = "sgmii-2500";
981 + phy-handle = <&sgmii_phy2>;
982 + };
983 +
984 + mdio@0 {
985 + #address-cells = <1>;
986 + #size-cells = <0>;
987 +
988 + sgmii_phy1: ethernet-phy@1 {
989 + compatible = "ethernet-phy-ieee802.3-c45";
990 + reg = <0x1>;
991 + };
992 +
993 + sgmii_phy2: ethernet-phy@2 {
994 + compatible = "ethernet-phy-ieee802.3-c45";
995 + reg = <0x2>;
996 + };
997 + };
998 +};
999 --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts
1000 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts
1001 @@ -1,45 +1,9 @@
1002 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
1003 /*
1004 * Device Tree file for Freescale LS1012A Freedom Board.
1005 *
1006 * Copyright 2016 Freescale Semiconductor, Inc.
1007 *
1008 - * This file is dual-licensed: you can use it either under the terms
1009 - * of the GPLv2 or the X11 license, at your option. Note that this dual
1010 - * licensing only applies to this file, and not this project as a
1011 - * whole.
1012 - *
1013 - * a) This library is free software; you can redistribute it and/or
1014 - * modify it under the terms of the GNU General Public License as
1015 - * published by the Free Software Foundation; either version 2 of the
1016 - * License, or (at your option) any later version.
1017 - *
1018 - * This library is distributed in the hope that it will be useful,
1019 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
1020 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1021 - * GNU General Public License for more details.
1022 - *
1023 - * Or, alternatively,
1024 - *
1025 - * b) Permission is hereby granted, free of charge, to any person
1026 - * obtaining a copy of this software and associated documentation
1027 - * files (the "Software"), to deal in the Software without
1028 - * restriction, including without limitation the rights to use,
1029 - * copy, modify, merge, publish, distribute, sublicense, and/or
1030 - * sell copies of the Software, and to permit persons to whom the
1031 - * Software is furnished to do so, subject to the following
1032 - * conditions:
1033 - *
1034 - * The above copyright notice and this permission notice shall be
1035 - * included in all copies or substantial portions of the Software.
1036 - *
1037 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
1038 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
1039 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
1040 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
1041 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
1042 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
1043 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
1044 - * OTHER DEALINGS IN THE SOFTWARE.
1045 */
1046 /dts-v1/;
1047
1048 @@ -49,6 +13,11 @@
1049 model = "LS1012A Freedom Board";
1050 compatible = "fsl,ls1012a-frdm", "fsl,ls1012a";
1051
1052 + aliases {
1053 + ethernet0 = &pfe_mac0;
1054 + ethernet1 = &pfe_mac1;
1055 + };
1056 +
1057 sys_mclk: clock-mclk {
1058 compatible = "fixed-clock";
1059 #clock-cells = <0>;
1060 @@ -110,6 +79,45 @@
1061 };
1062 };
1063
1064 +&pfe {
1065 + status = "okay";
1066 + #address-cells = <1>;
1067 + #size-cells = <0>;
1068 +
1069 + pfe_mac0: ethernet@0 {
1070 + compatible = "fsl,pfe-gemac-port";
1071 + #address-cells = <1>;
1072 + #size-cells = <0>;
1073 + reg = <0x0>; /* GEM_ID */
1074 + fsl,mdio-mux-val = <0x0>;
1075 + phy-mode = "sgmii";
1076 + phy-handle = <&sgmii_phy1>;
1077 + };
1078 +
1079 + pfe_mac1: ethernet@1 {
1080 + compatible = "fsl,pfe-gemac-port";
1081 + #address-cells = <1>;
1082 + #size-cells = <0>;
1083 + reg = <0x1>; /* GEM_ID */
1084 + fsl,mdio-mux-val = <0x0>;
1085 + phy-mode = "sgmii";
1086 + phy-handle = <&sgmii_phy2>;
1087 + };
1088 +
1089 + mdio@0 {
1090 + #address-cells = <1>;
1091 + #size-cells = <0>;
1092 +
1093 + sgmii_phy1: ethernet-phy@2 {
1094 + reg = <0x2>;
1095 + };
1096 +
1097 + sgmii_phy2: ethernet-phy@1 {
1098 + reg = <0x1>;
1099 + };
1100 + };
1101 +};
1102 +
1103 &sai2 {
1104 status = "okay";
1105 };
1106 @@ -117,3 +125,18 @@
1107 &sata {
1108 status = "okay";
1109 };
1110 +
1111 +&qspi {
1112 + status = "okay";
1113 + qflash0: s25fs512s@0 {
1114 + compatible = "spansion,m25p80";
1115 + #address-cells = <1>;
1116 + #size-cells = <1>;
1117 + spi-max-frequency = <20000000>;
1118 + m25p,fast-read;
1119 + reg = <0>;
1120 + spi-rx-bus-width = <2>;
1121 + spi-tx-bus-width = <2>;
1122 + };
1123 +
1124 +};
1125 --- /dev/null
1126 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-frwy.dts
1127 @@ -0,0 +1,179 @@
1128 +/*
1129 + * Device Tree file for NXP LS1012A FRWY Board.
1130 + *
1131 + * Copyright 2018 NXP
1132 + *
1133 + * This file is dual-licensed: you can use it either under the terms
1134 + * of the GPLv2 or the X11 license, at your option. Note that this dual
1135 + * licensing only applies to this file, and not this project as a
1136 + * whole.
1137 + *
1138 + * a) This library is free software; you can redistribute it and/or
1139 + * modify it under the terms of the GNU General Public License as
1140 + * published by the Free Software Foundation; either version 2 of the
1141 + * License, or (at your option) any later version.
1142 + *
1143 + * This library is distributed in the hope that it will be useful,
1144 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
1145 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1146 + * GNU General Public License for more details.
1147 + *
1148 + * Or, alternatively,
1149 + *
1150 + * b) Permission is hereby granted, free of charge, to any person
1151 + * obtaining a copy of this software and associated documentation
1152 + * files (the "Software"), to deal in the Software without
1153 + * restriction, including without limitation the rights to use,
1154 + * copy, modify, merge, publish, distribute, sublicense, and/or
1155 + * sell copies of the Software, and to permit persons to whom the
1156 + * Software is furnished to do so, subject to the following
1157 + * conditions:
1158 + *
1159 + * The above copyright notice and this permission notice shall be
1160 + * included in all copies or substantial portions of the Software.
1161 + *
1162 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
1163 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
1164 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
1165 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
1166 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
1167 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
1168 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
1169 + * OTHER DEALINGS IN THE SOFTWARE.
1170 + */
1171 +/dts-v1/;
1172 +
1173 +#include "fsl-ls1012a.dtsi"
1174 +
1175 +/ {
1176 + model = "LS1012A FRWY Board";
1177 + compatible = "fsl,ls1012a-frwy", "fsl,ls1012a";
1178 +
1179 + aliases {
1180 + ethernet0 = &pfe_mac0;
1181 + ethernet1 = &pfe_mac1;
1182 + };
1183 +
1184 + sys_mclk: clock-mclk {
1185 + compatible = "fixed-clock";
1186 + #clock-cells = <0>;
1187 + clock-frequency = <25000000>;
1188 + };
1189 +
1190 + reg_1p8v: regulator-1p8v {
1191 + compatible = "regulator-fixed";
1192 + regulator-name = "1P8V";
1193 + regulator-min-microvolt = <1800000>;
1194 + regulator-max-microvolt = <1800000>;
1195 + regulator-always-on;
1196 + };
1197 +
1198 + sound {
1199 + compatible = "simple-audio-card";
1200 + simple-audio-card,format = "i2s";
1201 + simple-audio-card,widgets =
1202 + "Microphone", "Microphone Jack",
1203 + "Headphone", "Headphone Jack",
1204 + "Speaker", "Speaker Ext",
1205 + "Line", "Line In Jack";
1206 + simple-audio-card,routing =
1207 + "MIC_IN", "Microphone Jack",
1208 + "Microphone Jack", "Mic Bias",
1209 + "LINE_IN", "Line In Jack",
1210 + "Headphone Jack", "HP_OUT",
1211 + "Speaker Ext", "LINE_OUT";
1212 +
1213 + simple-audio-card,cpu {
1214 + sound-dai = <&sai2>;
1215 + frame-master;
1216 + bitclock-master;
1217 + };
1218 +
1219 + simple-audio-card,codec {
1220 + sound-dai = <&codec>;
1221 + frame-master;
1222 + bitclock-master;
1223 + system-clock-frequency = <25000000>;
1224 + };
1225 + };
1226 +};
1227 +
1228 +&pcie {
1229 + status = "okay";
1230 +};
1231 +
1232 +&duart0 {
1233 + status = "okay";
1234 +};
1235 +
1236 +&i2c0 {
1237 + status = "okay";
1238 +
1239 + codec: sgtl5000@a {
1240 + compatible = "fsl,sgtl5000";
1241 + #sound-dai-cells = <0>;
1242 + reg = <0xa>;
1243 + VDDA-supply = <&reg_1p8v>;
1244 + VDDIO-supply = <&reg_1p8v>;
1245 + clocks = <&sys_mclk>;
1246 + };
1247 +};
1248 +
1249 +&qspi {
1250 + num-cs = <1>;
1251 + bus-num = <0>;
1252 + status = "okay";
1253 +
1254 + qflash0: w25q16dw@0 {
1255 + compatible = "spansion,m25p80";
1256 + #address-cells = <1>;
1257 + #size-cells = <1>;
1258 + m25p,fast-read;
1259 + spi-max-frequency = <20000000>;
1260 + reg = <0>;
1261 + };
1262 +};
1263 +
1264 +&pfe {
1265 + status = "okay";
1266 + #address-cells = <1>;
1267 + #size-cells = <0>;
1268 +
1269 + pfe_mac0: ethernet@0 {
1270 + compatible = "fsl,pfe-gemac-port";
1271 + #address-cells = <1>;
1272 + #size-cells = <0>;
1273 + reg = <0x0>; /* GEM_ID */
1274 + fsl,gemac-bus-id = <0x0>; /* BUS_ID */
1275 + fsl,mdio-mux-val = <0x0>;
1276 + phy-mode = "sgmii";
1277 + phy-handle = <&sgmii_phy1>;
1278 + };
1279 +
1280 + pfe_mac1: ethernet@1 {
1281 + compatible = "fsl,pfe-gemac-port";
1282 + #address-cells = <1>;
1283 + #size-cells = <0>;
1284 + reg = <0x1>; /* GEM_ID */
1285 + fsl,mdio-mux-val = <0x0>;
1286 + phy-mode = "sgmii";
1287 + phy-handle = <&sgmii_phy2>;
1288 + };
1289 +
1290 + mdio@0 {
1291 + #address-cells = <1>;
1292 + #size-cells = <0>;
1293 +
1294 + sgmii_phy1: ethernet-phy@2 {
1295 + reg = <0x2>;
1296 + };
1297 +
1298 + sgmii_phy2: ethernet-phy@1 {
1299 + reg = <0x1>;
1300 + };
1301 + };
1302 +};
1303 +
1304 +&sai2 {
1305 + status = "okay";
1306 +};
1307 --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts
1308 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts
1309 @@ -1,45 +1,9 @@
1310 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
1311 /*
1312 * Device Tree file for Freescale LS1012A QDS Board.
1313 *
1314 * Copyright 2016 Freescale Semiconductor, Inc.
1315 *
1316 - * This file is dual-licensed: you can use it either under the terms
1317 - * of the GPLv2 or the X11 license, at your option. Note that this dual
1318 - * licensing only applies to this file, and not this project as a
1319 - * whole.
1320 - *
1321 - * a) This library is free software; you can redistribute it and/or
1322 - * modify it under the terms of the GNU General Public License as
1323 - * published by the Free Software Foundation; either version 2 of the
1324 - * License, or (at your option) any later version.
1325 - *
1326 - * This library is distributed in the hope that it will be useful,
1327 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
1328 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1329 - * GNU General Public License for more details.
1330 - *
1331 - * Or, alternatively,
1332 - *
1333 - * b) Permission is hereby granted, free of charge, to any person
1334 - * obtaining a copy of this software and associated documentation
1335 - * files (the "Software"), to deal in the Software without
1336 - * restriction, including without limitation the rights to use,
1337 - * copy, modify, merge, publish, distribute, sublicense, and/or
1338 - * sell copies of the Software, and to permit persons to whom the
1339 - * Software is furnished to do so, subject to the following
1340 - * conditions:
1341 - *
1342 - * The above copyright notice and this permission notice shall be
1343 - * included in all copies or substantial portions of the Software.
1344 - *
1345 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
1346 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
1347 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
1348 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
1349 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
1350 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
1351 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
1352 - * OTHER DEALINGS IN THE SOFTWARE.
1353 */
1354 /dts-v1/;
1355
1356 @@ -49,6 +13,11 @@
1357 model = "LS1012A QDS Board";
1358 compatible = "fsl,ls1012a-qds", "fsl,ls1012a";
1359
1360 + aliases {
1361 + ethernet0 = &pfe_mac0;
1362 + ethernet1 = &pfe_mac1;
1363 + };
1364 +
1365 sys_mclk: clock-mclk {
1366 compatible = "fixed-clock";
1367 #clock-cells = <0>;
1368 @@ -93,6 +62,43 @@
1369 };
1370 };
1371
1372 +&pcie {
1373 + status = "okay";
1374 +};
1375 +
1376 +&dspi {
1377 + bus-num = <0>;
1378 + status = "okay";
1379 +
1380 + flash@0 {
1381 + #address-cells = <1>;
1382 + #size-cells = <1>;
1383 + compatible = "n25q128a11", "jedec,spi-nor";
1384 + reg = <0>;
1385 + spi-max-frequency = <10000000>;
1386 + };
1387 +
1388 + flash@1 {
1389 + #address-cells = <1>;
1390 + #size-cells = <1>;
1391 + compatible = "sst25wf040b", "jedec,spi-nor";
1392 + spi-cpol;
1393 + spi-cpha;
1394 + reg = <1>;
1395 + spi-max-frequency = <10000000>;
1396 + };
1397 +
1398 + flash@2 {
1399 + #address-cells = <1>;
1400 + #size-cells = <1>;
1401 + compatible = "en25s64", "jedec,spi-nor";
1402 + spi-cpol;
1403 + spi-cpha;
1404 + reg = <2>;
1405 + spi-max-frequency = <10000000>;
1406 + };
1407 +};
1408 +
1409 &duart0 {
1410 status = "okay";
1411 };
1412 @@ -131,6 +137,47 @@
1413 };
1414 };
1415
1416 +&pfe {
1417 + status = "okay";
1418 + #address-cells = <1>;
1419 + #size-cells = <0>;
1420 +
1421 + pfe_mac0: ethernet@0 {
1422 + compatible = "fsl,pfe-gemac-port";
1423 + #address-cells = <1>;
1424 + #size-cells = <0>;
1425 + reg = <0x0>; /* GEM_ID */
1426 + fsl,mdio-mux-val = <0x2>;
1427 + phy-mode = "sgmii-2500";
1428 + phy-handle = <&sgmii_phy1>;
1429 + };
1430 +
1431 + pfe_mac1: ethernet@1 {
1432 + compatible = "fsl,pfe-gemac-port";
1433 + #address-cells = <1>;
1434 + #size-cells = <0>;
1435 + reg = <0x1>; /* GEM_ID */
1436 + fsl,mdio-mux-val = <0x3>;
1437 + phy-mode = "sgmii-2500";
1438 + phy-handle = <&sgmii_phy2>;
1439 + };
1440 +
1441 + mdio@0 {
1442 + #address-cells = <1>;
1443 + #size-cells = <0>;
1444 +
1445 + sgmii_phy1: ethernet-phy@1 {
1446 + compatible = "ethernet-phy-ieee802.3-c45";
1447 + reg = <0x1>;
1448 + };
1449 +
1450 + sgmii_phy2: ethernet-phy@2 {
1451 + compatible = "ethernet-phy-ieee802.3-c45";
1452 + reg = <0x2>;
1453 + };
1454 + };
1455 +};
1456 +
1457 &sai2 {
1458 status = "okay";
1459 };
1460 @@ -138,3 +185,18 @@
1461 &sata {
1462 status = "okay";
1463 };
1464 +
1465 +&qspi {
1466 + status = "okay";
1467 + qflash0: s25fs512s@0 {
1468 + compatible = "spansion,m25p80";
1469 + #address-cells = <1>;
1470 + #size-cells = <1>;
1471 + spi-max-frequency = <20000000>;
1472 + m25p,fast-read;
1473 + reg = <0>;
1474 + spi-rx-bus-width = <2>;
1475 + spi-tx-bus-width = <2>;
1476 + };
1477 +
1478 +};
1479 --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts
1480 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts
1481 @@ -1,45 +1,9 @@
1482 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
1483 /*
1484 * Device Tree file for Freescale LS1012A RDB Board.
1485 *
1486 * Copyright 2016 Freescale Semiconductor, Inc.
1487 *
1488 - * This file is dual-licensed: you can use it either under the terms
1489 - * of the GPLv2 or the X11 license, at your option. Note that this dual
1490 - * licensing only applies to this file, and not this project as a
1491 - * whole.
1492 - *
1493 - * a) This library is free software; you can redistribute it and/or
1494 - * modify it under the terms of the GNU General Public License as
1495 - * published by the Free Software Foundation; either version 2 of the
1496 - * License, or (at your option) any later version.
1497 - *
1498 - * This library is distributed in the hope that it will be useful,
1499 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
1500 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1501 - * GNU General Public License for more details.
1502 - *
1503 - * Or, alternatively,
1504 - *
1505 - * b) Permission is hereby granted, free of charge, to any person
1506 - * obtaining a copy of this software and associated documentation
1507 - * files (the "Software"), to deal in the Software without
1508 - * restriction, including without limitation the rights to use,
1509 - * copy, modify, merge, publish, distribute, sublicense, and/or
1510 - * sell copies of the Software, and to permit persons to whom the
1511 - * Software is furnished to do so, subject to the following
1512 - * conditions:
1513 - *
1514 - * The above copyright notice and this permission notice shall be
1515 - * included in all copies or substantial portions of the Software.
1516 - *
1517 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
1518 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
1519 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
1520 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
1521 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
1522 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
1523 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
1524 - * OTHER DEALINGS IN THE SOFTWARE.
1525 */
1526 /dts-v1/;
1527
1528 @@ -48,6 +12,15 @@
1529 / {
1530 model = "LS1012A RDB Board";
1531 compatible = "fsl,ls1012a-rdb", "fsl,ls1012a";
1532 +
1533 + aliases {
1534 + ethernet0 = &pfe_mac0;
1535 + ethernet1 = &pfe_mac1;
1536 + };
1537 +};
1538 +
1539 +&pcie {
1540 + status = "okay";
1541 };
1542
1543 &duart0 {
1544 @@ -74,3 +47,56 @@
1545 &sata {
1546 status = "okay";
1547 };
1548 +
1549 +&pfe {
1550 + status = "okay";
1551 + #address-cells = <1>;
1552 + #size-cells = <0>;
1553 +
1554 + pfe_mac0: ethernet@0 {
1555 + compatible = "fsl,pfe-gemac-port";
1556 + #address-cells = <1>;
1557 + #size-cells = <0>;
1558 + reg = <0x0>; /* GEM_ID */
1559 + fsl,mdio-mux-val = <0x0>;
1560 + phy-mode = "sgmii";
1561 + phy-handle = <&sgmii_phy>;
1562 + };
1563 +
1564 + pfe_mac1: ethernet@1 {
1565 + compatible = "fsl,pfe-gemac-port";
1566 + #address-cells = <1>;
1567 + #size-cells = <0>;
1568 + reg = <0x1>; /* GEM_ID */
1569 + fsl,mdio-mux-val = <0x0>;
1570 + phy-mode = "rgmii-txid";
1571 + phy-handle = <&rgmii_phy>;
1572 + };
1573 + mdio@0 {
1574 + #address-cells = <1>;
1575 + #size-cells = <0>;
1576 +
1577 + sgmii_phy: ethernet-phy@2 {
1578 + reg = <0x2>;
1579 + };
1580 +
1581 + rgmii_phy: ethernet-phy@1 {
1582 + reg = <0x1>;
1583 + };
1584 + };
1585 +};
1586 +
1587 +&qspi {
1588 + status = "okay";
1589 + qflash0: s25fs512s@0 {
1590 + compatible = "spansion,m25p80";
1591 + #address-cells = <1>;
1592 + #size-cells = <1>;
1593 + spi-max-frequency = <20000000>;
1594 + m25p,fast-read;
1595 + reg = <0>;
1596 + spi-rx-bus-width = <2>;
1597 + spi-tx-bus-width = <2>;
1598 + };
1599 +
1600 +};
1601 --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
1602 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
1603 @@ -1,45 +1,9 @@
1604 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
1605 /*
1606 * Device Tree Include file for Freescale Layerscape-1012A family SoC.
1607 *
1608 * Copyright 2016 Freescale Semiconductor, Inc.
1609 *
1610 - * This file is dual-licensed: you can use it either under the terms
1611 - * of the GPLv2 or the X11 license, at your option. Note that this dual
1612 - * licensing only applies to this file, and not this project as a
1613 - * whole.
1614 - *
1615 - * a) This library is free software; you can redistribute it and/or
1616 - * modify it under the terms of the GNU General Public License as
1617 - * published by the Free Software Foundation; either version 2 of the
1618 - * License, or (at your option) any later version.
1619 - *
1620 - * This library is distributed in the hope that it will be useful,
1621 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
1622 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1623 - * GNU General Public License for more details.
1624 - *
1625 - * Or, alternatively,
1626 - *
1627 - * b) Permission is hereby granted, free of charge, to any person
1628 - * obtaining a copy of this software and associated documentation
1629 - * files (the "Software"), to deal in the Software without
1630 - * restriction, including without limitation the rights to use,
1631 - * copy, modify, merge, publish, distribute, sublicense, and/or
1632 - * sell copies of the Software, and to permit persons to whom the
1633 - * Software is furnished to do so, subject to the following
1634 - * conditions:
1635 - *
1636 - * The above copyright notice and this permission notice shall be
1637 - * included in all copies or substantial portions of the Software.
1638 - *
1639 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
1640 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
1641 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
1642 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
1643 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
1644 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
1645 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
1646 - * OTHER DEALINGS IN THE SOFTWARE.
1647 */
1648
1649 #include <dt-bindings/interrupt-controller/arm-gic.h>
1650 @@ -64,12 +28,30 @@
1651 #address-cells = <1>;
1652 #size-cells = <0>;
1653
1654 - cpu0: cpu@0 {
1655 + cooling_map0: cpu0: cpu@0 {
1656 device_type = "cpu";
1657 compatible = "arm,cortex-a53";
1658 reg = <0x0>;
1659 clocks = <&clockgen 1 0>;
1660 #cooling-cells = <2>;
1661 + cpu-idle-states = <&CPU_PH20>;
1662 + };
1663 + };
1664 +
1665 + idle-states {
1666 + /*
1667 + * PSCI node is not added default, U-boot will add missing
1668 + * parts if it determines to use PSCI.
1669 + */
1670 + entry-method = "arm,psci";
1671 +
1672 + CPU_PH20: cpu-ph20 {
1673 + compatible = "arm,idle-state";
1674 + idle-state-name = "PH20";
1675 + arm,psci-suspend-param = <0x0>;
1676 + entry-latency-us = <1000>;
1677 + exit-latency-us = <1000>;
1678 + min-residency-us = <3000>;
1679 };
1680 };
1681
1682 @@ -248,7 +230,7 @@
1683 dcfg: dcfg@1ee0000 {
1684 compatible = "fsl,ls1012a-dcfg",
1685 "syscon";
1686 - reg = <0x0 0x1ee0000 0x0 0x10000>;
1687 + reg = <0x0 0x1ee0000 0x0 0x1000>;
1688 big-endian;
1689 };
1690
1691 @@ -305,44 +287,25 @@
1692 #thermal-sensor-cells = <1>;
1693 };
1694
1695 - thermal-zones {
1696 - cpu_thermal: cpu-thermal {
1697 - polling-delay-passive = <1000>;
1698 - polling-delay = <5000>;
1699 - thermal-sensors = <&tmu 0>;
1700 -
1701 - trips {
1702 - cpu_alert: cpu-alert {
1703 - temperature = <85000>;
1704 - hysteresis = <2000>;
1705 - type = "passive";
1706 - };
1707 -
1708 - cpu_crit: cpu-crit {
1709 - temperature = <95000>;
1710 - hysteresis = <2000>;
1711 - type = "critical";
1712 - };
1713 - };
1714 + #include "fsl-tmu.dtsi"
1715
1716 - cooling-maps {
1717 - map0 {
1718 - trip = <&cpu_alert>;
1719 - cooling-device =
1720 - <&cpu0 THERMAL_NO_LIMIT
1721 - THERMAL_NO_LIMIT>;
1722 - };
1723 - };
1724 - };
1725 + ftm0: ftm0@29d0000 {
1726 + compatible = "fsl,ls1012a-ftm-alarm";
1727 + reg = <0x0 0x29d0000 0x0 0x10000>,
1728 + <0x0 0x1ee2140 0x0 0x4>;
1729 + reg-names = "ftm", "pmctrl";
1730 + interrupts = <0 86 0x4>;
1731 + big-endian;
1732 };
1733
1734 i2c0: i2c@2180000 {
1735 - compatible = "fsl,vf610-i2c";
1736 + compatible = "fsl,vf610-i2c", "fsl,ls1012a-vf610-i2c";
1737 #address-cells = <1>;
1738 #size-cells = <0>;
1739 reg = <0x0 0x2180000 0x0 0x10000>;
1740 interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>;
1741 - clocks = <&clockgen 4 0>;
1742 + clocks = <&clockgen 4 3>;
1743 + scl-gpios = <&gpio0 13 0>;
1744 status = "disabled";
1745 };
1746
1747 @@ -352,7 +315,20 @@
1748 #size-cells = <0>;
1749 reg = <0x0 0x2190000 0x0 0x10000>;
1750 interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>;
1751 + clocks = <&clockgen 4 3>;
1752 + status = "disabled";
1753 + };
1754 +
1755 + dspi: dspi@2100000 {
1756 + compatible = "fsl,ls1012a-dspi", "fsl,ls1021a-v1.0-dspi";
1757 + #address-cells = <1>;
1758 + #size-cells = <0>;
1759 + reg = <0x0 0x2100000 0x0 0x10000>;
1760 + interrupts = <0 64 IRQ_TYPE_LEVEL_HIGH>;
1761 + clock-names = "dspi";
1762 clocks = <&clockgen 4 0>;
1763 + spi-num-chipselects = <5>;
1764 + big-endian;
1765 status = "disabled";
1766 };
1767
1768 @@ -401,6 +377,20 @@
1769 big-endian;
1770 };
1771
1772 + qspi: quadspi@1550000 {
1773 + compatible = "fsl,ls1012a-qspi", "fsl,ls1021a-qspi";
1774 + #address-cells = <1>;
1775 + #size-cells = <0>;
1776 + reg = <0x0 0x1550000 0x0 0x10000>,
1777 + <0x0 0x40000000 0x0 0x10000000>;
1778 + reg-names = "QuadSPI", "QuadSPI-memory";
1779 + interrupts = <0 99 IRQ_TYPE_LEVEL_HIGH>;
1780 + clock-names = "qspi_en", "qspi";
1781 + clocks = <&clockgen 4 0>, <&clockgen 4 0>;
1782 + big-endian;
1783 + status = "disabled";
1784 + };
1785 +
1786 sai1: sai@2b50000 {
1787 #sound-dai-cells = <0>;
1788 compatible = "fsl,vf610-sai";
1789 @@ -452,6 +442,8 @@
1790 dr_mode = "host";
1791 snps,quirk-frame-length-adjustment = <0x20>;
1792 snps,dis_rxdet_inp3_quirk;
1793 + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
1794 + snps,host-vbus-glitches;
1795 };
1796
1797 sata: sata@3200000 {
1798 @@ -472,5 +464,85 @@
1799 dr_mode = "host";
1800 phy_type = "ulpi";
1801 };
1802 +
1803 + msi: msi-controller1@1572000 {
1804 + compatible = "fsl,ls1012a-msi";
1805 + reg = <0x0 0x1572000 0x0 0x8>;
1806 + msi-controller;
1807 + interrupts = <0 126 IRQ_TYPE_LEVEL_HIGH>;
1808 + };
1809 +
1810 + pcie: pcie@3400000 {
1811 + compatible = "fsl,ls1012a-pcie", "snps,dw-pcie";
1812 + reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */
1813 + 0x40 0x00000000 0x0 0x00002000>; /* configuration space */
1814 + reg-names = "regs", "config";
1815 + interrupts = <0 118 0x4>, /* AER interrupt */
1816 + <0 117 0x4>; /* PME interrupt */
1817 + interrupt-names = "aer", "pme";
1818 + #address-cells = <3>;
1819 + #size-cells = <2>;
1820 + device_type = "pci";
1821 + num-lanes = <4>;
1822 + bus-range = <0x0 0xff>;
1823 + ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */
1824 + 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
1825 + msi-parent = <&msi>;
1826 + #interrupt-cells = <1>;
1827 + interrupt-map-mask = <0 0 0 7>;
1828 + interrupt-map = <0000 0 0 1 &gic 0 110 IRQ_TYPE_LEVEL_HIGH>,
1829 + <0000 0 0 2 &gic 0 111 IRQ_TYPE_LEVEL_HIGH>,
1830 + <0000 0 0 3 &gic 0 112 IRQ_TYPE_LEVEL_HIGH>,
1831 + <0000 0 0 4 &gic 0 113 IRQ_TYPE_LEVEL_HIGH>;
1832 + status = "disabled";
1833 + };
1834 +
1835 + rcpm: rcpm@1ee2000 {
1836 + compatible = "fsl,ls1012a-rcpm", "fsl,qoriq-rcpm-2.1";
1837 + reg = <0x0 0x1ee2000 0x0 0x1000>;
1838 + fsl,#rcpm-wakeup-cells = <1>;
1839 + };
1840 + };
1841 +
1842 + reserved-memory {
1843 + #address-cells = <2>;
1844 + #size-cells = <2>;
1845 + ranges;
1846 +
1847 + pfe_reserved: packetbuffer@83400000 {
1848 + reg = <0 0x83400000 0 0xc00000>;
1849 + };
1850 + };
1851 +
1852 + pfe: pfe@04000000 {
1853 + compatible = "fsl,pfe";
1854 + reg = <0x0 0x04000000 0x0 0xc00000>, /* AXI 16M */
1855 + <0x0 0x83400000 0x0 0xc00000>; /* PFE DDR 12M */
1856 + reg-names = "pfe", "pfe-ddr";
1857 + fsl,pfe-num-interfaces = <0x2>;
1858 + interrupts = <0 172 0x4>, /* HIF interrupt */
1859 + <0 173 0x4>, /*HIF_NOCPY interrupt */
1860 + <0 174 0x4>; /* WoL interrupt */
1861 + interrupt-names = "pfe_hif", "pfe_hif_nocpy", "pfe_wol";
1862 + memory-region = <&pfe_reserved>;
1863 + fsl,pfe-scfg = <&scfg 0>;
1864 + fsl,rcpm-wakeup = <&rcpm 0xf0000020>;
1865 + clocks = <&clockgen 4 0>;
1866 + clock-names = "pfe";
1867 +
1868 + status = "okay";
1869 + };
1870 +
1871 + firmware {
1872 + optee {
1873 + compatible = "linaro,optee-tz";
1874 + method = "smc";
1875 + };
1876 + };
1877 +};
1878 +
1879 +&thermal_zones {
1880 + thermal-zone0 {
1881 + status = "okay";
1882 };
1883 };
1884 --- a/arch/arm64/boot/dts/freescale/fsl-ls1043-post.dtsi
1885 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043-post.dtsi
1886 @@ -1,9 +1,8 @@
1887 +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
1888 /*
1889 * QorIQ FMan v3 device tree nodes for ls1043
1890 *
1891 * Copyright 2015-2016 Freescale Semiconductor Inc.
1892 - *
1893 - * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
1894 */
1895
1896 &soc {
1897 --- /dev/null
1898 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds-sdk.dts
1899 @@ -0,0 +1,263 @@
1900 +/*
1901 + * Device Tree Include file for Freescale Layerscape-1043A family SoC.
1902 + *
1903 + * Copyright 2014-2015 Freescale Semiconductor, Inc.
1904 + *
1905 + * Mingkai Hu <Mingkai.hu@freescale.com>
1906 + *
1907 + * This file is dual-licensed: you can use it either under the terms
1908 + * of the GPLv2 or the X11 license, at your option. Note that this dual
1909 + * licensing only applies to this file, and not this project as a
1910 + * whole.
1911 + *
1912 + * a) This library is free software; you can redistribute it and/or
1913 + * modify it under the terms of the GNU General Public License as
1914 + * published by the Free Software Foundation; either version 2 of the
1915 + * License, or (at your option) any later version.
1916 + *
1917 + * This library is distributed in the hope that it will be useful,
1918 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
1919 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1920 + * GNU General Public License for more details.
1921 + *
1922 + * Or, alternatively,
1923 + *
1924 + * b) Permission is hereby granted, free of charge, to any person
1925 + * obtaining a copy of this software and associated documentation
1926 + * files (the "Software"), to deal in the Software without
1927 + * restriction, including without limitation the rights to use,
1928 + * copy, modify, merge, publish, distribute, sublicense, and/or
1929 + * sell copies of the Software, and to permit persons to whom the
1930 + * Software is furnished to do so, subject to the following
1931 + * conditions:
1932 + *
1933 + * The above copyright notice and this permission notice shall be
1934 + * included in all copies or substantial portions of the Software.
1935 + *
1936 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
1937 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
1938 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
1939 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
1940 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
1941 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
1942 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
1943 + * OTHER DEALINGS IN THE SOFTWARE.
1944 + */
1945 +
1946 +#include "fsl-ls1043a-qds.dts"
1947 +#include "qoriq-qman-portals-sdk.dtsi"
1948 +#include "qoriq-bman-portals-sdk.dtsi"
1949 +
1950 +&bman_fbpr {
1951 + compatible = "fsl,bman-fbpr";
1952 + alloc-ranges = <0 0 0x10000 0>;
1953 +};
1954 +&qman_fqd {
1955 + compatible = "fsl,qman-fqd";
1956 + alloc-ranges = <0 0 0x10000 0>;
1957 +};
1958 +&qman_pfdr {
1959 + compatible = "fsl,qman-pfdr";
1960 + alloc-ranges = <0 0 0x10000 0>;
1961 +};
1962 +
1963 +&soc {
1964 +/delete-property/ dma-coherent;
1965 +
1966 +#include "qoriq-dpaa-eth.dtsi"
1967 +#include "qoriq-fman3-0-6oh.dtsi"
1968 +
1969 +pcie@3400000 {
1970 + /delete-property/ iommu-map;
1971 + dma-coherent;
1972 +};
1973 +
1974 +pcie@3500000 {
1975 + /delete-property/ iommu-map;
1976 + dma-coherent;
1977 +};
1978 +
1979 +pcie@3600000 {
1980 + /delete-property/ iommu-map;
1981 + dma-coherent;
1982 +};
1983 +
1984 +/delete-node/ iommu@9000000;
1985 +};
1986 +
1987 +&fman0 {
1988 + compatible = "fsl,fman", "simple-bus";
1989 + dma-coherent;
1990 +};
1991 +
1992 +&clockgen {
1993 + dma-coherent;
1994 +};
1995 +
1996 +&scfg {
1997 + dma-coherent;
1998 +};
1999 +
2000 +&crypto {
2001 + dma-coherent;
2002 +};
2003 +
2004 +&dcfg {
2005 + dma-coherent;
2006 +};
2007 +
2008 +&ifc {
2009 + dma-coherent;
2010 +};
2011 +
2012 +&qspi {
2013 + dma-coherent;
2014 +};
2015 +
2016 +&esdhc {
2017 + dma-coherent;
2018 +};
2019 +
2020 +&ddr {
2021 + dma-coherent;
2022 +};
2023 +
2024 +&tmu {
2025 + dma-coherent;
2026 +};
2027 +
2028 +&qman {
2029 + dma-coherent;
2030 +};
2031 +
2032 +&bman {
2033 + dma-coherent;
2034 +};
2035 +
2036 +&bportals {
2037 + dma-coherent;
2038 +};
2039 +
2040 +&qportals {
2041 + dma-coherent;
2042 +};
2043 +
2044 +&dspi0 {
2045 + dma-coherent;
2046 +};
2047 +
2048 +&dspi1 {
2049 + dma-coherent;
2050 +};
2051 +
2052 +&i2c0 {
2053 + dma-coherent;
2054 +};
2055 +
2056 +&i2c1 {
2057 + dma-coherent;
2058 +};
2059 +
2060 +&i2c2 {
2061 + dma-coherent;
2062 +};
2063 +
2064 +&i2c3 {
2065 + dma-coherent;
2066 +};
2067 +
2068 +&duart0 {
2069 + dma-coherent;
2070 +};
2071 +
2072 +&duart1 {
2073 + dma-coherent;
2074 +};
2075 +
2076 +&duart2 {
2077 + dma-coherent;
2078 +};
2079 +
2080 +&duart3 {
2081 + dma-coherent;
2082 +};
2083 +
2084 +&gpio1 {
2085 + dma-coherent;
2086 +};
2087 +
2088 +&gpio2 {
2089 + dma-coherent;
2090 +};
2091 +
2092 +&gpio3 {
2093 + dma-coherent;
2094 +};
2095 +
2096 +&gpio4 {
2097 + dma-coherent;
2098 +};
2099 +
2100 +&uqe {
2101 + dma-coherent;
2102 +};
2103 +
2104 +&lpuart0 {
2105 + dma-coherent;
2106 +};
2107 +
2108 +&lpuart1 {
2109 + dma-coherent;
2110 +};
2111 +
2112 +&lpuart2 {
2113 + dma-coherent;
2114 +};
2115 +
2116 +&lpuart3 {
2117 + dma-coherent;
2118 +};
2119 +
2120 +&lpuart4 {
2121 + dma-coherent;
2122 +};
2123 +
2124 +&lpuart5 {
2125 + dma-coherent;
2126 +};
2127 +
2128 +&ftm0 {
2129 + dma-coherent;
2130 +};
2131 +
2132 +&wdog0 {
2133 + dma-coherent;
2134 +};
2135 +
2136 +&edma0 {
2137 + dma-coherent;
2138 +};
2139 +
2140 +&qdma {
2141 + dma-coherent;
2142 +};
2143 +
2144 +&msi1 {
2145 + dma-coherent;
2146 +};
2147 +
2148 +&msi2 {
2149 + dma-coherent;
2150 +};
2151 +
2152 +&msi3 {
2153 + dma-coherent;
2154 +};
2155 +
2156 +&ptp_timer0 {
2157 + dma-coherent;
2158 +};
2159 +
2160 +&fsldpaa {
2161 + dma-coherent;
2162 +};
2163 --- a/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts
2164 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts
2165 @@ -1,47 +1,10 @@
2166 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2167 /*
2168 * Device Tree Include file for Freescale Layerscape-1043A family SoC.
2169 *
2170 * Copyright 2014-2015 Freescale Semiconductor, Inc.
2171 *
2172 * Mingkai Hu <Mingkai.hu@freescale.com>
2173 - *
2174 - * This file is dual-licensed: you can use it either under the terms
2175 - * of the GPLv2 or the X11 license, at your option. Note that this dual
2176 - * licensing only applies to this file, and not this project as a
2177 - * whole.
2178 - *
2179 - * a) This library is free software; you can redistribute it and/or
2180 - * modify it under the terms of the GNU General Public License as
2181 - * published by the Free Software Foundation; either version 2 of the
2182 - * License, or (at your option) any later version.
2183 - *
2184 - * This library is distributed in the hope that it will be useful,
2185 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
2186 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
2187 - * GNU General Public License for more details.
2188 - *
2189 - * Or, alternatively,
2190 - *
2191 - * b) Permission is hereby granted, free of charge, to any person
2192 - * obtaining a copy of this software and associated documentation
2193 - * files (the "Software"), to deal in the Software without
2194 - * restriction, including without limitation the rights to use,
2195 - * copy, modify, merge, publish, distribute, sublicense, and/or
2196 - * sell copies of the Software, and to permit persons to whom the
2197 - * Software is furnished to do so, subject to the following
2198 - * conditions:
2199 - *
2200 - * The above copyright notice and this permission notice shall be
2201 - * included in all copies or substantial portions of the Software.
2202 - *
2203 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
2204 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
2205 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
2206 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
2207 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
2208 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
2209 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
2210 - * OTHER DEALINGS IN THE SOFTWARE.
2211 */
2212
2213 /dts-v1/;
2214 @@ -60,6 +23,22 @@
2215 serial1 = &duart1;
2216 serial2 = &duart2;
2217 serial3 = &duart3;
2218 + sgmii_riser_s1_p1 = &sgmii_phy_s1_p1;
2219 + sgmii_riser_s2_p1 = &sgmii_phy_s2_p1;
2220 + sgmii_riser_s3_p1 = &sgmii_phy_s3_p1;
2221 + sgmii_riser_s4_p1 = &sgmii_phy_s4_p1;
2222 + qsgmii_s1_p1 = &qsgmii_phy_s1_p1;
2223 + qsgmii_s1_p2 = &qsgmii_phy_s1_p2;
2224 + qsgmii_s1_p3 = &qsgmii_phy_s1_p3;
2225 + qsgmii_s1_p4 = &qsgmii_phy_s1_p4;
2226 + qsgmii_s2_p1 = &qsgmii_phy_s2_p1;
2227 + qsgmii_s2_p2 = &qsgmii_phy_s2_p2;
2228 + qsgmii_s2_p3 = &qsgmii_phy_s2_p3;
2229 + qsgmii_s2_p4 = &qsgmii_phy_s2_p4;
2230 + emi1_slot1 = &ls1043mdio_s1;
2231 + emi1_slot2 = &ls1043mdio_s2;
2232 + emi1_slot3 = &ls1043mdio_s3;
2233 + emi1_slot4 = &ls1043mdio_s4;
2234 };
2235
2236 chosen {
2237 @@ -97,8 +76,11 @@
2238 };
2239
2240 fpga: board-control@2,0 {
2241 - compatible = "fsl,ls1043aqds-fpga", "fsl,fpga-qixis";
2242 + compatible = "fsl,ls1043aqds-fpga", "fsl,fpga-qixis", "simple-bus";
2243 reg = <0x2 0x0 0x0000100>;
2244 + #address-cells = <1>;
2245 + #size-cells = <1>;
2246 + ranges = <0 2 0 0x100>;
2247 };
2248 };
2249
2250 @@ -179,7 +161,153 @@
2251 #size-cells = <1>;
2252 spi-max-frequency = <20000000>;
2253 reg = <0>;
2254 + spi-rx-bus-width = <4>;
2255 + spi-tx-bus-width = <4>;
2256 };
2257 };
2258
2259 #include "fsl-ls1043-post.dtsi"
2260 +
2261 +&fman0 {
2262 + ethernet@e0000 {
2263 + phy-handle = <&qsgmii_phy_s2_p1>;
2264 + phy-connection-type = "sgmii";
2265 + };
2266 +
2267 + ethernet@e2000 {
2268 + phy-handle = <&qsgmii_phy_s2_p2>;
2269 + phy-connection-type = "sgmii";
2270 + };
2271 +
2272 + ethernet@e4000 {
2273 + phy-handle = <&rgmii_phy1>;
2274 + phy-connection-type = "rgmii";
2275 + };
2276 +
2277 + ethernet@e6000 {
2278 + phy-handle = <&rgmii_phy2>;
2279 + phy-connection-type = "rgmii";
2280 + };
2281 +
2282 + ethernet@e8000 {
2283 + phy-handle = <&qsgmii_phy_s2_p3>;
2284 + phy-connection-type = "sgmii";
2285 + };
2286 +
2287 + ethernet@ea000 {
2288 + phy-handle = <&qsgmii_phy_s2_p4>;
2289 + phy-connection-type = "sgmii";
2290 + };
2291 +
2292 + ethernet@f0000 { /* DTSEC9/10GEC1 */
2293 + fixed-link = <1 1 10000 0 0>;
2294 + phy-connection-type = "xgmii";
2295 + };
2296 +};
2297 +
2298 +&fpga {
2299 + mdio-mux-emi1 {
2300 + compatible = "mdio-mux-mmioreg", "mdio-mux";
2301 + mdio-parent-bus = <&mdio0>;
2302 + #address-cells = <1>;
2303 + #size-cells = <0>;
2304 + reg = <0x54 1>; /* BRDCFG4 */
2305 + mux-mask = <0xe0>; /* EMI1 */
2306 +
2307 + /* On-board RGMII1 PHY */
2308 + ls1043mdio0: mdio@0 {
2309 + reg = <0>;
2310 + #address-cells = <1>;
2311 + #size-cells = <0>;
2312 +
2313 + rgmii_phy1: ethernet-phy@1 { /* MAC3 */
2314 + reg = <0x1>;
2315 + };
2316 + };
2317 +
2318 + /* On-board RGMII2 PHY */
2319 + ls1043mdio1: mdio@1 {
2320 + reg = <0x20>;
2321 + #address-cells = <1>;
2322 + #size-cells = <0>;
2323 +
2324 + rgmii_phy2: ethernet-phy@2 { /* MAC4 */
2325 + reg = <0x2>;
2326 + };
2327 + };
2328 +
2329 + /* Slot 1 */
2330 + ls1043mdio_s1: mdio@2 {
2331 + reg = <0x40>;
2332 + #address-cells = <1>;
2333 + #size-cells = <0>;
2334 + status = "disabled";
2335 +
2336 + qsgmii_phy_s1_p1: ethernet-phy@4 {
2337 + reg = <0x4>;
2338 + };
2339 + qsgmii_phy_s1_p2: ethernet-phy@5 {
2340 + reg = <0x5>;
2341 + };
2342 + qsgmii_phy_s1_p3: ethernet-phy@6 {
2343 + reg = <0x6>;
2344 + };
2345 + qsgmii_phy_s1_p4: ethernet-phy@7 {
2346 + reg = <0x7>;
2347 + };
2348 +
2349 + sgmii_phy_s1_p1: ethernet-phy@1c {
2350 + reg = <0x1c>;
2351 + };
2352 + };
2353 +
2354 + /* Slot 2 */
2355 + ls1043mdio_s2: mdio@3 {
2356 + reg = <0x60>;
2357 + #address-cells = <1>;
2358 + #size-cells = <0>;
2359 + status = "disabled";
2360 +
2361 + qsgmii_phy_s2_p1: ethernet-phy@8 {
2362 + reg = <0x8>;
2363 + };
2364 + qsgmii_phy_s2_p2: ethernet-phy@9 {
2365 + reg = <0x9>;
2366 + };
2367 + qsgmii_phy_s2_p3: ethernet-phy@a {
2368 + reg = <0xa>;
2369 + };
2370 + qsgmii_phy_s2_p4: ethernet-phy@b {
2371 + reg = <0xb>;
2372 + };
2373 +
2374 + sgmii_phy_s2_p1: ethernet-phy@1c {
2375 + reg = <0x1c>;
2376 + };
2377 + };
2378 +
2379 + /* Slot 3 */
2380 + ls1043mdio_s3: mdio@4 {
2381 + reg = <0x80>;
2382 + #address-cells = <1>;
2383 + #size-cells = <0>;
2384 + status = "disabled";
2385 +
2386 + sgmii_phy_s3_p1: ethernet-phy@1c {
2387 + reg = <0x1c>;
2388 + };
2389 + };
2390 +
2391 + /* Slot 4 */
2392 + ls1043mdio_s4: mdio@5 {
2393 + reg = <0xa0>;
2394 + #address-cells = <1>;
2395 + #size-cells = <0>;
2396 + status = "disabled";
2397 +
2398 + sgmii_phy_s4_p1: ethernet-phy@1c {
2399 + reg = <0x1c>;
2400 + };
2401 + };
2402 + };
2403 +};
2404 --- /dev/null
2405 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb-sdk.dts
2406 @@ -0,0 +1,262 @@
2407 +/*
2408 + * Device Tree Include file for Freescale Layerscape-1043A family SoC.
2409 + *
2410 + * Copyright 2014-2015 Freescale Semiconductor, Inc.
2411 + *
2412 + * Mingkai Hu <Mingkai.hu@freescale.com>
2413 + *
2414 + * This file is dual-licensed: you can use it either under the terms
2415 + * of the GPLv2 or the X11 license, at your option. Note that this dual
2416 + * licensing only applies to this file, and not this project as a
2417 + * whole.
2418 + *
2419 + * a) This library is free software; you can redistribute it and/or
2420 + * modify it under the terms of the GNU General Public License as
2421 + * published by the Free Software Foundation; either version 2 of the
2422 + * License, or (at your option) any later version.
2423 + *
2424 + * This library is distributed in the hope that it will be useful,
2425 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
2426 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
2427 + * GNU General Public License for more details.
2428 + *
2429 + * Or, alternatively,
2430 + *
2431 + * b) Permission is hereby granted, free of charge, to any person
2432 + * obtaining a copy of this software and associated documentation
2433 + * files (the "Software"), to deal in the Software without
2434 + * restriction, including without limitation the rights to use,
2435 + * copy, modify, merge, publish, distribute, sublicense, and/or
2436 + * sell copies of the Software, and to permit persons to whom the
2437 + * Software is furnished to do so, subject to the following
2438 + * conditions:
2439 + *
2440 + * The above copyright notice and this permission notice shall be
2441 + * included in all copies or substantial portions of the Software.
2442 + *
2443 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
2444 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
2445 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
2446 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
2447 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
2448 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
2449 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
2450 + * OTHER DEALINGS IN THE SOFTWARE.
2451 + */
2452 +
2453 +#include "fsl-ls1043a-rdb.dts"
2454 +#include "qoriq-qman-portals-sdk.dtsi"
2455 +#include "qoriq-bman-portals-sdk.dtsi"
2456 +
2457 +&bman_fbpr {
2458 + compatible = "fsl,bman-fbpr";
2459 + alloc-ranges = <0 0 0x10000 0>;
2460 +};
2461 +&qman_fqd {
2462 + compatible = "fsl,qman-fqd";
2463 + alloc-ranges = <0 0 0x10000 0>;
2464 +};
2465 +&qman_pfdr {
2466 + compatible = "fsl,qman-pfdr";
2467 + alloc-ranges = <0 0 0x10000 0>;
2468 +};
2469 +
2470 +&soc {
2471 +/delete-property/ dma-coherent;
2472 +
2473 +#include "qoriq-dpaa-eth.dtsi"
2474 +#include "qoriq-fman3-0-6oh.dtsi"
2475 +
2476 +pcie@3400000 {
2477 + /delete-property/ iommu-map;
2478 + dma-coherent;
2479 +};
2480 +
2481 +pcie@3500000 {
2482 + /delete-property/ iommu-map;
2483 + dma-coherent;
2484 +};
2485 +
2486 +pcie@3600000 {
2487 + /delete-property/ iommu-map;
2488 + dma-coherent;
2489 +};
2490 +
2491 +/delete-node/ iommu@9000000;
2492 +};
2493 +
2494 +&fman0 {
2495 + compatible = "fsl,fman", "simple-bus";
2496 +};
2497 +
2498 +&clockgen {
2499 + dma-coherent;
2500 +};
2501 +
2502 +&scfg {
2503 + dma-coherent;
2504 +};
2505 +
2506 +&crypto {
2507 + dma-coherent;
2508 +};
2509 +
2510 +&dcfg {
2511 + dma-coherent;
2512 +};
2513 +
2514 +&ifc {
2515 + dma-coherent;
2516 +};
2517 +
2518 +&qspi {
2519 + dma-coherent;
2520 +};
2521 +
2522 +&esdhc {
2523 + dma-coherent;
2524 +};
2525 +
2526 +&ddr {
2527 + dma-coherent;
2528 +};
2529 +
2530 +&tmu {
2531 + dma-coherent;
2532 +};
2533 +
2534 +&qman {
2535 + dma-coherent;
2536 +};
2537 +
2538 +&bman {
2539 + dma-coherent;
2540 +};
2541 +
2542 +&bportals {
2543 + dma-coherent;
2544 +};
2545 +
2546 +&qportals {
2547 + dma-coherent;
2548 +};
2549 +
2550 +&dspi0 {
2551 + dma-coherent;
2552 +};
2553 +
2554 +&dspi1 {
2555 + dma-coherent;
2556 +};
2557 +
2558 +&i2c0 {
2559 + dma-coherent;
2560 +};
2561 +
2562 +&i2c1 {
2563 + dma-coherent;
2564 +};
2565 +
2566 +&i2c2 {
2567 + dma-coherent;
2568 +};
2569 +
2570 +&i2c3 {
2571 + dma-coherent;
2572 +};
2573 +
2574 +&duart0 {
2575 + dma-coherent;
2576 +};
2577 +
2578 +&duart1 {
2579 + dma-coherent;
2580 +};
2581 +
2582 +&duart2 {
2583 + dma-coherent;
2584 +};
2585 +
2586 +&duart3 {
2587 + dma-coherent;
2588 +};
2589 +
2590 +&gpio1 {
2591 + dma-coherent;
2592 +};
2593 +
2594 +&gpio2 {
2595 + dma-coherent;
2596 +};
2597 +
2598 +&gpio3 {
2599 + dma-coherent;
2600 +};
2601 +
2602 +&gpio4 {
2603 + dma-coherent;
2604 +};
2605 +
2606 +&lpuart0 {
2607 + dma-coherent;
2608 +};
2609 +
2610 +&lpuart1 {
2611 + dma-coherent;
2612 +};
2613 +
2614 +&lpuart2 {
2615 + dma-coherent;
2616 +};
2617 +
2618 +&lpuart3 {
2619 + dma-coherent;
2620 +};
2621 +
2622 +&lpuart4 {
2623 + dma-coherent;
2624 +};
2625 +
2626 +&lpuart5 {
2627 + dma-coherent;
2628 +};
2629 +
2630 +&ftm0 {
2631 + dma-coherent;
2632 +};
2633 +
2634 +&wdog0 {
2635 + dma-coherent;
2636 +};
2637 +
2638 +&edma0 {
2639 + dma-coherent;
2640 +};
2641 +
2642 +&qdma {
2643 + dma-coherent;
2644 +};
2645 +
2646 +&msi1 {
2647 + dma-coherent;
2648 +};
2649 +
2650 +&msi2 {
2651 + dma-coherent;
2652 +};
2653 +
2654 +&msi3 {
2655 + dma-coherent;
2656 +};
2657 +
2658 +&fman0 {
2659 + dma-coherent;
2660 +};
2661 +
2662 +&ptp_timer0 {
2663 + dma-coherent;
2664 +};
2665 +
2666 +&fsldpaa {
2667 + dma-coherent;
2668 +};
2669 --- /dev/null
2670 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb-usdpaa.dts
2671 @@ -0,0 +1,140 @@
2672 +/*
2673 + * Device Tree Include file for Freescale Layerscape-1043A family SoC.
2674 + *
2675 + * Copyright (C) 2014-2015, Freescale Semiconductor
2676 + *
2677 + * This file is licensed under the terms of the GNU General Public
2678 + * License version 2. This program is licensed "as is" without any
2679 + * warranty of any kind, whether express or implied.
2680 + */
2681 +
2682 +#include "fsl-ls1043a-rdb-sdk.dts"
2683 +
2684 +&soc {
2685 + bp7: buffer-pool@7 {
2686 + compatible = "fsl,p4080-bpool", "fsl,bpool";
2687 + fsl,bpid = <7>;
2688 + fsl,bpool-ethernet-cfg = <0 0 0 192 0 0xdeadbeef>;
2689 + fsl,bpool-thresholds = <0x400 0xc00 0x0 0x0>;
2690 + dma-coherent;
2691 + };
2692 +
2693 + bp8: buffer-pool@8 {
2694 + compatible = "fsl,p4080-bpool", "fsl,bpool";
2695 + fsl,bpid = <8>;
2696 + fsl,bpool-ethernet-cfg = <0 0 0 576 0 0xabbaf00d>;
2697 + fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>;
2698 + dma-coherent;
2699 + };
2700 +
2701 + bp9: buffer-pool@9 {
2702 + compatible = "fsl,p4080-bpool", "fsl,bpool";
2703 + fsl,bpid = <9>;
2704 + fsl,bpool-ethernet-cfg = <0 0 0 2048 0 0xfeedabba>;
2705 + fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>;
2706 + dma-coherent;
2707 + };
2708 +
2709 + fsl,dpaa {
2710 + compatible = "fsl,ls1043a", "fsl,dpaa", "simple-bus";
2711 + dma-coherent;
2712 +
2713 + ethernet@0 {
2714 + compatible = "fsl,dpa-ethernet-init";
2715 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
2716 + fsl,qman-frame-queues-rx = <0x50 1 0x51 1>;
2717 + fsl,qman-frame-queues-tx = <0x70 1 0x71 1>;
2718 + };
2719 +
2720 + ethernet@1 {
2721 + compatible = "fsl,dpa-ethernet-init";
2722 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
2723 + fsl,qman-frame-queues-rx = <0x52 1 0x53 1>;
2724 + fsl,qman-frame-queues-tx = <0x72 1 0x73 1>;
2725 + };
2726 +
2727 + ethernet@2 {
2728 + compatible = "fsl,dpa-ethernet-init";
2729 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
2730 + fsl,qman-frame-queues-rx = <0x54 1 0x55 1>;
2731 + fsl,qman-frame-queues-tx = <0x74 1 0x75 1>;
2732 + };
2733 +
2734 + ethernet@3 {
2735 + compatible = "fsl,dpa-ethernet-init";
2736 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
2737 + fsl,qman-frame-queues-rx = <0x56 1 0x57 1>;
2738 + fsl,qman-frame-queues-tx = <0x76 1 0x77 1>;
2739 + };
2740 +
2741 + ethernet@4 {
2742 + compatible = "fsl,dpa-ethernet-init";
2743 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
2744 + fsl,qman-frame-queues-rx = <0x58 1 0x59 1>;
2745 + fsl,qman-frame-queues-tx = <0x78 1 0x79 1>;
2746 + };
2747 +
2748 + ethernet@5 {
2749 + compatible = "fsl,dpa-ethernet-init";
2750 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
2751 + fsl,qman-frame-queues-rx = <0x60 1 0x61 1>;
2752 + fsl,qman-frame-queues-tx = <0x80 1 0x81 1>;
2753 + };
2754 +
2755 + ethernet@8 {
2756 + compatible = "fsl,dpa-ethernet-init";
2757 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
2758 + fsl,qman-frame-queues-rx = <0x5c 1 0x5d 1>;
2759 + fsl,qman-frame-queues-tx = <0x7c 1 0x7d 1>;
2760 +
2761 + };
2762 + dpa-fman0-oh@2 {
2763 + compatible = "fsl,dpa-oh";
2764 + /* Define frame queues for the OH port*/
2765 + /* <OH Rx error, OH Rx default> */
2766 + fsl,qman-frame-queues-oh = <0x5a 1 0x5b 1>;
2767 + fsl,fman-oh-port = <&fman0_oh2>;
2768 + };
2769 + };
2770 +
2771 + pcie@3400000 {
2772 + /delete-property/ iommu-map;
2773 + };
2774 +
2775 + pcie@3500000 {
2776 + /delete-property/ iommu-map;
2777 + };
2778 +
2779 + pcie@3600000 {
2780 + /delete-property/ iommu-map;
2781 + };
2782 +
2783 + /delete-node/ iommu@9000000;
2784 +};
2785 +/ {
2786 + reserved-memory {
2787 + #address-cells = <2>;
2788 + #size-cells = <2>;
2789 + ranges;
2790 +
2791 + /* For legacy usdpaa based use-cases, update the size and
2792 + alignment parameters. e.g. to allocate 256 MB memory:
2793 + size = <0 0x10000000>;
2794 + alignment = <0 0x10000000>;
2795 + */
2796 + usdpaa_mem: usdpaa_mem {
2797 + compatible = "fsl,usdpaa-mem";
2798 + alloc-ranges = <0 0 0x10000 0>;
2799 + size = <0 0x1000>;
2800 + alignment = <0 0x1000>;
2801 + };
2802 + };
2803 +};
2804 +
2805 +&fman0 {
2806 + fman0_oh2: port@83000 {
2807 + cell-index = <1>;
2808 + compatible = "fsl,fman-port-oh";
2809 + reg = <0x83000 0x1000>;
2810 + };
2811 +};
2812 --- a/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
2813 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
2814 @@ -1,47 +1,10 @@
2815 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2816 /*
2817 * Device Tree Include file for Freescale Layerscape-1043A family SoC.
2818 *
2819 * Copyright 2014-2015 Freescale Semiconductor, Inc.
2820 *
2821 * Mingkai Hu <Mingkai.hu@freescale.com>
2822 - *
2823 - * This file is dual-licensed: you can use it either under the terms
2824 - * of the GPLv2 or the X11 license, at your option. Note that this dual
2825 - * licensing only applies to this file, and not this project as a
2826 - * whole.
2827 - *
2828 - * a) This library is free software; you can redistribute it and/or
2829 - * modify it under the terms of the GNU General Public License as
2830 - * published by the Free Software Foundation; either version 2 of the
2831 - * License, or (at your option) any later version.
2832 - *
2833 - * This library is distributed in the hope that it will be useful,
2834 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
2835 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
2836 - * GNU General Public License for more details.
2837 - *
2838 - * Or, alternatively,
2839 - *
2840 - * b) Permission is hereby granted, free of charge, to any person
2841 - * obtaining a copy of this software and associated documentation
2842 - * files (the "Software"), to deal in the Software without
2843 - * restriction, including without limitation the rights to use,
2844 - * copy, modify, merge, publish, distribute, sublicense, and/or
2845 - * sell copies of the Software, and to permit persons to whom the
2846 - * Software is furnished to do so, subject to the following
2847 - * conditions:
2848 - *
2849 - * The above copyright notice and this permission notice shall be
2850 - * included in all copies or substantial portions of the Software.
2851 - *
2852 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
2853 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
2854 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
2855 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
2856 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
2857 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
2858 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
2859 - * OTHER DEALINGS IN THE SOFTWARE.
2860 */
2861
2862 /dts-v1/;
2863 @@ -51,7 +14,6 @@
2864 model = "LS1043A RDB Board";
2865
2866 aliases {
2867 - crypto = &crypto;
2868 serial0 = &duart0;
2869 serial1 = &duart1;
2870 serial2 = &duart2;
2871 @@ -86,6 +48,10 @@
2872 compatible = "pericom,pt7c4338";
2873 reg = <0x68>;
2874 };
2875 + rtc@51 {
2876 + compatible = "nxp,pcf85263";
2877 + reg = <0x51>;
2878 + };
2879 };
2880
2881 &ifc {
2882 @@ -130,6 +96,38 @@
2883 reg = <0>;
2884 spi-max-frequency = <1000000>; /* input clock */
2885 };
2886 +
2887 + slic@2 {
2888 + compatible = "maxim,ds26522";
2889 + reg = <2>;
2890 + spi-max-frequency = <2000000>;
2891 + fsl,spi-cs-sck-delay = <100>;
2892 + fsl,spi-sck-cs-delay = <50>;
2893 + };
2894 +
2895 + slic@3 {
2896 + compatible = "maxim,ds26522";
2897 + reg = <3>;
2898 + spi-max-frequency = <2000000>;
2899 + fsl,spi-cs-sck-delay = <100>;
2900 + fsl,spi-sck-cs-delay = <50>;
2901 + };
2902 +};
2903 +
2904 +&uqe {
2905 + ucc_hdlc: ucc@2000 {
2906 + compatible = "fsl,ucc-hdlc";
2907 + rx-clock-name = "clk8";
2908 + tx-clock-name = "clk9";
2909 + fsl,rx-sync-clock = "rsync_pin";
2910 + fsl,tx-sync-clock = "tsync_pin";
2911 + fsl,tx-timeslot-mask = <0xfffffffe>;
2912 + fsl,rx-timeslot-mask = <0xfffffffe>;
2913 + fsl,tdm-framer-type = "e1";
2914 + fsl,tdm-id = <0>;
2915 + fsl,siram-entry-id = <0>;
2916 + fsl,tdm-interface;
2917 + };
2918 };
2919
2920 &duart0 {
2921 --- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
2922 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
2923 @@ -1,47 +1,10 @@
2924 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2925 /*
2926 * Device Tree Include file for Freescale Layerscape-1043A family SoC.
2927 *
2928 * Copyright 2014-2015 Freescale Semiconductor, Inc.
2929 *
2930 * Mingkai Hu <Mingkai.hu@freescale.com>
2931 - *
2932 - * This file is dual-licensed: you can use it either under the terms
2933 - * of the GPLv2 or the X11 license, at your option. Note that this dual
2934 - * licensing only applies to this file, and not this project as a
2935 - * whole.
2936 - *
2937 - * a) This library is free software; you can redistribute it and/or
2938 - * modify it under the terms of the GNU General Public License as
2939 - * published by the Free Software Foundation; either version 2 of the
2940 - * License, or (at your option) any later version.
2941 - *
2942 - * This library is distributed in the hope that it will be useful,
2943 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
2944 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
2945 - * GNU General Public License for more details.
2946 - *
2947 - * Or, alternatively,
2948 - *
2949 - * b) Permission is hereby granted, free of charge, to any person
2950 - * obtaining a copy of this software and associated documentation
2951 - * files (the "Software"), to deal in the Software without
2952 - * restriction, including without limitation the rights to use,
2953 - * copy, modify, merge, publish, distribute, sublicense, and/or
2954 - * sell copies of the Software, and to permit persons to whom the
2955 - * Software is furnished to do so, subject to the following
2956 - * conditions:
2957 - *
2958 - * The above copyright notice and this permission notice shall be
2959 - * included in all copies or substantial portions of the Software.
2960 - *
2961 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
2962 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
2963 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
2964 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
2965 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
2966 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
2967 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
2968 - * OTHER DEALINGS IN THE SOFTWARE.
2969 */
2970
2971 #include <dt-bindings/thermal/thermal.h>
2972 @@ -54,6 +17,7 @@
2973 #size-cells = <2>;
2974
2975 aliases {
2976 + crypto = &crypto;
2977 fman0 = &fman0;
2978 ethernet0 = &enet0;
2979 ethernet1 = &enet1;
2980 @@ -74,13 +38,14 @@
2981 *
2982 * Currently supported enable-method is psci v0.2
2983 */
2984 - cpu0: cpu@0 {
2985 + cooling_map0: cpu0: cpu@0 {
2986 device_type = "cpu";
2987 compatible = "arm,cortex-a53";
2988 reg = <0x0>;
2989 clocks = <&clockgen 1 0>;
2990 next-level-cache = <&l2>;
2991 #cooling-cells = <2>;
2992 + cpu-idle-states = <&CPU_PH20>;
2993 };
2994
2995 cpu1: cpu@1 {
2996 @@ -89,6 +54,7 @@
2997 reg = <0x1>;
2998 clocks = <&clockgen 1 0>;
2999 next-level-cache = <&l2>;
3000 + cpu-idle-states = <&CPU_PH20>;
3001 };
3002
3003 cpu2: cpu@2 {
3004 @@ -97,6 +63,7 @@
3005 reg = <0x2>;
3006 clocks = <&clockgen 1 0>;
3007 next-level-cache = <&l2>;
3008 + cpu-idle-states = <&CPU_PH20>;
3009 };
3010
3011 cpu3: cpu@3 {
3012 @@ -105,6 +72,7 @@
3013 reg = <0x3>;
3014 clocks = <&clockgen 1 0>;
3015 next-level-cache = <&l2>;
3016 + cpu-idle-states = <&CPU_PH20>;
3017 };
3018
3019 l2: l2-cache {
3020 @@ -112,6 +80,23 @@
3021 };
3022 };
3023
3024 + idle-states {
3025 + /*
3026 + * PSCI node is not added default, U-boot will add missing
3027 + * parts if it determines to use PSCI.
3028 + */
3029 + entry-method = "arm,psci";
3030 +
3031 + CPU_PH20: cpu-ph20 {
3032 + compatible = "arm,idle-state";
3033 + idle-state-name = "PH20";
3034 + arm,psci-suspend-param = <0x0>;
3035 + entry-latency-us = <1000>;
3036 + exit-latency-us = <1000>;
3037 + min-residency-us = <3000>;
3038 + };
3039 + };
3040 +
3041 memory@80000000 {
3042 device_type = "memory";
3043 reg = <0x0 0x80000000 0 0x80000000>;
3044 @@ -196,6 +181,8 @@
3045 #address-cells = <2>;
3046 #size-cells = <2>;
3047 ranges;
3048 + dma-ranges = <0x0 0x0 0x0 0x0 0x10000 0x00000000>;
3049 + dma-coherent;
3050
3051 clockgen: clocking@1ee1000 {
3052 compatible = "fsl,ls1043a-clockgen";
3053 @@ -204,6 +191,49 @@
3054 clocks = <&sysclk>;
3055 };
3056
3057 + smmu: iommu@9000000 {
3058 + compatible = "arm,mmu-500";
3059 + reg = <0 0x9000000 0 0x400000>;
3060 + dma-coherent;
3061 + stream-match-mask = <0x7f00>;
3062 + #global-interrupts = <2>;
3063 + #iommu-cells = <1>;
3064 + interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3065 + <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>,
3066 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3067 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3068 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3069 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3070 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3071 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3072 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3073 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3074 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3075 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3076 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3077 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3078 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3079 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3080 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3081 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3082 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3083 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3084 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3085 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3086 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3087 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3088 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3089 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3090 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3091 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3092 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3093 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3094 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3095 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3096 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3097 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>;
3098 + };
3099 +
3100 scfg: scfg@1570000 {
3101 compatible = "fsl,ls1043a-scfg", "syscon";
3102 reg = <0x0 0x1570000 0x0 0x10000>;
3103 @@ -256,7 +286,7 @@
3104
3105 dcfg: dcfg@1ee0000 {
3106 compatible = "fsl,ls1043a-dcfg", "syscon";
3107 - reg = <0x0 0x1ee0000 0x0 0x10000>;
3108 + reg = <0x0 0x1ee0000 0x0 0x1000>;
3109 big-endian;
3110 };
3111
3112 @@ -343,36 +373,7 @@
3113 #thermal-sensor-cells = <1>;
3114 };
3115
3116 - thermal-zones {
3117 - cpu_thermal: cpu-thermal {
3118 - polling-delay-passive = <1000>;
3119 - polling-delay = <5000>;
3120 -
3121 - thermal-sensors = <&tmu 3>;
3122 -
3123 - trips {
3124 - cpu_alert: cpu-alert {
3125 - temperature = <85000>;
3126 - hysteresis = <2000>;
3127 - type = "passive";
3128 - };
3129 - cpu_crit: cpu-crit {
3130 - temperature = <95000>;
3131 - hysteresis = <2000>;
3132 - type = "critical";
3133 - };
3134 - };
3135 -
3136 - cooling-maps {
3137 - map0 {
3138 - trip = <&cpu_alert>;
3139 - cooling-device =
3140 - <&cpu0 THERMAL_NO_LIMIT
3141 - THERMAL_NO_LIMIT>;
3142 - };
3143 - };
3144 - };
3145 - };
3146 + #include "fsl-tmu.dtsi"
3147
3148 qman: qman@1880000 {
3149 compatible = "fsl,qman";
3150 @@ -423,7 +424,7 @@
3151 };
3152
3153 i2c0: i2c@2180000 {
3154 - compatible = "fsl,vf610-i2c";
3155 + compatible = "fsl,vf610-i2c", "fsl,ls1043a-vf610-i2c";
3156 #address-cells = <1>;
3157 #size-cells = <0>;
3158 reg = <0x0 0x2180000 0x0 0x10000>;
3159 @@ -433,6 +434,7 @@
3160 dmas = <&edma0 1 39>,
3161 <&edma0 1 38>;
3162 dma-names = "tx", "rx";
3163 + scl-gpios = <&gpio4 12 0>;
3164 status = "disabled";
3165 };
3166
3167 @@ -537,6 +539,72 @@
3168 #interrupt-cells = <2>;
3169 };
3170
3171 + uqe: uqe@2400000 {
3172 + #address-cells = <1>;
3173 + #size-cells = <1>;
3174 + device_type = "qe";
3175 + compatible = "fsl,qe", "simple-bus";
3176 + ranges = <0x0 0x0 0x2400000 0x40000>;
3177 + reg = <0x0 0x2400000 0x0 0x480>;
3178 + brg-frequency = <100000000>;
3179 + bus-frequency = <200000000>;
3180 +
3181 + fsl,qe-num-riscs = <1>;
3182 + fsl,qe-num-snums = <28>;
3183 +
3184 + qeic: qeic@80 {
3185 + compatible = "fsl,qe-ic";
3186 + reg = <0x80 0x80>;
3187 + #address-cells = <0>;
3188 + interrupt-controller;
3189 + #interrupt-cells = <1>;
3190 + interrupts = <0 77 0x04 0 77 0x04>;
3191 + };
3192 +
3193 + si1: si@700 {
3194 + #address-cells = <1>;
3195 + #size-cells = <0>;
3196 + compatible = "fsl,ls1043-qe-si",
3197 + "fsl,t1040-qe-si";
3198 + reg = <0x700 0x80>;
3199 + };
3200 +
3201 + siram1: siram@1000 {
3202 + #address-cells = <1>;
3203 + #size-cells = <1>;
3204 + compatible = "fsl,ls1043-qe-siram",
3205 + "fsl,t1040-qe-siram";
3206 + reg = <0x1000 0x800>;
3207 + };
3208 +
3209 + ucc@2000 {
3210 + cell-index = <1>;
3211 + reg = <0x2000 0x200>;
3212 + interrupts = <32>;
3213 + interrupt-parent = <&qeic>;
3214 + };
3215 +
3216 + ucc@2200 {
3217 + cell-index = <3>;
3218 + reg = <0x2200 0x200>;
3219 + interrupts = <34>;
3220 + interrupt-parent = <&qeic>;
3221 + };
3222 +
3223 + muram@10000 {
3224 + #address-cells = <1>;
3225 + #size-cells = <1>;
3226 + compatible = "fsl,qe-muram", "fsl,cpm-muram";
3227 + ranges = <0x0 0x10000 0x6000>;
3228 +
3229 + data-only@0 {
3230 + compatible = "fsl,qe-muram-data",
3231 + "fsl,cpm-muram-data";
3232 + reg = <0x0 0x6000>;
3233 + };
3234 + };
3235 + };
3236 +
3237 lpuart0: serial@2950000 {
3238 compatible = "fsl,ls1021a-lpuart";
3239 reg = <0x0 0x2950000 0x0 0x1000>;
3240 @@ -591,6 +659,16 @@
3241 status = "disabled";
3242 };
3243
3244 + ftm0: ftm0@29d0000 {
3245 + compatible = "fsl,ls1043a-ftm-alarm";
3246 + reg = <0x0 0x29d0000 0x0 0x10000>,
3247 + <0x0 0x1ee2140 0x0 0x4>;
3248 + reg-names = "ftm", "pmctrl";
3249 + interrupts = <0 86 0x4>;
3250 + big-endian;
3251 + status = "okay";
3252 + };
3253 +
3254 wdog0: wdog@2ad0000 {
3255 compatible = "fsl,ls1043a-wdt", "fsl,imx21-wdt";
3256 reg = <0x0 0x2ad0000 0x0 0x10000>;
3257 @@ -616,41 +694,81 @@
3258 <&clockgen 4 0>;
3259 };
3260
3261 - usb0: usb3@2f00000 {
3262 - compatible = "snps,dwc3";
3263 - reg = <0x0 0x2f00000 0x0 0x10000>;
3264 - interrupts = <0 60 0x4>;
3265 - dr_mode = "host";
3266 - snps,quirk-frame-length-adjustment = <0x20>;
3267 - snps,dis_rxdet_inp3_quirk;
3268 - };
3269 -
3270 - usb1: usb3@3000000 {
3271 - compatible = "snps,dwc3";
3272 - reg = <0x0 0x3000000 0x0 0x10000>;
3273 - interrupts = <0 61 0x4>;
3274 - dr_mode = "host";
3275 - snps,quirk-frame-length-adjustment = <0x20>;
3276 - snps,dis_rxdet_inp3_quirk;
3277 - };
3278 -
3279 - usb2: usb3@3100000 {
3280 - compatible = "snps,dwc3";
3281 - reg = <0x0 0x3100000 0x0 0x10000>;
3282 - interrupts = <0 63 0x4>;
3283 - dr_mode = "host";
3284 - snps,quirk-frame-length-adjustment = <0x20>;
3285 - snps,dis_rxdet_inp3_quirk;
3286 - };
3287 -
3288 - sata: sata@3200000 {
3289 - compatible = "fsl,ls1043a-ahci";
3290 - reg = <0x0 0x3200000 0x0 0x10000>,
3291 - <0x0 0x20140520 0x0 0x4>;
3292 - reg-names = "ahci", "sata-ecc";
3293 - interrupts = <0 69 0x4>;
3294 - clocks = <&clockgen 4 0>;
3295 - dma-coherent;
3296 + aux_bus: aux_bus {
3297 + #address-cells = <2>;
3298 + #size-cells = <2>;
3299 + compatible = "simple-bus";
3300 + ranges;
3301 + dma-ranges = <0x0 0x0 0x0 0x0 0x100 0x00000000>;
3302 +
3303 + usb0: usb3@2f00000 {
3304 + compatible = "snps,dwc3";
3305 + reg = <0x0 0x2f00000 0x0 0x10000>;
3306 + interrupts = <0 60 0x4>;
3307 + dr_mode = "host";
3308 + snps,quirk-frame-length-adjustment = <0x20>;
3309 + snps,dis_rxdet_inp3_quirk;
3310 + usb3-lpm-capable;
3311 + snps,dis-u1u2-when-u3-quirk;
3312 + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
3313 + snps,host-vbus-glitches;
3314 + };
3315 +
3316 + usb1: usb3@3000000 {
3317 + compatible = "snps,dwc3";
3318 + reg = <0x0 0x3000000 0x0 0x10000>;
3319 + interrupts = <0 61 0x4>;
3320 + dr_mode = "host";
3321 + snps,quirk-frame-length-adjustment = <0x20>;
3322 + snps,dis_rxdet_inp3_quirk;
3323 + usb3-lpm-capable;
3324 + snps,dis-u1u2-when-u3-quirk;
3325 + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
3326 + snps,host-vbus-glitches;
3327 + };
3328 +
3329 + usb2: usb3@3100000 {
3330 + compatible = "snps,dwc3";
3331 + reg = <0x0 0x3100000 0x0 0x10000>;
3332 + interrupts = <0 63 0x4>;
3333 + dr_mode = "host";
3334 + snps,quirk-frame-length-adjustment = <0x20>;
3335 + snps,dis_rxdet_inp3_quirk;
3336 + usb3-lpm-capable;
3337 + snps,dis-u1u2-when-u3-quirk;
3338 + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
3339 + snps,host-vbus-glitches;
3340 + };
3341 +
3342 + sata: sata@3200000 {
3343 + compatible = "fsl,ls1043a-ahci";
3344 + reg = <0x0 0x3200000 0x0 0x10000>,
3345 + <0x0 0x20140520 0x0 0x4>;
3346 + reg-names = "ahci", "sata-ecc";
3347 + interrupts = <0 69 0x4>;
3348 + clocks = <&clockgen 4 0>;
3349 + };
3350 + };
3351 +
3352 + qdma: qdma@8380000 {
3353 + compatible = "fsl,ls1021a-qdma", "fsl,ls1043a-qdma";
3354 + reg = <0x0 0x8380000 0x0 0x1000>, /* Controller regs */
3355 + <0x0 0x8390000 0x0 0x10000>, /* Status regs */
3356 + <0x0 0x83a0000 0x0 0x40000>; /* Block regs */
3357 + interrupts = <0 152 0x4>,
3358 + <0 39 0x4>,
3359 + <0 40 0x4>,
3360 + <0 41 0x4>,
3361 + <0 42 0x4>;
3362 + interrupt-names = "qdma-error", "qdma-queue0",
3363 + "qdma-queue1", "qdma-queue2", "qdma-queue3";
3364 + channels = <8>;
3365 + block-number = <1>;
3366 + block-offset = <0x10000>;
3367 + queues = <2>;
3368 + status-sizes = <64>;
3369 + queue-sizes = <64 64>;
3370 + big-endian;
3371 };
3372
3373 msi1: msi-controller1@1571000 {
3374 @@ -679,13 +797,13 @@
3375 reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */
3376 0x40 0x00000000 0x0 0x00002000>; /* configuration space */
3377 reg-names = "regs", "config";
3378 - interrupts = <0 118 0x4>, /* controller interrupt */
3379 - <0 117 0x4>; /* PME interrupt */
3380 - interrupt-names = "intr", "pme";
3381 + interrupts = <0 117 0x4>, /* PME interrupt */
3382 + <0 118 0x4>; /* aer interrupt */
3383 + interrupt-names = "pme", "aer";
3384 #address-cells = <3>;
3385 #size-cells = <2>;
3386 device_type = "pci";
3387 - dma-coherent;
3388 + iommu-map = <0 &smmu 0 1>;
3389 num-lanes = <4>;
3390 bus-range = <0x0 0xff>;
3391 ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */
3392 @@ -697,6 +815,7 @@
3393 <0000 0 0 2 &gic 0 111 0x4>,
3394 <0000 0 0 3 &gic 0 112 0x4>,
3395 <0000 0 0 4 &gic 0 113 0x4>;
3396 + status = "disabled";
3397 };
3398
3399 pcie@3500000 {
3400 @@ -704,13 +823,13 @@
3401 reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */
3402 0x48 0x00000000 0x0 0x00002000>; /* configuration space */
3403 reg-names = "regs", "config";
3404 - interrupts = <0 128 0x4>,
3405 - <0 127 0x4>;
3406 - interrupt-names = "intr", "pme";
3407 + interrupts = <0 127 0x4>,
3408 + <0 128 0x4>;
3409 + interrupt-names = "pme", "aer";
3410 #address-cells = <3>;
3411 #size-cells = <2>;
3412 device_type = "pci";
3413 - dma-coherent;
3414 + iommu-map = <0 &smmu 0 1>;
3415 num-lanes = <2>;
3416 bus-range = <0x0 0xff>;
3417 ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000 /* downstream I/O */
3418 @@ -722,6 +841,7 @@
3419 <0000 0 0 2 &gic 0 121 0x4>,
3420 <0000 0 0 3 &gic 0 122 0x4>,
3421 <0000 0 0 4 &gic 0 123 0x4>;
3422 + status = "disabled";
3423 };
3424
3425 pcie@3600000 {
3426 @@ -729,13 +849,13 @@
3427 reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */
3428 0x50 0x00000000 0x0 0x00002000>; /* configuration space */
3429 reg-names = "regs", "config";
3430 - interrupts = <0 162 0x4>,
3431 - <0 161 0x4>;
3432 - interrupt-names = "intr", "pme";
3433 + interrupts = <0 161 0x4>,
3434 + <0 162 0x4>;
3435 + interrupt-names = "pme", "aer";
3436 #address-cells = <3>;
3437 #size-cells = <2>;
3438 device_type = "pci";
3439 - dma-coherent;
3440 + iommu-map = <0 &smmu 0 1>;
3441 num-lanes = <2>;
3442 bus-range = <0x0 0xff>;
3443 ranges = <0x81000000 0x0 0x00000000 0x50 0x00010000 0x0 0x00010000 /* downstream I/O */
3444 @@ -747,6 +867,14 @@
3445 <0000 0 0 2 &gic 0 155 0x4>,
3446 <0000 0 0 3 &gic 0 156 0x4>,
3447 <0000 0 0 4 &gic 0 157 0x4>;
3448 + status = "disabled";
3449 + };
3450 + };
3451 +
3452 + firmware {
3453 + optee {
3454 + compatible = "linaro,optee-tz";
3455 + method = "smc";
3456 };
3457 };
3458
3459 @@ -754,3 +882,29 @@
3460
3461 #include "qoriq-qman-portals.dtsi"