target/linux/layerscape/patches-4.4/1108-mtd-fsl-quadspi-add-multi-flash-chip-R-W-on-ls2080a.patch

   1 From d3a8ee41170ff9e5298ff354c77ff99439dfe2bf Mon Sep 17 00:00:00 2001
   2 From: Yunhui Cui <yunhui.cui@nxp.com>
   3 Date: Thu, 10 Mar 2016 11:33:40 +0800
   4 Subject: [PATCH 108/113] mtd: fsl-quadspi: add multi flash chip R/W on
   5  ls2080a
   6
   7 There is a hardware feature that qspi_amba_base is added
   8 internally by SOC design on ls2080a. so memmap_phy need not
   9 be added in driver. If memmap_phy is added, the flash A1
  10 addr space is [0, memmap_phy] which far more than flash size.
  11 The AMBA memory will be divided into four parts and assign to
  12 every chipselect. Every channel will has two valid chipselects.
  13
  14 Signed-off-by: Yunhui Cui <yunhui.cui@nxp.com>
  15 ---
  16  drivers/mtd/spi-nor/fsl-quadspi.c |   14 ++++++++++----
  17  1 file changed, 10 insertions(+), 4 deletions(-)
  18
  19 --- a/drivers/mtd/spi-nor/fsl-quadspi.c
  20 +++ b/drivers/mtd/spi-nor/fsl-quadspi.c
  21 @@ -744,11 +744,17 @@ static void fsl_qspi_set_map_addr(struct
  22  {
  23         int nor_size = q->nor_size;
  24         void __iomem *base = q->iobase;
  25 +       u32 mem_base;
  26
  27 -       qspi_writel(q, nor_size + q->memmap_phy, base + QUADSPI_SFA1AD);
  28 -       qspi_writel(q, nor_size * 2 + q->memmap_phy, base + QUADSPI_SFA2AD);
  29 -       qspi_writel(q, nor_size * 3 + q->memmap_phy, base + QUADSPI_SFB1AD);
  30 -       qspi_writel(q, nor_size * 4 + q->memmap_phy, base + QUADSPI_SFB2AD);
  31 +       if (has_added_amba_base_internal(q))
  32 +               mem_base = 0x0;
  33 +       else
  34 +               mem_base = q->memmap_phy;
  35 +
  36 +       qspi_writel(q, nor_size + mem_base, base + QUADSPI_SFA1AD);
  37 +       qspi_writel(q, nor_size * 2 + mem_base, base + QUADSPI_SFA2AD);
  38 +       qspi_writel(q, nor_size * 3 + mem_base, base + QUADSPI_SFB1AD);
  39 +       qspi_writel(q, nor_size * 4 + mem_base, base + QUADSPI_SFB2AD);
  40  }
  41
  42  /*