83262bb7ccb25a0bf4ac502cdf19f03ca9c09338
[openwrt/openwrt.git] / target / linux / layerscape / patches-4.4 / 3023-powerpc-fsl-move-mpc85xx.h-to-include-linux-fsl.patch
1 From 2d8816af7c19882f62c4a25edb9fcc9040312f96 Mon Sep 17 00:00:00 2001
2 From: Yangbo Lu <yangbo.lu@nxp.com>
3 Date: Tue, 12 Apr 2016 14:21:19 +0800
4 Subject: [PATCH 23/70] powerpc/fsl: move mpc85xx.h to include/linux/fsl
5
6 commit 2a76fbe35c14717b4f4a145e0ab83517b1f4ab4a
7 [context adjustment]
8 [doesn't apply arch/powerpc/kernel/cpu_setup_fsl_booke.S]
9 [doesn't apply arch/powerpc/sysdev/mpic_timer.c]
10
11 Move mpc85xx.h to include/linux/fsl and rename it to svr.h as
12 a common header file. It has been used for mpc85xx and it will
13 be used for ARM-based SoC as well.
14
15 Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
16 Integrated-by: Zhao Qiang <qiang.zhao@nxp.com>
17 ---
18 arch/powerpc/include/asm/mpc85xx.h | 95 ------------------------------
19 drivers/clk/clk-qoriq.c | 2 +-
20 drivers/i2c/busses/i2c-mpc.c | 2 +-
21 drivers/iommu/fsl_pamu.c | 2 +-
22 drivers/net/ethernet/freescale/gianfar.c | 2 +-
23 include/linux/fsl/svr.h | 95 ++++++++++++++++++++++++++++++
24 6 files changed, 99 insertions(+), 99 deletions(-)
25 delete mode 100644 arch/powerpc/include/asm/mpc85xx.h
26 create mode 100644 include/linux/fsl/svr.h
27
28 --- a/arch/powerpc/include/asm/mpc85xx.h
29 +++ /dev/null
30 @@ -1,95 +0,0 @@
31 -/*
32 - * MPC85xx cpu type detection
33 - *
34 - * Copyright 2011-2012 Freescale Semiconductor, Inc.
35 - *
36 - * This is free software; you can redistribute it and/or modify
37 - * it under the terms of the GNU General Public License as published by
38 - * the Free Software Foundation; either version 2 of the License, or
39 - * (at your option) any later version.
40 - */
41 -
42 -#ifndef __ASM_PPC_MPC85XX_H
43 -#define __ASM_PPC_MPC85XX_H
44 -
45 -#define SVR_REV(svr) ((svr) & 0xFF) /* SOC design resision */
46 -#define SVR_MAJ(svr) (((svr) >> 4) & 0xF) /* Major revision field*/
47 -#define SVR_MIN(svr) (((svr) >> 0) & 0xF) /* Minor revision field*/
48 -
49 -/* Some parts define SVR[0:23] as the SOC version */
50 -#define SVR_SOC_VER(svr) (((svr) >> 8) & 0xFFF7FF) /* SOC Version fields */
51 -
52 -#define SVR_8533 0x803400
53 -#define SVR_8535 0x803701
54 -#define SVR_8536 0x803700
55 -#define SVR_8540 0x803000
56 -#define SVR_8541 0x807200
57 -#define SVR_8543 0x803200
58 -#define SVR_8544 0x803401
59 -#define SVR_8545 0x803102
60 -#define SVR_8547 0x803101
61 -#define SVR_8548 0x803100
62 -#define SVR_8555 0x807100
63 -#define SVR_8560 0x807000
64 -#define SVR_8567 0x807501
65 -#define SVR_8568 0x807500
66 -#define SVR_8569 0x808000
67 -#define SVR_8572 0x80E000
68 -#define SVR_P1010 0x80F100
69 -#define SVR_P1011 0x80E500
70 -#define SVR_P1012 0x80E501
71 -#define SVR_P1013 0x80E700
72 -#define SVR_P1014 0x80F101
73 -#define SVR_P1017 0x80F700
74 -#define SVR_P1020 0x80E400
75 -#define SVR_P1021 0x80E401
76 -#define SVR_P1022 0x80E600
77 -#define SVR_P1023 0x80F600
78 -#define SVR_P1024 0x80E402
79 -#define SVR_P1025 0x80E403
80 -#define SVR_P2010 0x80E300
81 -#define SVR_P2020 0x80E200
82 -#define SVR_P2040 0x821000
83 -#define SVR_P2041 0x821001
84 -#define SVR_P3041 0x821103
85 -#define SVR_P4040 0x820100
86 -#define SVR_P4080 0x820000
87 -#define SVR_P5010 0x822100
88 -#define SVR_P5020 0x822000
89 -#define SVR_P5021 0X820500
90 -#define SVR_P5040 0x820400
91 -#define SVR_T4240 0x824000
92 -#define SVR_T4120 0x824001
93 -#define SVR_T4160 0x824100
94 -#define SVR_T4080 0x824102
95 -#define SVR_C291 0x850000
96 -#define SVR_C292 0x850020
97 -#define SVR_C293 0x850030
98 -#define SVR_B4860 0X868000
99 -#define SVR_G4860 0x868001
100 -#define SVR_G4060 0x868003
101 -#define SVR_B4440 0x868100
102 -#define SVR_G4440 0x868101
103 -#define SVR_B4420 0x868102
104 -#define SVR_B4220 0x868103
105 -#define SVR_T1040 0x852000
106 -#define SVR_T1041 0x852001
107 -#define SVR_T1042 0x852002
108 -#define SVR_T1020 0x852100
109 -#define SVR_T1021 0x852101
110 -#define SVR_T1022 0x852102
111 -#define SVR_T2080 0x853000
112 -#define SVR_T2081 0x853100
113 -
114 -#define SVR_8610 0x80A000
115 -#define SVR_8641 0x809000
116 -#define SVR_8641D 0x809001
117 -
118 -#define SVR_9130 0x860001
119 -#define SVR_9131 0x860000
120 -#define SVR_9132 0x861000
121 -#define SVR_9232 0x861400
122 -
123 -#define SVR_Unknown 0xFFFFFF
124 -
125 -#endif
126 --- a/drivers/clk/clk-qoriq.c
127 +++ b/drivers/clk/clk-qoriq.c
128 @@ -13,6 +13,7 @@
129 #include <linux/clk.h>
130 #include <linux/clk-provider.h>
131 #include <linux/fsl/guts.h>
132 +#include <linux/fsl/svr.h>
133 #include <linux/io.h>
134 #include <linux/kernel.h>
135 #include <linux/module.h>
136 @@ -1148,7 +1149,6 @@ bad_args:
137 }
138
139 #ifdef CONFIG_PPC
140 -#include <asm/mpc85xx.h>
141
142 static const u32 a4510_svrs[] __initconst = {
143 (SVR_P2040 << 8) | 0x10, /* P2040 1.0 */
144 --- a/drivers/i2c/busses/i2c-mpc.c
145 +++ b/drivers/i2c/busses/i2c-mpc.c
146 @@ -27,9 +27,9 @@
147 #include <linux/i2c.h>
148 #include <linux/interrupt.h>
149 #include <linux/delay.h>
150 +#include <linux/fsl/svr.h>
151
152 #include <asm/mpc52xx.h>
153 -#include <asm/mpc85xx.h>
154 #include <sysdev/fsl_soc.h>
155
156 #define DRV_NAME "mpc-i2c"
157 --- a/drivers/iommu/fsl_pamu.c
158 +++ b/drivers/iommu/fsl_pamu.c
159 @@ -21,10 +21,10 @@
160 #include "fsl_pamu.h"
161
162 #include <linux/fsl/guts.h>
163 +#include <linux/fsl/svr.h>
164 #include <linux/interrupt.h>
165 #include <linux/genalloc.h>
166
167 -#include <asm/mpc85xx.h>
168
169 /* define indexes for each operation mapping scenario */
170 #define OMI_QMAN 0x00
171 --- a/drivers/net/ethernet/freescale/gianfar.c
172 +++ b/drivers/net/ethernet/freescale/gianfar.c
173 @@ -86,11 +86,11 @@
174 #include <linux/udp.h>
175 #include <linux/in.h>
176 #include <linux/net_tstamp.h>
177 +#include <linux/fsl/svr.h>
178
179 #include <asm/io.h>
180 #ifdef CONFIG_PPC
181 #include <asm/reg.h>
182 -#include <asm/mpc85xx.h>
183 #endif
184 #include <asm/irq.h>
185 #include <asm/uaccess.h>
186 --- /dev/null
187 +++ b/include/linux/fsl/svr.h
188 @@ -0,0 +1,95 @@
189 +/*
190 + * MPC85xx cpu type detection
191 + *
192 + * Copyright 2011-2012 Freescale Semiconductor, Inc.
193 + *
194 + * This is free software; you can redistribute it and/or modify
195 + * it under the terms of the GNU General Public License as published by
196 + * the Free Software Foundation; either version 2 of the License, or
197 + * (at your option) any later version.
198 + */
199 +
200 +#ifndef FSL_SVR_H
201 +#define FSL_SVR_H
202 +
203 +#define SVR_REV(svr) ((svr) & 0xFF) /* SOC design resision */
204 +#define SVR_MAJ(svr) (((svr) >> 4) & 0xF) /* Major revision field*/
205 +#define SVR_MIN(svr) (((svr) >> 0) & 0xF) /* Minor revision field*/
206 +
207 +/* Some parts define SVR[0:23] as the SOC version */
208 +#define SVR_SOC_VER(svr) (((svr) >> 8) & 0xFFF7FF) /* SOC Version fields */
209 +
210 +#define SVR_8533 0x803400
211 +#define SVR_8535 0x803701
212 +#define SVR_8536 0x803700
213 +#define SVR_8540 0x803000
214 +#define SVR_8541 0x807200
215 +#define SVR_8543 0x803200
216 +#define SVR_8544 0x803401
217 +#define SVR_8545 0x803102
218 +#define SVR_8547 0x803101
219 +#define SVR_8548 0x803100
220 +#define SVR_8555 0x807100
221 +#define SVR_8560 0x807000
222 +#define SVR_8567 0x807501
223 +#define SVR_8568 0x807500
224 +#define SVR_8569 0x808000
225 +#define SVR_8572 0x80E000
226 +#define SVR_P1010 0x80F100
227 +#define SVR_P1011 0x80E500
228 +#define SVR_P1012 0x80E501
229 +#define SVR_P1013 0x80E700
230 +#define SVR_P1014 0x80F101
231 +#define SVR_P1017 0x80F700
232 +#define SVR_P1020 0x80E400
233 +#define SVR_P1021 0x80E401
234 +#define SVR_P1022 0x80E600
235 +#define SVR_P1023 0x80F600
236 +#define SVR_P1024 0x80E402
237 +#define SVR_P1025 0x80E403
238 +#define SVR_P2010 0x80E300
239 +#define SVR_P2020 0x80E200
240 +#define SVR_P2040 0x821000
241 +#define SVR_P2041 0x821001
242 +#define SVR_P3041 0x821103
243 +#define SVR_P4040 0x820100
244 +#define SVR_P4080 0x820000
245 +#define SVR_P5010 0x822100
246 +#define SVR_P5020 0x822000
247 +#define SVR_P5021 0X820500
248 +#define SVR_P5040 0x820400
249 +#define SVR_T4240 0x824000
250 +#define SVR_T4120 0x824001
251 +#define SVR_T4160 0x824100
252 +#define SVR_T4080 0x824102
253 +#define SVR_C291 0x850000
254 +#define SVR_C292 0x850020
255 +#define SVR_C293 0x850030
256 +#define SVR_B4860 0X868000
257 +#define SVR_G4860 0x868001
258 +#define SVR_G4060 0x868003
259 +#define SVR_B4440 0x868100
260 +#define SVR_G4440 0x868101
261 +#define SVR_B4420 0x868102
262 +#define SVR_B4220 0x868103
263 +#define SVR_T1040 0x852000
264 +#define SVR_T1041 0x852001
265 +#define SVR_T1042 0x852002
266 +#define SVR_T1020 0x852100
267 +#define SVR_T1021 0x852101
268 +#define SVR_T1022 0x852102
269 +#define SVR_T2080 0x853000
270 +#define SVR_T2081 0x853100
271 +
272 +#define SVR_8610 0x80A000
273 +#define SVR_8641 0x809000
274 +#define SVR_8641D 0x809001
275 +
276 +#define SVR_9130 0x860001
277 +#define SVR_9131 0x860000
278 +#define SVR_9132 0x861000
279 +#define SVR_9232 0x861400
280 +
281 +#define SVR_Unknown 0xFFFFFF
282 +
283 +#endif