target/linux/layerscape/patches-4.4/7145-staging-fsl-mc-Added-generic-MSI-support-for-FSL-MC-.patch

   1 From 8ebb892cd56d14e72580ab36c3b5eb2d4603a7fe Mon Sep 17 00:00:00 2001
   2 From: "J. German Rivera" <German.Rivera@freescale.com>
   3 Date: Wed, 6 Jan 2016 16:03:21 -0600
   4 Subject: [PATCH 145/226] staging: fsl-mc: Added generic MSI support for
   5  FSL-MC devices
   6
   7 Created an MSI domain for the fsl-mc bus-- including functions
   8 to create a domain, find a domain, alloc/free domain irqs, and
   9 bus specific overrides for domain and irq_chip ops.
  10
  11 Signed-off-by: J. German Rivera <German.Rivera@freescale.com>
  12 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  13 ---
  14  drivers/staging/fsl-mc/bus/Kconfig          |    1 +
  15  drivers/staging/fsl-mc/bus/Makefile         |    1 +
  16  drivers/staging/fsl-mc/bus/mc-msi.c         |  276 +++++++++++++++++++++++++++
  17  drivers/staging/fsl-mc/include/dprc.h       |    2 +-
  18  drivers/staging/fsl-mc/include/mc-private.h |   17 ++
  19  drivers/staging/fsl-mc/include/mc.h         |   17 ++
  20  6 files changed, 313 insertions(+), 1 deletion(-)
  21  create mode 100644 drivers/staging/fsl-mc/bus/mc-msi.c
  22
  23 --- a/drivers/staging/fsl-mc/bus/Kconfig
  24 +++ b/drivers/staging/fsl-mc/bus/Kconfig
  25 @@ -9,6 +9,7 @@
  26  config FSL_MC_BUS
  27         tristate "Freescale Management Complex (MC) bus driver"
  28         depends on OF && ARM64
  29 +       select GENERIC_MSI_IRQ_DOMAIN
  30         help
  31           Driver to enable the bus infrastructure for the Freescale
  32            QorIQ Management Complex (fsl-mc). The fsl-mc is a hardware
  33 --- a/drivers/staging/fsl-mc/bus/Makefile
  34 +++ b/drivers/staging/fsl-mc/bus/Makefile
  35 @@ -13,5 +13,6 @@ mc-bus-driver-objs := mc-bus.o \
  36                       dpmng.o \
  37                       dprc-driver.o \
  38                       mc-allocator.o \
  39 +                     mc-msi.o \
  40                       dpmcp.o \
  41                       dpbp.o
  42 --- /dev/null
  43 +++ b/drivers/staging/fsl-mc/bus/mc-msi.c
  44 @@ -0,0 +1,276 @@
  45 +/*
  46 + * Freescale Management Complex (MC) bus driver MSI support
  47 + *
  48 + * Copyright (C) 2015 Freescale Semiconductor, Inc.
  49 + * Author: German Rivera <German.Rivera@freescale.com>
  50 + *
  51 + * This file is licensed under the terms of the GNU General Public
  52 + * License version 2. This program is licensed "as is" without any
  53 + * warranty of any kind, whether express or implied.
  54 + */
  55 +
  56 +#include "../include/mc-private.h"
  57 +#include <linux/of_device.h>
  58 +#include <linux/of_address.h>
  59 +#include <linux/irqchip/arm-gic-v3.h>
  60 +#include <linux/of_irq.h>
  61 +#include <linux/irq.h>
  62 +#include <linux/irqdomain.h>
  63 +#include <linux/msi.h>
  64 +#include "../include/mc-sys.h"
  65 +#include "dprc-cmd.h"
  66 +
  67 +static void fsl_mc_msi_set_desc(msi_alloc_info_t *arg,
  68 +                               struct msi_desc *desc)
  69 +{
  70 +       arg->desc = desc;
  71 +       arg->hwirq = (irq_hw_number_t)desc->fsl_mc.msi_index;
  72 +}
  73 +
  74 +static void fsl_mc_msi_update_dom_ops(struct msi_domain_info *info)
  75 +{
  76 +       struct msi_domain_ops *ops = info->ops;
  77 +
  78 +       if (WARN_ON(!ops))
  79 +               return;
  80 +
  81 +       /*
  82 +        * set_desc should not be set by the caller
  83 +        */
  84 +       if (WARN_ON(ops->set_desc))
  85 +               return;
  86 +
  87 +       ops->set_desc = fsl_mc_msi_set_desc;
  88 +}
  89 +
  90 +static void __fsl_mc_msi_write_msg(struct fsl_mc_device *mc_bus_dev,
  91 +                                  struct fsl_mc_device_irq *mc_dev_irq)
  92 +{
  93 +       int error;
  94 +       struct fsl_mc_device *owner_mc_dev = mc_dev_irq->mc_dev;
  95 +       struct msi_desc *msi_desc = mc_dev_irq->msi_desc;
  96 +       struct dprc_irq_cfg irq_cfg;
  97 +
  98 +       /*
  99 +        * msi_desc->msg.address is 0x0 when this function is invoked in
 100 +        * the free_irq() code path. In this case, for the MC, we don't
 101 +        * really need to "unprogram" the MSI, so we just return.
 102 +        */
 103 +       if (msi_desc->msg.address_lo == 0x0 && msi_desc->msg.address_hi == 0x0)
 104 +               return;
 105 +
 106 +       if (WARN_ON(!owner_mc_dev))
 107 +               return;
 108 +
 109 +       irq_cfg.paddr = ((u64)msi_desc->msg.address_hi << 32) |
 110 +                       msi_desc->msg.address_lo;
 111 +       irq_cfg.val = msi_desc->msg.data;
 112 +       irq_cfg.user_irq_id = msi_desc->irq;
 113 +
 114 +       if (owner_mc_dev == mc_bus_dev) {
 115 +               /*
 116 +                * IRQ is for the mc_bus_dev's DPRC itself
 117 +                */
 118 +               error = dprc_set_irq(mc_bus_dev->mc_io,
 119 +                                    MC_CMD_FLAG_INTR_DIS | MC_CMD_FLAG_PRI,
 120 +                                    mc_bus_dev->mc_handle,
 121 +                                    mc_dev_irq->dev_irq_index,
 122 +                                    &irq_cfg);
 123 +               if (error < 0) {
 124 +                       dev_err(&owner_mc_dev->dev,
 125 +                               "dprc_set_irq() failed: %d\n", error);
 126 +               }
 127 +       } else {
 128 +               /*
 129 +                * IRQ is for for a child device of mc_bus_dev
 130 +                */
 131 +               error = dprc_set_obj_irq(mc_bus_dev->mc_io,
 132 +                                        MC_CMD_FLAG_INTR_DIS | MC_CMD_FLAG_PRI,
 133 +                                        mc_bus_dev->mc_handle,
 134 +                                        owner_mc_dev->obj_desc.type,
 135 +                                        owner_mc_dev->obj_desc.id,
 136 +                                        mc_dev_irq->dev_irq_index,
 137 +                                        &irq_cfg);
 138 +               if (error < 0) {
 139 +                       dev_err(&owner_mc_dev->dev,
 140 +                               "dprc_obj_set_irq() failed: %d\n", error);
 141 +               }
 142 +       }
 143 +}
 144 +
 145 +/*
 146 + * NOTE: This function is invoked with interrupts disabled
 147 + */
 148 +static void fsl_mc_msi_write_msg(struct irq_data *irq_data,
 149 +                                struct msi_msg *msg)
 150 +{
 151 +       struct msi_desc *msi_desc = irq_data_get_msi_desc(irq_data);
 152 +       struct fsl_mc_device *mc_bus_dev = to_fsl_mc_device(msi_desc->dev);
 153 +       struct fsl_mc_bus *mc_bus = to_fsl_mc_bus(mc_bus_dev);
 154 +       struct fsl_mc_device_irq *mc_dev_irq =
 155 +               &mc_bus->irq_resources[msi_desc->fsl_mc.msi_index];
 156 +
 157 +       WARN_ON(mc_dev_irq->msi_desc != msi_desc);
 158 +       msi_desc->msg = *msg;
 159 +
 160 +       /*
 161 +        * Program the MSI (paddr, value) pair in the device:
 162 +        */
 163 +       __fsl_mc_msi_write_msg(mc_bus_dev, mc_dev_irq);
 164 +}
 165 +
 166 +static void fsl_mc_msi_update_chip_ops(struct msi_domain_info *info)
 167 +{
 168 +       struct irq_chip *chip = info->chip;
 169 +
 170 +       if (WARN_ON((!chip)))
 171 +               return;
 172 +
 173 +       /*
 174 +        * irq_write_msi_msg should not be set by the caller
 175 +        */
 176 +       if (WARN_ON(chip->irq_write_msi_msg))
 177 +               return;
 178 +
 179 +       chip->irq_write_msi_msg = fsl_mc_msi_write_msg;
 180 +}
 181 +
 182 +/**
 183 + * fsl_mc_msi_create_irq_domain - Create a fsl-mc MSI interrupt domain
 184 + * @np:                Optional device-tree node of the interrupt controller
 185 + * @info:      MSI domain info
 186 + * @parent:    Parent irq domain
 187 + *
 188 + * Updates the domain and chip ops and creates a fsl-mc MSI
 189 + * interrupt domain.
 190 + *
 191 + * Returns:
 192 + * A domain pointer or NULL in case of failure.
 193 + */
 194 +struct irq_domain *fsl_mc_msi_create_irq_domain(struct fwnode_handle *fwnode,
 195 +                                               struct msi_domain_info *info,
 196 +                                               struct irq_domain *parent)
 197 +{
 198 +       struct irq_domain *domain;
 199 +
 200 +       if (info->flags & MSI_FLAG_USE_DEF_DOM_OPS)
 201 +               fsl_mc_msi_update_dom_ops(info);
 202 +       if (info->flags & MSI_FLAG_USE_DEF_CHIP_OPS)
 203 +               fsl_mc_msi_update_chip_ops(info);
 204 +
 205 +       domain = msi_create_irq_domain(fwnode, info, parent);
 206 +       if (domain)
 207 +               domain->bus_token = DOMAIN_BUS_FSL_MC_MSI;
 208 +
 209 +       return domain;
 210 +}
 211 +
 212 +int fsl_mc_find_msi_domain(struct device *mc_platform_dev,
 213 +                          struct irq_domain **mc_msi_domain)
 214 +{
 215 +       struct irq_domain *msi_domain;
 216 +       struct device_node *mc_of_node = mc_platform_dev->of_node;
 217 +
 218 +       msi_domain = of_msi_get_domain(mc_platform_dev, mc_of_node,
 219 +                                      DOMAIN_BUS_FSL_MC_MSI);
 220 +       if (!msi_domain) {
 221 +               pr_err("Unable to find fsl-mc MSI domain for %s\n",
 222 +                      mc_of_node->full_name);
 223 +
 224 +               return -ENOENT;
 225 +       }
 226 +
 227 +       *mc_msi_domain = msi_domain;
 228 +       return 0;
 229 +}
 230 +
 231 +static void fsl_mc_msi_free_descs(struct device *dev)
 232 +{
 233 +       struct msi_desc *desc, *tmp;
 234 +
 235 +       list_for_each_entry_safe(desc, tmp, dev_to_msi_list(dev), list) {
 236 +               list_del(&desc->list);
 237 +               free_msi_entry(desc);
 238 +       }
 239 +}
 240 +
 241 +static int fsl_mc_msi_alloc_descs(struct device *dev, unsigned int irq_count)
 242 +
 243 +{
 244 +       unsigned int i;
 245 +       int error;
 246 +       struct msi_desc *msi_desc;
 247 +
 248 +       for (i = 0; i < irq_count; i++) {
 249 +               msi_desc = alloc_msi_entry(dev);
 250 +               if (!msi_desc) {
 251 +                       dev_err(dev, "Failed to allocate msi entry\n");
 252 +                       error = -ENOMEM;
 253 +                       goto cleanup_msi_descs;
 254 +               }
 255 +
 256 +               msi_desc->fsl_mc.msi_index = i;
 257 +               msi_desc->nvec_used = 1;
 258 +               INIT_LIST_HEAD(&msi_desc->list);
 259 +               list_add_tail(&msi_desc->list, dev_to_msi_list(dev));
 260 +       }
 261 +
 262 +       return 0;
 263 +
 264 +cleanup_msi_descs:
 265 +       fsl_mc_msi_free_descs(dev);
 266 +       return error;
 267 +}
 268 +
 269 +int fsl_mc_msi_domain_alloc_irqs(struct device *dev,
 270 +                                unsigned int irq_count)
 271 +{
 272 +       struct irq_domain *msi_domain;
 273 +       int error;
 274 +
 275 +       if (WARN_ON(!list_empty(dev_to_msi_list(dev))))
 276 +               return -EINVAL;
 277 +
 278 +       error = fsl_mc_msi_alloc_descs(dev, irq_count);
 279 +       if (error < 0)
 280 +               return error;
 281 +
 282 +       msi_domain = dev_get_msi_domain(dev);
 283 +       if (WARN_ON(!msi_domain)) {
 284 +               error = -EINVAL;
 285 +               goto cleanup_msi_descs;
 286 +       }
 287 +
 288 +       /*
 289 +        * NOTE: Calling this function will trigger the invocation of the
 290 +        * its_fsl_mc_msi_prepare() callback
 291 +        */
 292 +       error = msi_domain_alloc_irqs(msi_domain, dev, irq_count);
 293 +
 294 +       if (error) {
 295 +               dev_err(dev, "Failed to allocate IRQs\n");
 296 +               goto cleanup_msi_descs;
 297 +       }
 298 +
 299 +       return 0;
 300 +
 301 +cleanup_msi_descs:
 302 +       fsl_mc_msi_free_descs(dev);
 303 +       return error;
 304 +}
 305 +
 306 +void fsl_mc_msi_domain_free_irqs(struct device *dev)
 307 +{
 308 +       struct irq_domain *msi_domain;
 309 +
 310 +       msi_domain = dev_get_msi_domain(dev);
 311 +       if (WARN_ON(!msi_domain))
 312 +               return;
 313 +
 314 +       msi_domain_free_irqs(msi_domain, dev);
 315 +
 316 +       if (WARN_ON(list_empty(dev_to_msi_list(dev))))
 317 +               return;
 318 +
 319 +       fsl_mc_msi_free_descs(dev);
 320 +}
 321 --- a/drivers/staging/fsl-mc/include/dprc.h
 322 +++ b/drivers/staging/fsl-mc/include/dprc.h
 323 @@ -176,7 +176,7 @@ int dprc_reset_container(struct fsl_mc_i
 324   * @user_irq_id: A user defined number associated with this IRQ
 325   */
 326  struct dprc_irq_cfg {
 327 -            u64                paddr;
 328 +            phys_addr_t        paddr;
 329              u32                val;
 330              int                user_irq_id;
 331  };
 332 --- a/drivers/staging/fsl-mc/include/mc-private.h
 333 +++ b/drivers/staging/fsl-mc/include/mc-private.h
 334 @@ -26,6 +26,9 @@
 335          strcmp(_obj_type, "dpmcp") == 0 || \
 336          strcmp(_obj_type, "dpcon") == 0)
 337
 338 +struct irq_domain;
 339 +struct msi_domain_info;
 340 +
 341  /**
 342   * struct fsl_mc - Private data of a "fsl,qoriq-mc" platform device
 343   * @root_mc_bus_dev: MC object device representing the root DPRC
 344 @@ -79,11 +82,13 @@ struct fsl_mc_resource_pool {
 345   * @resource_pools: array of resource pools (one pool per resource type)
 346   * for this MC bus. These resources represent allocatable entities
 347   * from the physical DPRC.
 348 + * @irq_resources: Pointer to array of IRQ objects for the IRQ pool
 349   * @scan_mutex: Serializes bus scanning
 350   */
 351  struct fsl_mc_bus {
 352         struct fsl_mc_device mc_dev;
 353         struct fsl_mc_resource_pool resource_pools[FSL_MC_NUM_POOL_TYPES];
 354 +       struct fsl_mc_device_irq *irq_resources;
 355         struct mutex scan_mutex;    /* serializes bus scanning */
 356  };
 357
 358 @@ -116,4 +121,16 @@ int __must_check fsl_mc_resource_allocat
 359
 360  void fsl_mc_resource_free(struct fsl_mc_resource *resource);
 361
 362 +struct irq_domain *fsl_mc_msi_create_irq_domain(struct fwnode_handle *fwnode,
 363 +                                               struct msi_domain_info *info,
 364 +                                               struct irq_domain *parent);
 365 +
 366 +int fsl_mc_find_msi_domain(struct device *mc_platform_dev,
 367 +                          struct irq_domain **mc_msi_domain);
 368 +
 369 +int fsl_mc_msi_domain_alloc_irqs(struct device *dev,
 370 +                                unsigned int irq_count);
 371 +
 372 +void fsl_mc_msi_domain_free_irqs(struct device *dev);
 373 +
 374  #endif /* _FSL_MC_PRIVATE_H_ */
 375 --- a/drivers/staging/fsl-mc/include/mc.h
 376 +++ b/drivers/staging/fsl-mc/include/mc.h
 377 @@ -104,6 +104,23 @@ struct fsl_mc_resource {
 378  };
 379
 380  /**
 381 + * struct fsl_mc_device_irq - MC object device message-based interrupt
 382 + * @msi_desc: pointer to MSI descriptor allocated by fsl_mc_msi_alloc_descs()
 383 + * @mc_dev: MC object device that owns this interrupt
 384 + * @dev_irq_index: device-relative IRQ index
 385 + * @resource: MC generic resource associated with the interrupt
 386 + */
 387 +struct fsl_mc_device_irq {
 388 +       struct msi_desc *msi_desc;
 389 +       struct fsl_mc_device *mc_dev;
 390 +       u8 dev_irq_index;
 391 +       struct fsl_mc_resource resource;
 392 +};
 393 +
 394 +#define to_fsl_mc_irq(_mc_resource) \
 395 +       container_of(_mc_resource, struct fsl_mc_device_irq, resource)
 396 +
 397 +/**
 398   * Bit masks for a MC object device (struct fsl_mc_device) flags
 399   */
 400  #define FSL_MC_IS_DPRC 0x0001