kernel: bump to 4.4.39
[openwrt/openwrt.git] / target / linux / layerscape / patches-4.4 / 8134-pci-layerscape-add-LUT-DBG-reigster-offset-member.patch
1 From 57d147c02fdcbae5e61ba322d51c5734f9511fd7 Mon Sep 17 00:00:00 2001
2 From: Mingkai Hu <mingkai.hu@nxp.com>
3 Date: Mon, 26 Sep 2016 14:19:32 +0800
4 Subject: [PATCH 134/141] pci/layerscape: add LUT DBG reigster offset member
5
6 commit 59ab37d6f46356a5b9755fcec74b23616dfdd62f
7 [doesn't apply pm part]
8
9 Different chip have different LUT debug register offset,
10 so add a member to avoid macro redifinition.
11
12 Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com>
13 Integrated-by: Zhao Qiang <qiang.zhao@nxp.com>
14 Integrated-by: Yutang Jiang <yutang.jiang@nxp.com>
15 ---
16 drivers/pci/host/pci-layerscape.c | 8 ++++++--
17 1 file changed, 6 insertions(+), 2 deletions(-)
18
19 --- a/drivers/pci/host/pci-layerscape.c
20 +++ b/drivers/pci/host/pci-layerscape.c
21 @@ -41,6 +41,7 @@
22 struct ls_pcie_drvdata {
23 u32 lut_offset;
24 u32 ltssm_shift;
25 + u32 lut_dbg;
26 struct pcie_host_ops *ops;
27 };
28
29 @@ -134,7 +135,7 @@ static int ls_pcie_link_up(struct pcie_p
30 struct ls_pcie *pcie = to_ls_pcie(pp);
31 u32 state;
32
33 - state = (ioread32(pcie->lut + PCIE_LUT_DBG) >>
34 + state = (ioread32(pcie->lut + pcie->drvdata->lut_dbg) >>
35 pcie->drvdata->ltssm_shift) &
36 LTSSM_STATE_MASK;
37
38 @@ -196,24 +197,28 @@ static struct ls_pcie_drvdata ls1021_drv
39 static struct ls_pcie_drvdata ls1012_drvdata = {
40 .lut_offset = 0xC0000,
41 .ltssm_shift = 24,
42 + .lut_dbg = 0x7fc,
43 .ops = &ls_pcie_host_ops,
44 };
45
46 static struct ls_pcie_drvdata ls1043_drvdata = {
47 .lut_offset = 0x10000,
48 .ltssm_shift = 24,
49 + .lut_dbg = 0x7fc,
50 .ops = &ls_pcie_host_ops,
51 };
52
53 static struct ls_pcie_drvdata ls1046_drvdata = {
54 - .lut_offset = 0x10000,
55 + .lut_offset = 0x80000,
56 .ltssm_shift = 24,
57 + .lut_dbg = 0x407fc,
58 .ops = &ls_pcie_host_ops,
59 };
60
61 static struct ls_pcie_drvdata ls2080_drvdata = {
62 .lut_offset = 0x80000,
63 .ltssm_shift = 0,
64 + .lut_dbg = 0x7fc,
65 .ops = &ls_pcie_host_ops,
66 };
67