6eba875f5c197ae3fde8473cf720ed5051a7ae43
[openwrt/openwrt.git] / target / linux / layerscape / patches-5.4 / 302-dts-0026-arm64-dts-nxp-add-more-thermal-zone-support.patch
1 From 314a3a062e5e8fe76b3c43a8731ffe4bd58bc1be Mon Sep 17 00:00:00 2001
2 From: Yuantian Tang <andy.tang@nxp.com>
3 Date: Mon, 5 Nov 2018 17:40:20 +0800
4 Subject: [PATCH] arm64: dts: nxp: add more thermal zone support
5
6 To enable all the supported thermal sensors, add sensor id information
7 to thermal zone node.
8 Dts for ls1012a, ls1046a, ls1043a, ls1088a are updated.
9
10 Signed-off-by: Yuantian Tang <andy.tang@nxp.com>
11 ---
12 arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 39 ++++------------
13 arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 61 ++++++++++++--------------
14 arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 57 ++++++++++--------------
15 arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 53 +++++++---------------
16 4 files changed, 75 insertions(+), 135 deletions(-)
17
18 --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
19 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
20 @@ -28,7 +28,7 @@
21 #address-cells = <1>;
22 #size-cells = <0>;
23
24 - cpu0: cpu@0 {
25 + cooling_map0: cpu0: cpu@0 {
26 device_type = "cpu";
27 compatible = "arm,cortex-a53";
28 reg = <0x0>;
29 @@ -100,36 +100,7 @@
30 mask = <0x02>;
31 };
32
33 - thermal-zones {
34 - cpu_thermal: cpu-thermal {
35 - polling-delay-passive = <1000>;
36 - polling-delay = <5000>;
37 - thermal-sensors = <&tmu 0>;
38 -
39 - trips {
40 - cpu_alert: cpu-alert {
41 - temperature = <85000>;
42 - hysteresis = <2000>;
43 - type = "passive";
44 - };
45 -
46 - cpu_crit: cpu-crit {
47 - temperature = <95000>;
48 - hysteresis = <2000>;
49 - type = "critical";
50 - };
51 - };
52 -
53 - cooling-maps {
54 - map0 {
55 - trip = <&cpu_alert>;
56 - cooling-device =
57 - <&cpu0 THERMAL_NO_LIMIT
58 - THERMAL_NO_LIMIT>;
59 - };
60 - };
61 - };
62 - };
63 + #include "fsl-tmu.dtsi"
64
65 soc {
66 compatible = "simple-bus";
67 @@ -572,3 +543,9 @@
68 };
69 };
70 };
71 +
72 +&thermal_zones {
73 + thermal-zone0 {
74 + status = "okay";
75 + };
76 +};
77 --- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
78 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
79 @@ -39,7 +39,7 @@
80 *
81 * Currently supported enable-method is psci v0.2
82 */
83 - cpu0: cpu@0 {
84 + cooling_map0: cpu0: cpu@0 {
85 device_type = "cpu";
86 compatible = "arm,cortex-a53";
87 reg = <0x0>;
88 @@ -148,38 +148,7 @@
89 mask = <0x02>;
90 };
91
92 - thermal-zones {
93 - cpu_thermal: cpu-thermal {
94 - polling-delay-passive = <1000>;
95 - polling-delay = <5000>;
96 -
97 - thermal-sensors = <&tmu 3>;
98 -
99 - trips {
100 - cpu_alert: cpu-alert {
101 - temperature = <85000>;
102 - hysteresis = <2000>;
103 - type = "passive";
104 - };
105 - cpu_crit: cpu-crit {
106 - temperature = <95000>;
107 - hysteresis = <2000>;
108 - type = "critical";
109 - };
110 - };
111 -
112 - cooling-maps {
113 - map0 {
114 - trip = <&cpu_alert>;
115 - cooling-device =
116 - <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
117 - <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
118 - <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
119 - <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
120 - };
121 - };
122 - };
123 - };
124 + #include "fsl-tmu.dtsi"
125
126 timer {
127 compatible = "arm,armv8-timer";
128 @@ -915,3 +884,29 @@
129
130 #include "qoriq-qman-portals.dtsi"
131 #include "qoriq-bman-portals.dtsi"
132 +
133 +&thermal_zones {
134 + thermal-zone0 {
135 + status = "okay";
136 + };
137 +
138 + thermal-zone1 {
139 + status = "okay";
140 + };
141 +
142 + thermal-zone2 {
143 + status = "okay";
144 + };
145 +
146 + thermal-zone3 {
147 + status = "okay";
148 + };
149 +
150 + thermal-zone4 {
151 + status = "okay";
152 + };
153 +
154 + thermal-zone5 {
155 + status = "okay";
156 + };
157 +};
158 --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
159 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
160 @@ -34,7 +34,7 @@
161 #address-cells = <1>;
162 #size-cells = <0>;
163
164 - cpu0: cpu@0 {
165 + cooling_map0: cpu0: cpu@0 {
166 device_type = "cpu";
167 compatible = "arm,cortex-a72";
168 reg = <0x0>;
169 @@ -116,38 +116,7 @@
170 mask = <0x02>;
171 };
172
173 - thermal-zones {
174 - cpu_thermal: cpu-thermal {
175 - polling-delay-passive = <1000>;
176 - polling-delay = <5000>;
177 - thermal-sensors = <&tmu 3>;
178 -
179 - trips {
180 - cpu_alert: cpu-alert {
181 - temperature = <85000>;
182 - hysteresis = <2000>;
183 - type = "passive";
184 - };
185 -
186 - cpu_crit: cpu-crit {
187 - temperature = <95000>;
188 - hysteresis = <2000>;
189 - type = "critical";
190 - };
191 - };
192 -
193 - cooling-maps {
194 - map0 {
195 - trip = <&cpu_alert>;
196 - cooling-device =
197 - <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
198 - <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
199 - <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
200 - <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
201 - };
202 - };
203 - };
204 - };
205 + #include "fsl-tmu.dtsi"
206
207 timer {
208 compatible = "arm,armv8-timer";
209 @@ -882,3 +851,25 @@
210
211 #include "qoriq-qman-portals.dtsi"
212 #include "qoriq-bman-portals.dtsi"
213 +
214 +&thermal_zones {
215 + thermal-zone0 {
216 + status = "okay";
217 + };
218 +
219 + thermal-zone1 {
220 + status = "okay";
221 + };
222 +
223 + thermal-zone2 {
224 + status = "okay";
225 + };
226 +
227 + thermal-zone3 {
228 + status = "okay";
229 + };
230 +
231 + thermal-zone4 {
232 + status = "okay";
233 + };
234 +};
235 --- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
236 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
237 @@ -25,7 +25,7 @@
238 #size-cells = <0>;
239
240 /* We have 2 clusters having 4 Cortex-A53 cores each */
241 - cpu0: cpu@0 {
242 + cooling_map0: cpu0: cpu@0 {
243 device_type = "cpu";
244 compatible = "arm,cortex-a53";
245 reg = <0x0>;
246 @@ -61,7 +61,7 @@
247 #cooling-cells = <2>;
248 };
249
250 - cpu4: cpu@100 {
251 + cooling_map1: cpu4: cpu@100 {
252 device_type = "cpu";
253 compatible = "arm,cortex-a53";
254 reg = <0x100>;
255 @@ -128,42 +128,7 @@
256 };
257 };
258
259 - thermal-zones {
260 - cpu_thermal: cpu-thermal {
261 - polling-delay-passive = <1000>;
262 - polling-delay = <5000>;
263 - thermal-sensors = <&tmu 0>;
264 -
265 - trips {
266 - cpu_alert: cpu-alert {
267 - temperature = <85000>;
268 - hysteresis = <2000>;
269 - type = "passive";
270 - };
271 -
272 - cpu_crit: cpu-crit {
273 - temperature = <95000>;
274 - hysteresis = <2000>;
275 - type = "critical";
276 - };
277 - };
278 -
279 - cooling-maps {
280 - map0 {
281 - trip = <&cpu_alert>;
282 - cooling-device =
283 - <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
284 - <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
285 - <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
286 - <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
287 - <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
288 - <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
289 - <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
290 - <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
291 - };
292 - };
293 - };
294 - };
295 + #include "fsl-tmu.dtsi"
296
297 timer {
298 compatible = "arm,armv8-timer";
299 @@ -879,3 +844,15 @@
300 };
301 };
302 };
303 +
304 +#include "fsl-tmu-map1.dtsi"
305 +
306 +&thermal_zones {
307 + thermal-zone0 {
308 + status = "okay";
309 + };
310 +
311 + thermal-zone1 {
312 + status = "okay";
313 + };
314 +};