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kernel: bump 5.4 to 5.4.111
[openwrt/openwrt.git] / target / linux / layerscape / patches-5.4 / 302-dts-0063-arm64-dts-fsl-remove-backplane-support.patch
1 From 278bacf54eabe391159cef3112f8e8bf0fa7b891 Mon Sep 17 00:00:00 2001
2 From: Florinel Iordache <florinel.iordache@nxp.com>
3 Date: Mon, 27 May 2019 15:57:05 +0300
4 Subject: [PATCH] arm64: dts: fsl: remove backplane support
5
6 Remove entire backplane support from device tree for all supported platforms
7
8 Signed-off-by: Florinel Iordache <florinel.iordache@nxp.com>
9 ---
10 .../boot/dts/freescale/fsl-ls1046a-qds-sdk.dts | 4 -
11 .../boot/dts/freescale/fsl-ls1046a-rdb-sdk.dts | 34 --------
12 arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 5 --
13 arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts | 26 -------
14 arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 46 -----------
15 arch/arm64/boot/dts/freescale/fsl-ls2088a-qds.dts | 58 --------------
16 arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi | 90 ----------------------
17 arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts | 60 ---------------
18 arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 86 ---------------------
19 .../boot/dts/freescale/qoriq-fman3-0-10g-0.dtsi | 4 +-
20 .../boot/dts/freescale/qoriq-fman3-0-10g-1.dtsi | 4 +-
21 11 files changed, 4 insertions(+), 413 deletions(-)
22
23 --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds-sdk.dts
24 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds-sdk.dts
25 @@ -259,10 +259,6 @@ pcie@3600000 {
26 dma-coherent;
27 };
28
29 -&serdes1 {
30 - dma-coherent;
31 -};
32 -
33 &fsldpaa {
34 dma-coherent;
35 };
36 --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-sdk.dts
37 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-sdk.dts
38 @@ -100,36 +100,6 @@ pcie@3600000 {
39 compatible = "fsl,fman", "simple-bus";
40 };
41
42 -&mdio9 {
43 - pcsphy6: ethernet-phy@0 {
44 - backplane-mode = "10gbase-kr";
45 - compatible = "ethernet-phy-ieee802.3-c45";
46 - reg = <0x0>;
47 - fsl,lane-handle = <&serdes1>;
48 - fsl,lane-reg = <0x8C0 0x40>; /* lane D */
49 - };
50 -};
51 -
52 -&mdio10 {
53 - pcsphy7: ethernet-phy@0 {
54 - backplane-mode = "10gbase-kr";
55 - compatible = "ethernet-phy-ieee802.3-c45";
56 - reg = <0x0>;
57 - fsl,lane-handle = <&serdes1>;
58 - fsl,lane-reg = <0x880 0x40>; /* lane C */
59 - };
60 -};
61 -
62 -/* Update MAC connections to backplane PHYs
63 - * &mac9 {
64 - * phy-handle = <&pcsphy6>;
65 - *};
66 - *
67 - *&mac10 {
68 - * phy-handle = <&pcsphy7>;
69 - *};
70 -*/
71 -
72 &clockgen {
73 dma-coherent;
74 };
75 @@ -298,10 +268,6 @@ pcie@3600000 {
76 dma-coherent;
77 };
78
79 -&serdes1 {
80 - dma-coherent;
81 -};
82 -
83 &fsldpaa {
84 dma-coherent;
85 };
86 --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
87 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
88 @@ -680,11 +680,6 @@
89 <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
90 };
91
92 - serdes1: serdes@1ea0000 {
93 - reg = <0x0 0x1ea0000 0 0x00002000>;
94 - compatible = "fsl,serdes-10g";
95 - };
96 -
97 pcie@3400000 {
98 compatible = "fsl,ls1046a-pcie";
99 reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */
100 --- a/arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts
101 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts
102 @@ -170,29 +170,3 @@
103 &sata {
104 status = "okay";
105 };
106 -
107 -&pcs_mdio1 {
108 - pcs_phy1: ethernet-phy@0 {
109 - backplane-mode = "10gbase-kr";
110 - compatible = "ethernet-phy-ieee802.3-c45";
111 - reg = <0x0>;
112 - fsl,lane-handle = <&serdes1>;
113 - fsl,lane-reg = <0x840 0x40>;/* lane B */
114 - };
115 -};
116 -
117 -&pcs_mdio2 {
118 - pcs_phy2: ethernet-phy@0 {
119 - backplane-mode = "10gbase-kr";
120 - compatible = "ethernet-phy-ieee802.3-c45";
121 - reg = <0x0>;
122 - fsl,lane-handle = <&serdes1>;
123 - fsl,lane-reg = <0x800 0x40>;/* lane A */
124 - };
125 -};
126 -
127 -/* Update DPMAC connections to backplane PHYs, under SerDes 0x1D_0xXX.
128 - * &dpmac1 {
129 - * phy-handle = <&pcs_phy1>;
130 - * };
131 - */
132 --- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
133 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
134 @@ -183,12 +183,6 @@
135 little-endian;
136 };
137
138 - serdes1: serdes@1ea0000 {
139 - compatible = "fsl,serdes-10g";
140 - reg = <0x0 0x1ea0000 0 0x00002000>;
141 - little-endian;
142 - };
143 -
144 tmu: tmu@1f80000 {
145 compatible = "fsl,qoriq-tmu";
146 reg = <0x0 0x1f80000 0x0 0x10000>;
147 @@ -333,46 +327,6 @@
148
149 #address-cells = <1>;
150 #size-cells = <0>;
151 - };
152 -
153 - pcs_mdio1: mdio@8c07000 {
154 - compatible = "fsl,fman-memac-mdio";
155 - reg = <0x0 0x8c07000 0x0 0x1000>;
156 - device_type = "mdio";
157 - little-endian;
158 -
159 - #address-cells = <1>;
160 - #size-cells = <0>;
161 - };
162 -
163 - pcs_mdio2: mdio@8c0b000 {
164 - compatible = "fsl,fman-memac-mdio";
165 - reg = <0x0 0x8c0b000 0x0 0x1000>;
166 - device_type = "mdio";
167 - little-endian;
168 -
169 - #address-cells = <1>;
170 - #size-cells = <0>;
171 - };
172 -
173 - pcs_mdio3: mdio@8c0f000 {
174 - compatible = "fsl,fman-memac-mdio";
175 - reg = <0x0 0x8c0f000 0x0 0x1000>;
176 - device_type = "mdio";
177 - little-endian;
178 -
179 - #address-cells = <1>;
180 - #size-cells = <0>;
181 - };
182 -
183 - pcs_mdio4: mdio@8c13000 {
184 - compatible = "fsl,fman-memac-mdio";
185 - reg = <0x0 0x8c13000 0x0 0x1000>;
186 - device_type = "mdio";
187 - little-endian;
188 -
189 - #address-cells = <1>;
190 - #size-cells = <0>;
191 };
192
193 ifc: ifc@2240000 {
194 --- a/arch/arm64/boot/dts/freescale/fsl-ls2088a-qds.dts
195 +++ b/arch/arm64/boot/dts/freescale/fsl-ls2088a-qds.dts
196 @@ -71,64 +71,6 @@
197 };
198 };
199
200 -&pcs_mdio1 {
201 - pcs_phy1: ethernet-phy@0 {
202 - backplane-mode = "10gbase-kr";
203 - compatible = "ethernet-phy-ieee802.3-c45";
204 - reg = <0x0>;
205 - fsl,lane-handle = <&serdes1>;
206 - fsl,lane-reg = <0x9C0 0x40>;/* lane H */
207 - };
208 -};
209 -
210 -&pcs_mdio2 {
211 - pcs_phy2: ethernet-phy@0 {
212 - backplane-mode = "10gbase-kr";
213 - compatible = "ethernet-phy-ieee802.3-c45";
214 - reg = <0x0>;
215 - fsl,lane-handle = <&serdes1>;
216 - fsl,lane-reg = <0x980 0x40>;/* lane G */
217 - };
218 -};
219 -
220 -&pcs_mdio3 {
221 - pcs_phy3: ethernet-phy@0 {
222 - backplane-mode = "10gbase-kr";
223 - compatible = "ethernet-phy-ieee802.3-c45";
224 - reg = <0x0>;
225 - fsl,lane-handle = <&serdes1>;
226 - fsl,lane-reg = <0x940 0x40>;/* lane F */
227 - };
228 -};
229 -
230 -&pcs_mdio4 {
231 - pcs_phy4: ethernet-phy@0 {
232 - backplane-mode = "10gbase-kr";
233 - compatible = "ethernet-phy-ieee802.3-c45";
234 - reg = <0x0>;
235 - fsl,lane-handle = <&serdes1>;
236 - fsl,lane-reg = <0x900 0x40>;/* lane E */
237 - };
238 -};
239 -
240 -/* Update DPMAC connections to backplane PHYs, under SerDes 0x2a_0xXX.
241 - * &dpmac1 {
242 - * phy-handle = <&pcs_phy1>;
243 - * };
244 - *
245 - * &dpmac2 {
246 - * phy-handle = <&pcs_phy2>;
247 - * };
248 - *
249 - * &dpmac3 {
250 - * phy-handle = <&pcs_phy3>;
251 - * };
252 - *
253 - * &dpmac4 {
254 - * phy-handle = <&pcs_phy4>;
255 - * };
256 - */
257 -
258 /* Update DPMAC connections to external PHYs, under SerDes 0x2a_0x49. */
259 &dpmac9 {
260 phy-handle = <&mdio0_phy12>;
261 --- a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
262 +++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
263 @@ -550,90 +550,6 @@
264 #size-cells = <0>;
265 };
266
267 - pcs_mdio1: mdio@8c07000 {
268 - compatible = "fsl,fman-memac-mdio";
269 - reg = <0x0 0x8c07000 0x0 0x1000>;
270 - device_type = "mdio";
271 - little-endian;
272 -
273 - #address-cells = <1>;
274 - #size-cells = <0>;
275 - };
276 -
277 - pcs_mdio2: mdio@8c0b000 {
278 - compatible = "fsl,fman-memac-mdio";
279 - reg = <0x0 0x8c0b000 0x0 0x1000>;
280 - device_type = "mdio";
281 - little-endian;
282 -
283 - #address-cells = <1>;
284 - #size-cells = <0>;
285 - };
286 -
287 - pcs_mdio3: mdio@8c0f000 {
288 - compatible = "fsl,fman-memac-mdio";
289 - reg = <0x0 0x8c0f000 0x0 0x1000>;
290 - device_type = "mdio";
291 - little-endian;
292 -
293 - #address-cells = <1>;
294 - #size-cells = <0>;
295 - };
296 -
297 - pcs_mdio4: mdio@8c13000 {
298 - compatible = "fsl,fman-memac-mdio";
299 - reg = <0x0 0x8c13000 0x0 0x1000>;
300 - device_type = "mdio";
301 - little-endian;
302 -
303 - #address-cells = <1>;
304 - #size-cells = <0>;
305 - };
306 -
307 - pcs_mdio5: mdio@8c17000 {
308 - status = "disabled";
309 - compatible = "fsl,fman-memac-mdio";
310 - reg = <0x0 0x8c17000 0x0 0x1000>;
311 - device_type = "mdio";
312 - little-endian;
313 -
314 - #address-cells = <1>;
315 - #size-cells = <0>;
316 - };
317 -
318 - pcs_mdio6: mdio@8c1b000 {
319 - status = "disabled";
320 - compatible = "fsl,fman-memac-mdio";
321 - reg = <0x0 0x8c1b000 0x0 0x1000>;
322 - device_type = "mdio";
323 - little-endian;
324 -
325 - #address-cells = <1>;
326 - #size-cells = <0>;
327 - };
328 -
329 - pcs_mdio7: mdio@8c1f000 {
330 - status = "disabled";
331 - compatible = "fsl,fman-memac-mdio";
332 - reg = <0x0 0x8c1f000 0x0 0x1000>;
333 - device_type = "mdio";
334 - little-endian;
335 -
336 - #address-cells = <1>;
337 - #size-cells = <0>;
338 - };
339 -
340 - pcs_mdio8: mdio@8c23000 {
341 - status = "disabled";
342 - compatible = "fsl,fman-memac-mdio";
343 - reg = <0x0 0x8c23000 0x0 0x1000>;
344 - device_type = "mdio";
345 - little-endian;
346 -
347 - #address-cells = <1>;
348 - #size-cells = <0>;
349 - };
350 -
351 i2c0: i2c@2000000 {
352 status = "disabled";
353 compatible = "fsl,vf610-i2c", "fsl,ls208xa-vf610-i2c";
354 @@ -835,12 +751,6 @@
355 snps,host-vbus-glitches;
356 };
357
358 - serdes1: serdes@1ea0000 {
359 - compatible = "fsl,serdes-10g";
360 - reg = <0x0 0x1ea0000 0 0x00002000>;
361 - little-endian;
362 - };
363 -
364 ccn@4000000 {
365 compatible = "arm,ccn-504";
366 reg = <0x0 0x04000000 0x0 0x01000000>;
367 --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
368 +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
369 @@ -316,46 +316,6 @@
370 status = "okay";
371 };
372
373 -&pcs_mdio1 {
374 - pcs_phy1: ethernet-phy@0 {
375 - compatible = "ethernet-phy-ieee802.3-c45";
376 - backplane-mode = "40gbase-kr";
377 - reg = <0x0>;
378 - fsl,lane-handle = <&serdes1>;
379 - fsl,lane-reg = <0xF00 0xE00 0xD00 0xC00>; /* lanes H, G, F, E */
380 - };
381 -};
382 -
383 -&pcs_mdio2 {
384 - pcs_phy2: ethernet-phy@0 {
385 - compatible = "ethernet-phy-ieee802.3-c45";
386 - backplane-mode = "40gbase-kr";
387 - reg = <0x0>;
388 - fsl,lane-handle = <&serdes1>;
389 - fsl,lane-reg = <0xB00 0xA00 0x900 0x800>; /* lanes D, C, B, A */
390 - };
391 -};
392 -
393 -&pcs_mdio3 {
394 - pcs_phy3: ethernet-phy@0 {
395 - compatible = "ethernet-phy-ieee802.3-c45";
396 - backplane-mode = "10gbase-kr";
397 - reg = <0x0>;
398 - fsl,lane-handle = <&serdes1>;
399 - fsl,lane-reg = <0xF00 0x100>; /* lane H */
400 - };
401 -};
402 -
403 -&pcs_mdio4 {
404 - pcs_phy4: ethernet-phy@0 {
405 - compatible = "ethernet-phy-ieee802.3-c45";
406 - backplane-mode = "10gbase-kr";
407 - reg = <0x0>;
408 - fsl,lane-handle = <&serdes1>;
409 - fsl,lane-reg = <0xE00 0x100>; /* lane G */
410 - };
411 -};
412 -
413 &sata0 {
414 status = "okay";
415 };
416 @@ -371,23 +331,3 @@
417 &sata3 {
418 status = "okay";
419 };
420 -
421 -/* Update DPMAC connections to 40G backplane PHYs
422 - * &dpmac1 {
423 - * phy-handle = <&pcs_phy1>;
424 - * };
425 - *
426 - * &dpmac2 {
427 - * phy-handle = <&pcs_phy2>;
428 - * };
429 - */
430 -
431 -/* Update DPMAC connections to 10G backplane PHYs
432 - * &dpmac3 {
433 - * phy-handle = <&pcs_phy3>;
434 - * };
435 - *
436 - * &dpmac4 {
437 - * phy-handle = <&pcs_phy4>;
438 - * };
439 - */
440 --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
441 +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
442 @@ -500,92 +500,6 @@
443 status = "disabled";
444 };
445
446 - pcs_mdio1: mdio@8c07000 {
447 - compatible = "fsl,fman-memac-mdio";
448 - reg = <0x0 0x8c07000 0x0 0x1000>;
449 - device_type = "mdio";
450 - little-endian;
451 -
452 - #address-cells = <1>;
453 - #size-cells = <0>;
454 - };
455 -
456 - pcs_mdio2: mdio@8c0b000 {
457 - compatible = "fsl,fman-memac-mdio";
458 - reg = <0x0 0x8c0b000 0x0 0x1000>;
459 - device_type = "mdio";
460 - little-endian;
461 -
462 - #address-cells = <1>;
463 - #size-cells = <0>;
464 - };
465 -
466 - pcs_mdio3: mdio@8c0f000 {
467 - compatible = "fsl,fman-memac-mdio";
468 - reg = <0x0 0x8c0f000 0x0 0x1000>;
469 - device_type = "mdio";
470 - little-endian;
471 -
472 - #address-cells = <1>;
473 - #size-cells = <0>;
474 - };
475 -
476 - pcs_mdio4: mdio@8c13000 {
477 - compatible = "fsl,fman-memac-mdio";
478 - reg = <0x0 0x8c13000 0x0 0x1000>;
479 - device_type = "mdio";
480 - little-endian;
481 -
482 - #address-cells = <1>;
483 - #size-cells = <0>;
484 - };
485 -
486 - pcs_mdio5: mdio@8c17000 {
487 - compatible = "fsl,fman-memac-mdio";
488 - reg = <0x0 0x8c17000 0x0 0x1000>;
489 - device_type = "mdio";
490 - little-endian;
491 -
492 - #address-cells = <1>;
493 - #size-cells = <0>;
494 - };
495 -
496 - pcs_mdio6: mdio@8c1b000 {
497 - compatible = "fsl,fman-memac-mdio";
498 - reg = <0x0 0x8c1b000 0x0 0x1000>;
499 - device_type = "mdio";
500 - little-endian;
501 -
502 - #address-cells = <1>;
503 - #size-cells = <0>;
504 - };
505 -
506 - pcs_mdio7: mdio@8c1f000 {
507 - compatible = "fsl,fman-memac-mdio";
508 - reg = <0x0 0x8c1f000 0x0 0x1000>;
509 - device_type = "mdio";
510 - little-endian;
511 -
512 - #address-cells = <1>;
513 - #size-cells = <0>;
514 - };
515 -
516 - pcs_mdio8: mdio@8c23000 {
517 - compatible = "fsl,fman-memac-mdio";
518 - reg = <0x0 0x8c23000 0x0 0x1000>;
519 - device_type = "mdio";
520 - little-endian;
521 -
522 - #address-cells = <1>;
523 - #size-cells = <0>;
524 - };
525 -
526 - serdes1: serdes@1ea0000 {
527 - compatible = "fsl,serdes-28g";
528 - reg = <0x0 0x1ea0000 0 0x00002000>;
529 - little-endian;
530 - };
531 -
532 i2c0: i2c@2000000 {
533 compatible = "fsl,vf610-i2c";
534 #address-cells = <1>;
535 --- a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-0.dtsi
536 +++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-0.dtsi
537 @@ -22,7 +22,7 @@ fman@1a00000 {
538 fsl,qman-channel-id = <0x800>;
539 };
540
541 - mac9: ethernet@f0000 {
542 + ethernet@f0000 {
543 cell-index = <0x8>;
544 compatible = "fsl,fman-memac";
545 reg = <0xf0000 0x1000>;
546 @@ -30,7 +30,7 @@ fman@1a00000 {
547 pcsphy-handle = <&pcsphy6>;
548 };
549
550 - mdio9: mdio@f1000 {
551 + mdio@f1000 {
552 #address-cells = <1>;
553 #size-cells = <0>;
554 compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
555 --- a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-1.dtsi
556 +++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-1.dtsi
557 @@ -22,7 +22,7 @@ fman@1a00000 {
558 fsl,qman-channel-id = <0x801>;
559 };
560
561 - mac10: ethernet@f2000 {
562 + ethernet@f2000 {
563 cell-index = <0x9>;
564 compatible = "fsl,fman-memac";
565 reg = <0xf2000 0x1000>;
566 @@ -30,7 +30,7 @@ fman@1a00000 {
567 pcsphy-handle = <&pcsphy7>;
568 };
569
570 - mdio10: mdio@f3000 {
571 + mdio@f3000 {
572 #address-cells = <1>;
573 #size-cells = <0>;
574 compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
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