target/linux/layerscape/patches-5.4/701-net-0202-dpaa2-eth-Keep-congestion-group-taildrop-enabled-whe.patch

   1 From b58fa682dceaee9e2576f9ba3f36942c650414ae Mon Sep 17 00:00:00 2001
   2 From: Ioana Radulescu <ruxandra.radulescu@nxp.com>
   3 Date: Tue, 17 Sep 2019 21:14:04 +0300
   4 Subject: [PATCH] dpaa2-eth: Keep congestion group taildrop enabled when PFC on
   5
   6 Leave congestion group taildrop enabled for all traffic classes
   7 when PFC is enabled. Notification threshold is low enough such
   8 that it will be hit first and this also ensures that FQs on
   9 traffic classes which are not PFC enabled won't drain the buffer
  10 pool.
  11
  12 FQ taildrop threshold is kept disabled as long as any form of
  13 flow control is on. Since FQ taildrop works with bytes, not number
  14 of frames, we can't guarantee it will not interfere with the
  15 congestion notification mechanism for all frame sizes.
  16
  17 Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
  18 ---
  19  drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c | 35 ++++++++++++++++++------
  20  drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.h |  4 ++-
  21  2 files changed, 30 insertions(+), 9 deletions(-)
  22
  23 --- a/drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c
  24 +++ b/drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c
  25 @@ -1229,17 +1229,21 @@ static void disable_ch_napi(struct dpaa2
  26  }
  27
  28  static void dpaa2_eth_set_rx_taildrop(struct dpaa2_eth_priv *priv,
  29 -                                     bool tx_pause)
  30 +                                     bool tx_pause, bool pfc)
  31  {
  32         struct dpni_taildrop td = {0};
  33         struct dpaa2_eth_fq *fq;
  34         int i, err;
  35
  36 +       /* FQ taildrop: threshold is in bytes, per frame queue. Enabled if
  37 +        * flow control is disabled (as it might interfere with either the
  38 +        * buffer pool depletion trigger for pause frames or with the group
  39 +        * congestion trigger for PFC frames)
  40 +        */
  41         td.enable = !tx_pause;
  42 -       if (priv->rx_td_enabled == td.enable)
  43 -               return;
  44 +       if (priv->rx_fqtd_enabled == td.enable)
  45 +               goto set_cgtd;
  46
  47 -       /* FQ taildrop: thrshold is in bytes, per frame queue */
  48         td.threshold = DPAA2_ETH_FQ_TAILDROP_THRESH;
  49         td.units = DPNI_CONGESTION_UNIT_BYTES;
  50
  51 @@ -1257,9 +1261,20 @@ static void dpaa2_eth_set_rx_taildrop(st
  52                 }
  53         }
  54
  55 +       priv->rx_fqtd_enabled = td.enable;
  56 +
  57 +set_cgtd:
  58         /* Congestion group taildrop: threshold is in frames, per group
  59          * of FQs belonging to the same traffic class
  60 +        * Enabled if general Tx pause disabled or if PFCs are enabled
  61 +        * (congestion group threhsold for PFC generation is lower than the
  62 +        * CG taildrop threshold, so it won't interfere with it; we also
  63 +        * want frames in non-PFC enabled traffic classes to be kept in check)
  64          */
  65 +       td.enable = !tx_pause || (tx_pause && pfc);
  66 +       if (priv->rx_cgtd_enabled == td.enable)
  67 +               return;
  68 +
  69         td.threshold = DPAA2_ETH_CG_TAILDROP_THRESH(priv);
  70         td.units = DPNI_CONGESTION_UNIT_FRAMES;
  71         for (i = 0; i < dpaa2_eth_tc_count(priv); i++) {
  72 @@ -1273,7 +1288,7 @@ static void dpaa2_eth_set_rx_taildrop(st
  73                 }
  74         }
  75
  76 -       priv->rx_td_enabled = td.enable;
  77 +       priv->rx_cgtd_enabled = td.enable;
  78  }
  79
  80  static void update_tx_fqids(struct dpaa2_eth_priv *priv);
  81 @@ -1296,7 +1311,7 @@ static int link_state_update(struct dpaa
  82          * only when pause frame generation is disabled.
  83          */
  84         tx_pause = dpaa2_eth_tx_pause_enabled(state.options);
  85 -       dpaa2_eth_set_rx_taildrop(priv, tx_pause);
  86 +       dpaa2_eth_set_rx_taildrop(priv, tx_pause, priv->pfc_enabled);
  87
  88         /* Chech link state; speed / duplex changes are not treated yet */
  89         if (priv->link_state.up == state.up)
  90 @@ -3673,6 +3688,7 @@ static int dpaa2_eth_dcbnl_ieee_setpfc(s
  91  {
  92         struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
  93         struct dpni_link_cfg link_cfg = {0};
  94 +       bool tx_pause;
  95         int err;
  96
  97         if (pfc->mbc || pfc->delay)
  98 @@ -3685,8 +3701,8 @@ static int dpaa2_eth_dcbnl_ieee_setpfc(s
  99         /* We allow PFC configuration even if it won't have any effect until
 100          * general pause frames are enabled
 101          */
 102 -       if (!dpaa2_eth_rx_pause_enabled(priv->link_state.options) ||
 103 -           !dpaa2_eth_tx_pause_enabled(priv->link_state.options))
 104 +       tx_pause = dpaa2_eth_tx_pause_enabled(priv->link_state.options);
 105 +       if (!dpaa2_eth_rx_pause_enabled(priv->link_state.options) || !tx_pause)
 106                 netdev_warn(net_dev, "Pause support must be enabled in order for PFC to work!\n");
 107
 108         link_cfg.rate = priv->link_state.rate;
 109 @@ -3707,6 +3723,9 @@ static int dpaa2_eth_dcbnl_ieee_setpfc(s
 110                 return err;
 111
 112         memcpy(&priv->pfc, pfc, sizeof(priv->pfc));
 113 +       priv->pfc_enabled = !!pfc->pfc_en;
 114 +
 115 +       dpaa2_eth_set_rx_taildrop(priv, tx_pause, priv->pfc_enabled);
 116
 117         return 0;
 118  }
 119 --- a/drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.h
 120 +++ b/drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.h
 121 @@ -423,7 +423,8 @@ struct dpaa2_eth_priv {
 122         struct dpaa2_eth_drv_stats __percpu *percpu_extras;
 123
 124         u16 mc_token;
 125 -       u8 rx_td_enabled;
 126 +       u8 rx_fqtd_enabled;
 127 +       u8 rx_cgtd_enabled;
 128
 129         struct dpni_link_state link_state;
 130         bool do_link_poll;
 131 @@ -435,6 +436,7 @@ struct dpaa2_eth_priv {
 132         struct dpaa2_eth_cls_rule *cls_rules;
 133         u8 rx_cls_enabled;
 134         u8 vlan_cls_enabled;
 135 +       u8 pfc_enabled;
 136  #ifdef CONFIG_FSL_DPAA2_ETH_DCB
 137         u8 dcbx_mode;
 138         struct ieee_pfc pfc;