target/linux/layerscape/patches-5.4/812-pcie-0004-pci-add-support-aer-pme-interrupts-with-none-MSI-MSI.patch

   1 From dc17fd4b8c27ca47fb5d9113df715579bc4a04a3 Mon Sep 17 00:00:00 2001
   2 From: Po Liu <po.liu@nxp.com>
   3 Date: Fri, 30 Sep 2016 17:11:37 +0800
   4 Subject: [PATCH] pci:add support aer/pme interrupts with none MSI/MSI-X/INTx
   5  mode
   6
   7 On some platforms, root port doesn't support MSI/MSI-X/INTx in RC mode.
   8 When chip support the aer/pme interrupts with none MSI/MSI-X/INTx mode,
   9 maybe there is interrupt line for aer pme etc. Search the interrupt
  10 number in the fdt file. Then fixup the dev->irq with it.
  11
  12 Signed-off-by: Po Liu <po.liu@nxp.com>
  13 Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
  14 ---
  15  .../devicetree/bindings/pci/layerscape-pci.txt     | 13 +++++--
  16  arch/arm/kernel/bios32.c                           | 44 ++++++++++++++++++++++
  17  arch/arm64/kernel/pci.c                            | 44 ++++++++++++++++++++++
  18  drivers/pci/pcie/portdrv_core.c                    | 29 ++++++++++++++
  19  include/linux/pci.h                                |  1 +
  20  5 files changed, 127 insertions(+), 4 deletions(-)
  21
  22 --- a/Documentation/devicetree/bindings/pci/layerscape-pci.txt
  23 +++ b/Documentation/devicetree/bindings/pci/layerscape-pci.txt
  24 @@ -26,8 +26,12 @@ Required properties:
  25  - reg: base addresses and lengths of the PCIe controller register blocks.
  26  - interrupts: A list of interrupt outputs of the controller. Must contain an
  27    entry for each entry in the interrupt-names property.
  28 -- interrupt-names: Must include the following entries:
  29 -  "intr": The interrupt that is asserted for controller interrupts
  30 +- interrupt-names: It could include the following entries:
  31 +  "aer": Asserted for aer interrupt when chip support the aer interrupt with
  32 +                none MSI/MSI-X/INTx mode,but there is interrupt line for aer.
  33 +  "pme": Asserted for pme interrupt when chip support the pme interrupt with
  34 +                none MSI/MSI-X/INTx mode,but there is interrupt line for pme.
  35 +  ......
  36  - fsl,pcie-scfg: Must include two entries.
  37    The first entry must be a link to the SCFG device node
  38    The second entry must be '0' or '1' based on physical PCIe controller index.
  39 @@ -43,8 +47,9 @@ Example:
  40                 reg = <0x00 0x03400000 0x0 0x00010000   /* controller registers */
  41                        0x40 0x00000000 0x0 0x00002000>; /* configuration space */
  42                 reg-names = "regs", "config";
  43 -               interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */
  44 -               interrupt-names = "intr";
  45 +               interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>, /* aer interrupt */
  46 +                       <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>; /* pme interrupt */
  47 +               interrupt-names = "aer", "pme";
  48                 fsl,pcie-scfg = <&scfg 0>;
  49                 #address-cells = <3>;
  50                 #size-cells = <2>;
  51 --- a/arch/arm/kernel/bios32.c
  52 +++ b/arch/arm/kernel/bios32.c
  53 @@ -12,11 +12,14 @@
  54  #include <linux/slab.h>
  55  #include <linux/init.h>
  56  #include <linux/io.h>
  57 +#include <linux/of_irq.h>
  58
  59  #include <asm/mach-types.h>
  60  #include <asm/mach/map.h>
  61  #include <asm/mach/pci.h>
  62
  63 +#include "../../../drivers/pci/pcie/portdrv.h"
  64 +
  65  static int debug_pci;
  66
  67  /*
  68 @@ -65,6 +68,47 @@ void pcibios_report_status(u_int status_
  69  }
  70
  71  /*
  72 + * Check device tree if the service interrupts are there
  73 + */
  74 +int pcibios_check_service_irqs(struct pci_dev *dev, int *irqs, int mask)
  75 +{
  76 +       int ret, count = 0;
  77 +       struct device_node *np = NULL;
  78 +
  79 +       if (dev->bus->dev.of_node)
  80 +               np = dev->bus->dev.of_node;
  81 +
  82 +       if (np == NULL)
  83 +               return 0;
  84 +
  85 +       if (!IS_ENABLED(CONFIG_OF_IRQ))
  86 +               return 0;
  87 +
  88 +       /* If root port doesn't support MSI/MSI-X/INTx in RC mode,
  89 +        * request irq for aer
  90 +        */
  91 +       if (mask & PCIE_PORT_SERVICE_AER) {
  92 +               ret = of_irq_get_byname(np, "aer");
  93 +               if (ret > 0) {
  94 +                       irqs[PCIE_PORT_SERVICE_AER_SHIFT] = ret;
  95 +                       count++;
  96 +               }
  97 +       }
  98 +
  99 +       if (mask & PCIE_PORT_SERVICE_PME) {
 100 +               ret = of_irq_get_byname(np, "pme");
 101 +               if (ret > 0) {
 102 +                       irqs[PCIE_PORT_SERVICE_PME_SHIFT] = ret;
 103 +                       count++;
 104 +               }
 105 +       }
 106 +
 107 +       /* TODO: add more service interrupts if there it is in the device tree*/
 108 +
 109 +       return count;
 110 +}
 111 +
 112 +/*
 113   * We don't use this to fix the device, but initialisation of it.
 114   * It's not the correct use for this, but it works.
 115   * Note that the arbiter/ISA bridge appears to be buggy, specifically in
 116 --- a/arch/arm64/kernel/pci.c
 117 +++ b/arch/arm64/kernel/pci.c
 118 @@ -13,11 +13,14 @@
 119  #include <linux/mm.h>
 120  #include <linux/of_pci.h>
 121  #include <linux/of_platform.h>
 122 +#include <linux/of_irq.h>
 123  #include <linux/pci.h>
 124  #include <linux/pci-acpi.h>
 125  #include <linux/pci-ecam.h>
 126  #include <linux/slab.h>
 127
 128 +#include "../../../drivers/pci/pcie/portdrv.h"
 129 +
 130  #ifdef CONFIG_ACPI
 131  /*
 132   * Try to assign the IRQ number when probing a new device
 133 @@ -32,6 +35,47 @@ int pcibios_alloc_irq(struct pci_dev *de
 134  #endif
 135
 136  /*
 137 + * Check device tree if the service interrupts are there
 138 + */
 139 +int pcibios_check_service_irqs(struct pci_dev *dev, int *irqs, int mask)
 140 +{
 141 +       int ret, count = 0;
 142 +       struct device_node *np = NULL;
 143 +
 144 +       if (dev->bus->dev.of_node)
 145 +               np = dev->bus->dev.of_node;
 146 +
 147 +       if (np == NULL)
 148 +               return 0;
 149 +
 150 +       if (!IS_ENABLED(CONFIG_OF_IRQ))
 151 +               return 0;
 152 +
 153 +       /* If root port doesn't support MSI/MSI-X/INTx in RC mode,
 154 +        * request irq for aer
 155 +        */
 156 +       if (mask & PCIE_PORT_SERVICE_AER) {
 157 +               ret = of_irq_get_byname(np, "aer");
 158 +               if (ret > 0) {
 159 +                       irqs[PCIE_PORT_SERVICE_AER_SHIFT] = ret;
 160 +                       count++;
 161 +               }
 162 +       }
 163 +
 164 +       if (mask & PCIE_PORT_SERVICE_PME) {
 165 +               ret = of_irq_get_byname(np, "pme");
 166 +               if (ret > 0) {
 167 +                       irqs[PCIE_PORT_SERVICE_PME_SHIFT] = ret;
 168 +                       count++;
 169 +               }
 170 +       }
 171 +
 172 +       /* TODO: add more service interrupts if there it is in the device tree*/
 173 +
 174 +       return count;
 175 +}
 176 +
 177 +/*
 178   * raw_pci_read/write - Platform-specific PCI config space access.
 179   */
 180  int raw_pci_read(unsigned int domain, unsigned int bus,
 181 --- a/drivers/pci/pcie/portdrv_core.c
 182 +++ b/drivers/pci/pcie/portdrv_core.c
 183 @@ -37,6 +37,20 @@ static void release_pcie_device(struct d
 184         kfree(to_pcie_device(dev));
 185  }
 186
 187 +/**
 188 + * pcibios_check_service_irqs - check irqs in the device tree
 189 + * @dev: PCI Express port to handle
 190 + * @irqs: Array of irqs to populate
 191 + * @mask: Bitmask of port capabilities returned by get_port_device_capability()
 192 + *
 193 + * Return value: 0 means no service irqs in the device tree
 194 + *
 195 + */
 196 +int __weak pcibios_check_service_irqs(struct pci_dev *dev, int *irqs, int mask)
 197 +{
 198 +       return 0;
 199 +}
 200 +
 201  /*
 202   * Fill in *pme, *aer, *dpc with the relevant Interrupt Message Numbers if
 203   * services are enabled in "mask".  Return the number of MSI/MSI-X vectors
 204 @@ -165,10 +179,25 @@ static int pcie_port_enable_irq_vec(stru
 205  static int pcie_init_service_irqs(struct pci_dev *dev, int *irqs, int mask)
 206  {
 207         int ret, i;
 208 +       int irq = -1;
 209
 210         for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++)
 211                 irqs[i] = -1;
 212
 213 +       /* Check if some platforms owns independent irq pins for AER/PME etc.
 214 +        * Some platforms may own independent AER/PME interrupts and set
 215 +        * them in the device tree file.
 216 +        */
 217 +       ret = pcibios_check_service_irqs(dev, irqs, mask);
 218 +       if (ret) {
 219 +               if (dev->irq)
 220 +                       irq = dev->irq;
 221 +               for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++)
 222 +                       if (irqs[i] == -1)
 223 +                               irqs[i] = irq;
 224 +               return 0;
 225 +       }
 226 +
 227         /*
 228          * If we support PME but can't use MSI/MSI-X for it, we have to
 229          * fall back to INTx or other interrupts, e.g., a system shared
 230 --- a/include/linux/pci.h
 231 +++ b/include/linux/pci.h
 232 @@ -2021,6 +2021,7 @@ static inline void pcibios_penalize_isa_
 233  int pcibios_alloc_irq(struct pci_dev *dev);
 234  void pcibios_free_irq(struct pci_dev *dev);
 235  resource_size_t pcibios_default_alignment(void);
 236 +int pcibios_check_service_irqs(struct pci_dev *dev, int *irqs, int mask);
 237
 238  #ifdef CONFIG_HIBERNATE_CALLBACKS
 239  extern struct dev_pm_ops pcibios_pm_ops;