mediatek: fix mt7530 mcm reset
[openwrt/openwrt.git] / target / linux / mediatek / files / arch / arm / boot / dts / mt7623-NAND-ePHY.dts
1 /*
2 * Copyright (c) 2016 MediaTek Inc.
3 * Author: John Crispin <blogic@openwrt.org>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 */
14
15 /dts-v1/;
16
17 #include "_mt7623.dtsi"
18 #include <dt-bindings/gpio/gpio.h>
19
20 / {
21 model = "MediaTek MT7623 NAND reference board";
22 compatible = "mediatek,mt7623-rfb-nand-ephy", "mediatek,mt7623";
23
24 chosen {
25 stdout-path = &uart2;
26 };
27
28 memory {
29 reg = <0 0x80000000 0 0x20000000>;
30 };
31
32 usb_p1_vbus: regulator@0 {
33 compatible = "regulator-fixed";
34 regulator-name = "usb_vbus";
35 regulator-min-microvolt = <5000000>;
36 regulator-max-microvolt = <5000000>;
37 gpio = <&pio 135 GPIO_ACTIVE_HIGH>;
38 enable-active-high;
39 };
40 };
41
42 &cpu0 {
43 proc-supply = <&mt6323_vproc_reg>;
44 };
45
46 &cpu1 {
47 proc-supply = <&mt6323_vproc_reg>;
48 };
49
50 &cpu2 {
51 proc-supply = <&mt6323_vproc_reg>;
52 };
53
54 &cpu3 {
55 proc-supply = <&mt6323_vproc_reg>;
56 };
57
58 &pwrap {
59 pmic: mt6323 {
60 compatible = "mediatek,mt6323";
61 interrupt-parent = <&pio>;
62 interrupts = <150 IRQ_TYPE_LEVEL_HIGH>;
63 interrupt-controller;
64 #interrupt-cells = <2>;
65
66 mt6323regulator: mt6323regulator{
67 compatible = "mediatek,mt6323-regulator";
68
69 mt6323_vproc_reg: buck_vproc{
70 regulator-name = "vproc";
71 regulator-min-microvolt = < 700000>;
72 regulator-max-microvolt = <1350000>;
73 regulator-ramp-delay = <12500>;
74 regulator-always-on;
75 regulator-boot-on;
76 };
77
78 mt6323_vsys_reg: buck_vsys{
79 regulator-name = "vsys";
80 regulator-min-microvolt = <1400000>;
81 regulator-max-microvolt = <2987500>;
82 regulator-ramp-delay = <25000>;
83 regulator-always-on;
84 regulator-boot-on;
85 };
86
87 mt6323_vpa_reg: buck_vpa{
88 regulator-name = "vpa";
89 regulator-min-microvolt = < 500000>;
90 regulator-max-microvolt = <3650000>;
91 };
92
93 mt6323_vtcxo_reg: ldo_vtcxo{
94 regulator-name = "vtcxo";
95 regulator-min-microvolt = <2800000>;
96 regulator-max-microvolt = <2800000>;
97 regulator-enable-ramp-delay = <90>;
98 regulator-always-on;
99 regulator-boot-on;
100 };
101
102 mt6323_vcn28_reg: ldo_vcn28{
103 regulator-name = "vcn28";
104 regulator-min-microvolt = <2800000>;
105 regulator-max-microvolt = <2800000>;
106 regulator-enable-ramp-delay = <185>;
107 };
108
109 mt6323_vcn33_bt_reg: ldo_vcn33_bt{
110 regulator-name = "vcn33_bt";
111 regulator-min-microvolt = <3300000>;
112 regulator-max-microvolt = <3600000>;
113 regulator-enable-ramp-delay = <185>;
114 };
115
116 mt6323_vcn33_wifi_reg: ldo_vcn33_wifi{
117 regulator-name = "vcn33_wifi";
118 regulator-min-microvolt = <3300000>;
119 regulator-max-microvolt = <3600000>;
120 regulator-enable-ramp-delay = <185>;
121 };
122
123 mt6323_va_reg: ldo_va{
124 regulator-name = "va";
125 regulator-min-microvolt = <2800000>;
126 regulator-max-microvolt = <2800000>;
127 regulator-enable-ramp-delay = <216>;
128 regulator-always-on;
129 regulator-boot-on;
130 };
131
132 mt6323_vcama_reg: ldo_vcama{
133 regulator-name = "vcama";
134 regulator-min-microvolt = <1500000>;
135 regulator-max-microvolt = <2800000>;
136 regulator-enable-ramp-delay = <216>;
137 };
138
139 mt6323_vio28_reg: ldo_vio28{
140 regulator-name = "vio28";
141 regulator-min-microvolt = <2800000>;
142 regulator-max-microvolt = <2800000>;
143 regulator-enable-ramp-delay = <216>;
144 regulator-always-on;
145 regulator-boot-on;
146 };
147
148 mt6323_vusb_reg: ldo_vusb{
149 regulator-name = "vusb";
150 regulator-min-microvolt = <3300000>;
151 regulator-max-microvolt = <3300000>;
152 regulator-enable-ramp-delay = <216>;
153 regulator-boot-on;
154 };
155
156 mt6323_vmc_reg: ldo_vmc{
157 regulator-name = "vmc";
158 regulator-min-microvolt = <1800000>;
159 regulator-max-microvolt = <3300000>;
160 regulator-enable-ramp-delay = <36>;
161 regulator-boot-on;
162 };
163
164 mt6323_vmch_reg: ldo_vmch{
165 regulator-name = "vmch";
166 regulator-min-microvolt = <3000000>;
167 regulator-max-microvolt = <3300000>;
168 regulator-enable-ramp-delay = <36>;
169 regulator-boot-on;
170 };
171
172 mt6323_vemc3v3_reg: ldo_vemc3v3{
173 regulator-name = "vemc3v3";
174 regulator-min-microvolt = <3000000>;
175 regulator-max-microvolt = <3300000>;
176 regulator-enable-ramp-delay = <36>;
177 regulator-boot-on;
178 };
179
180 mt6323_vgp1_reg: ldo_vgp1{
181 regulator-name = "vgp1";
182 regulator-min-microvolt = <1200000>;
183 regulator-max-microvolt = <3300000>;
184 regulator-enable-ramp-delay = <216>;
185 };
186
187 mt6323_vgp2_reg: ldo_vgp2{
188 regulator-name = "vgp2";
189 regulator-min-microvolt = <1200000>;
190 regulator-max-microvolt = <3000000>;
191 regulator-enable-ramp-delay = <216>;
192 };
193
194 mt6323_vgp3_reg: ldo_vgp3{
195 regulator-name = "vgp3";
196 regulator-min-microvolt = <1200000>;
197 regulator-max-microvolt = <1800000>;
198 regulator-enable-ramp-delay = <216>;
199 };
200
201 mt6323_vcn18_reg: ldo_vcn18{
202 regulator-name = "vcn18";
203 regulator-min-microvolt = <1800000>;
204 regulator-max-microvolt = <1800000>;
205 regulator-enable-ramp-delay = <216>;
206 };
207
208 mt6323_vsim1_reg: ldo_vsim1{
209 regulator-name = "vsim1";
210 regulator-min-microvolt = <1800000>;
211 regulator-max-microvolt = <3000000>;
212 regulator-enable-ramp-delay = <216>;
213 };
214
215 mt6323_vsim2_reg: ldo_vsim2{
216 regulator-name = "vsim2";
217 regulator-min-microvolt = <1800000>;
218 regulator-max-microvolt = <3000000>;
219 regulator-enable-ramp-delay = <216>;
220 };
221
222 mt6323_vrtc_reg: ldo_vrtc{
223 regulator-name = "vrtc";
224 regulator-min-microvolt = <2800000>;
225 regulator-max-microvolt = <2800000>;
226 regulator-always-on;
227 regulator-boot-on;
228 };
229
230 mt6323_vcamaf_reg: ldo_vcamaf{
231 regulator-name = "vcamaf";
232 regulator-min-microvolt = <1200000>;
233 regulator-max-microvolt = <3300000>;
234 regulator-enable-ramp-delay = <216>;
235 };
236
237 mt6323_vibr_reg: ldo_vibr{
238 regulator-name = "vibr";
239 regulator-min-microvolt = <1200000>;
240 regulator-max-microvolt = <3300000>;
241 regulator-enable-ramp-delay = <36>;
242 };
243
244 mt6323_vrf18_reg: ldo_vrf18{
245 regulator-name = "vrf18";
246 regulator-min-microvolt = <1825000>;
247 regulator-max-microvolt = <1825000>;
248 regulator-enable-ramp-delay = <187>;
249 };
250
251 mt6323_vm_reg: ldo_vm{
252 regulator-name = "vm";
253 regulator-min-microvolt = <1200000>;
254 regulator-max-microvolt = <1800000>;
255 regulator-enable-ramp-delay = <216>;
256 regulator-always-on;
257 regulator-boot-on;
258 };
259
260 mt6323_vio18_reg: ldo_vio18{
261 regulator-name = "vio18";
262 regulator-min-microvolt = <1800000>;
263 regulator-max-microvolt = <1800000>;
264 regulator-enable-ramp-delay = <216>;
265 regulator-always-on;
266 regulator-boot-on;
267 };
268
269 mt6323_vcamd_reg: ldo_vcamd{
270 regulator-name = "vcamd";
271 regulator-min-microvolt = <1200000>;
272 regulator-max-microvolt = <1800000>;
273 regulator-enable-ramp-delay = <216>;
274 };
275
276 mt6323_vcamio_reg: ldo_vcamio{
277 regulator-name = "vcamio";
278 regulator-min-microvolt = <1800000>;
279 regulator-max-microvolt = <1800000>;
280 regulator-enable-ramp-delay = <216>;
281 };
282 };
283
284 mt6323led: leds {
285 compatible = "mediatek,mt6323-led";
286 #address-cells = <1>;
287 #size-cells = <0>;
288
289 led@0 {
290 reg = <0>;
291 label = "LED0";
292 linux,default-trigger = "timer";
293 default-state = "on";
294 };
295 led@1 {
296 reg = <1>;
297 label = "LED1";
298 default-state = "off";
299 };
300 led@2 {
301 reg = <2>;
302 label = "LED2";
303 default-state = "on";
304 };
305 led@3 {
306 reg = <3>;
307 label = "LED3";
308 default-state = "on";
309 };
310 };
311 };
312 };
313
314 &uart2 {
315 status = "okay";
316 };
317
318 &pio {
319 nand_pins_default: nanddefault {
320 pins_dat {
321 pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_NLD7>,
322 <MT7623_PIN_112_MSDC0_DAT6_FUNC_NLD6>,
323 <MT7623_PIN_114_MSDC0_DAT4_FUNC_NLD4>,
324 <MT7623_PIN_118_MSDC0_DAT3_FUNC_NLD3>,
325 <MT7623_PIN_121_MSDC0_DAT0_FUNC_NLD0>,
326 <MT7623_PIN_120_MSDC0_DAT1_FUNC_NLD1>,
327 <MT7623_PIN_113_MSDC0_DAT5_FUNC_NLD5>,
328 <MT7623_PIN_115_MSDC0_RSTB_FUNC_NLD8>,
329 <MT7623_PIN_119_MSDC0_DAT2_FUNC_NLD2>;
330 input-enable;
331 drive-strength = <MTK_DRIVE_8mA>;
332 bias-pull-up;
333 };
334
335 pins_we {
336 pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_NWEB>;
337 drive-strength = <MTK_DRIVE_8mA>;
338 bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
339 };
340
341 pins_ale {
342 pinmux = <MT7623_PIN_116_MSDC0_CMD_FUNC_NALE>;
343 drive-strength = <MTK_DRIVE_8mA>;
344 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
345 };
346 };
347
348 eth_default: eth {
349 pins_eth {
350 pinmux = <MT7623_PIN_275_G2_MDC_FUNC_MDC>,
351 <MT7623_PIN_276_G2_MDIO_FUNC_MDIO>,
352 <MT7623_PIN_262_G2_TXEN_FUNC_G2_TXEN>,
353 <MT7623_PIN_263_G2_TXD3_FUNC_G2_TXD3>,
354 <MT7623_PIN_264_G2_TXD2_FUNC_G2_TXD2>,
355 <MT7623_PIN_265_G2_TXD1_FUNC_G2_TXD1>,
356 <MT7623_PIN_266_G2_TXD0_FUNC_G2_TXD0>,
357 <MT7623_PIN_267_G2_TXCLK_FUNC_G2_TXC>,
358 <MT7623_PIN_268_G2_RXCLK_FUNC_G2_RXC>,
359 <MT7623_PIN_269_G2_RXD0_FUNC_G2_RXD0>,
360 <MT7623_PIN_270_G2_RXD1_FUNC_G2_RXD1>,
361 <MT7623_PIN_271_G2_RXD2_FUNC_G2_RXD2>,
362 <MT7623_PIN_272_G2_RXD3_FUNC_G2_RXD3>,
363 <MT7623_PIN_274_G2_RXDV_FUNC_G2_RXDV>;
364 };
365
366 pins_eth_esw {
367 pinmux = <MT7623_PIN_273_ESW_INT_FUNC_ESW_INT>;
368 input-enable;
369 drive-strength = <MTK_DRIVE_8mA>;
370 bias-pull-up;
371 };
372
373 pins_eth_rst {
374 pinmux = <MT7623_PIN_15_GPIO15_FUNC_GPIO15>;
375 output-low;
376 };
377 };
378
379 pwm_pins: pwm {
380 pins_pwm1 {
381 pinmux = <MT7623_PIN_204_PWM1_FUNC_PWM1>;
382 };
383
384 pins_pwm2 {
385 pinmux = <MT7623_PIN_205_PWM2_FUNC_PWM2>;
386 };
387 };
388 };
389
390 &nandc {
391 status = "okay";
392 pinctrl-names = "default";
393 pinctrl-0 = <&nand_pins_default>;
394 nand@0 {
395 reg = <0>;
396 spare_per_sector = <64>;
397 nand-ecc-mode = "hw";
398 nand-ecc-strength = <12>;
399 nand-ecc-step-size = <1024>;
400 partitions {
401 compatible = "fixed-partitions";
402 #address-cells = <1>;
403 #size-cells = <1>;
404
405 partition@C0000 {
406 label = "uboot-env";
407 reg = <0xC0000 0x40000>;
408 };
409
410 partition@100000 {
411 label = "factory";
412 reg = <0x100000 0x40000>;
413 };
414
415 partition@140000 {
416 label = "kernel";
417 reg = <0x140000 0x2000000>;
418 };
419
420 partition@2140000 {
421 label = "recovery";
422 reg = <0x2140000 0x2000000>;
423 };
424
425 partition@4140000 {
426 label = "ubi";
427 reg = <0x4140000 0x1000000>;
428 };
429 };
430 };
431 };
432 &bch {
433 status = "okay";
434 };
435
436 &usb1 {
437 vusb33-supply = <&mt6323_vusb_reg>;
438 vbus-supply = <&usb_p1_vbus>;
439 status = "okay";
440 };
441
442 &u3phy1 {
443 status = "okay";
444 };
445
446 &pcie {
447 status = "okay";
448 };
449
450 &eth {
451 status = "okay";
452 };
453
454 &gmac1 {
455 mac-address = [00 11 22 33 44 56];
456 status = "okay";
457 };
458
459 &gmac2 {
460 mac-address = [00 11 22 33 44 55];
461 status = "okay";
462
463 phy-handle = <&phy5>;
464 };
465
466 &mdio0 {
467 switch@0 {
468 compatible = "mediatek,mt7530";
469 #address-cells = <1>;
470 #size-cells = <0>;
471 reg = <0>;
472
473 pinctrl-names = "default";
474 pinctrl-0 = <&eth_default>;
475
476 core-supply = <&mt6323_vpa_reg>;
477 io-supply = <&mt6323_vemc3v3_reg>;
478
479 mediatek,mcm;
480 resets = <&ethsys 2>;
481 reset-names = "mcm";
482
483 ports {
484 #address-cells = <1>;
485 #size-cells = <0>;
486 reg = <0>;
487 port@0 {
488 reg = <0>;
489 label = "lan0";
490 };
491
492 port@1 {
493 reg = <1>;
494 label = "lan1";
495 };
496
497 port@2 {
498 reg = <2>;
499 label = "lan2";
500 };
501
502 port@3 {
503 reg = <3>;
504 label = "lan3";
505 };
506
507 port@6 {
508 reg = <6>;
509 label = "cpu";
510 ethernet = <&gmac1>;
511 phy-mode = "trgmii";
512 fixed-link {
513 speed = <1000>;
514 full-duplex;
515 };
516 };
517 };
518 };
519
520 phy5: ethernet-phy@5 {
521 reg = <5>;
522 phy-mode = "rgmii-rxid";
523 };
524 };
525
526 &pwm {
527 pinctrl-names = "default";
528 pinctrl-0 = <&pwm_pins>;
529 status = "okay";
530 };