be7bced254b1a6a31565eac1fd38dc6759d9e723
[openwrt/openwrt.git] / target / linux / mediatek / files / arch / arm / boot / dts / mt7623-eMMC.dts
1 /*
2 * Copyright (c) 2016 MediaTek Inc.
3 * Author: John Crispin <blogic@openwrt.org>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 */
14
15 /dts-v1/;
16
17 #include "_mt7623.dtsi"
18 #include <dt-bindings/gpio/gpio.h>
19
20 / {
21 model = "MediaTek MT7623 eMMC reference board";
22 compatible = "mediatek,mt7623-rfb-emmc", "mediatek,mt7623";
23
24 chosen {
25 stdout-path = &uart2;
26 bootargs = "earlyprintk block2mtd.block2mtd=/dev/mmcblk0,65536,eMMC,5 mtdparts=eMMC:256k(mbr)ro,512k(uboot)ro,256k(config)ro,256k(factory)ro,32M(kernel),32M(recovery),1024M(rootfs),2048M(usrdata),-(bmtpool) rootfstype=squashfs,jffs2";
27 };
28
29 memory {
30 reg = <0 0x80000000 0 0x20000000>;
31 };
32
33 usb_p1_vbus: regulator@0 {
34 compatible = "regulator-fixed";
35 regulator-name = "usb_vbus";
36 regulator-min-microvolt = <5000000>;
37 regulator-max-microvolt = <5000000>;
38 gpio = <&pio 135 GPIO_ACTIVE_HIGH>;
39 enable-active-high;
40 };
41 };
42
43 &cpu0 {
44 proc-supply = <&mt6323_vproc_reg>;
45 };
46
47 &cpu1 {
48 proc-supply = <&mt6323_vproc_reg>;
49 };
50
51 &cpu2 {
52 proc-supply = <&mt6323_vproc_reg>;
53 };
54
55 &cpu3 {
56 proc-supply = <&mt6323_vproc_reg>;
57 };
58
59 &pwrap {
60 pmic: mt6323 {
61 compatible = "mediatek,mt6323";
62 interrupt-parent = <&pio>;
63 interrupts = <150 IRQ_TYPE_LEVEL_HIGH>;
64 interrupt-controller;
65 #interrupt-cells = <2>;
66
67 mt6323regulator: mt6323regulator{
68 compatible = "mediatek,mt6323-regulator";
69
70 mt6323_vproc_reg: buck_vproc{
71 regulator-name = "vproc";
72 regulator-min-microvolt = < 700000>;
73 regulator-max-microvolt = <1350000>;
74 regulator-ramp-delay = <12500>;
75 regulator-always-on;
76 regulator-boot-on;
77 };
78
79 mt6323_vsys_reg: buck_vsys{
80 regulator-name = "vsys";
81 regulator-min-microvolt = <1400000>;
82 regulator-max-microvolt = <2987500>;
83 regulator-ramp-delay = <25000>;
84 regulator-always-on;
85 regulator-boot-on;
86 };
87
88 mt6323_vpa_reg: buck_vpa{
89 regulator-name = "vpa";
90 regulator-min-microvolt = < 500000>;
91 regulator-max-microvolt = <3650000>;
92 };
93
94 mt6323_vtcxo_reg: ldo_vtcxo{
95 regulator-name = "vtcxo";
96 regulator-min-microvolt = <2800000>;
97 regulator-max-microvolt = <2800000>;
98 regulator-enable-ramp-delay = <90>;
99 regulator-always-on;
100 regulator-boot-on;
101 };
102
103 mt6323_vcn28_reg: ldo_vcn28{
104 regulator-name = "vcn28";
105 regulator-min-microvolt = <2800000>;
106 regulator-max-microvolt = <2800000>;
107 regulator-enable-ramp-delay = <185>;
108 };
109
110 mt6323_vcn33_bt_reg: ldo_vcn33_bt{
111 regulator-name = "vcn33_bt";
112 regulator-min-microvolt = <3300000>;
113 regulator-max-microvolt = <3600000>;
114 regulator-enable-ramp-delay = <185>;
115 };
116
117 mt6323_vcn33_wifi_reg: ldo_vcn33_wifi{
118 regulator-name = "vcn33_wifi";
119 regulator-min-microvolt = <3300000>;
120 regulator-max-microvolt = <3600000>;
121 regulator-enable-ramp-delay = <185>;
122 };
123
124 mt6323_va_reg: ldo_va{
125 regulator-name = "va";
126 regulator-min-microvolt = <2800000>;
127 regulator-max-microvolt = <2800000>;
128 regulator-enable-ramp-delay = <216>;
129 regulator-always-on;
130 regulator-boot-on;
131 };
132
133 mt6323_vcama_reg: ldo_vcama{
134 regulator-name = "vcama";
135 regulator-min-microvolt = <1500000>;
136 regulator-max-microvolt = <2800000>;
137 regulator-enable-ramp-delay = <216>;
138 };
139
140 mt6323_vio28_reg: ldo_vio28{
141 regulator-name = "vio28";
142 regulator-min-microvolt = <2800000>;
143 regulator-max-microvolt = <2800000>;
144 regulator-enable-ramp-delay = <216>;
145 regulator-always-on;
146 regulator-boot-on;
147 };
148
149 mt6323_vusb_reg: ldo_vusb{
150 regulator-name = "vusb";
151 regulator-min-microvolt = <3300000>;
152 regulator-max-microvolt = <3300000>;
153 regulator-enable-ramp-delay = <216>;
154 regulator-boot-on;
155 };
156
157 mt6323_vmc_reg: ldo_vmc{
158 regulator-name = "vmc";
159 regulator-min-microvolt = <1800000>;
160 regulator-max-microvolt = <3300000>;
161 regulator-enable-ramp-delay = <36>;
162 regulator-boot-on;
163 };
164
165 mt6323_vmch_reg: ldo_vmch{
166 regulator-name = "vmch";
167 regulator-min-microvolt = <3000000>;
168 regulator-max-microvolt = <3300000>;
169 regulator-enable-ramp-delay = <36>;
170 regulator-boot-on;
171 };
172
173 mt6323_vemc3v3_reg: ldo_vemc3v3{
174 regulator-name = "vemc3v3";
175 regulator-min-microvolt = <3000000>;
176 regulator-max-microvolt = <3300000>;
177 regulator-enable-ramp-delay = <36>;
178 regulator-boot-on;
179 };
180
181 mt6323_vgp1_reg: ldo_vgp1{
182 regulator-name = "vgp1";
183 regulator-min-microvolt = <1200000>;
184 regulator-max-microvolt = <3300000>;
185 regulator-enable-ramp-delay = <216>;
186 };
187
188 mt6323_vgp2_reg: ldo_vgp2{
189 regulator-name = "vgp2";
190 regulator-min-microvolt = <1200000>;
191 regulator-max-microvolt = <3000000>;
192 regulator-enable-ramp-delay = <216>;
193 };
194
195 mt6323_vgp3_reg: ldo_vgp3{
196 regulator-name = "vgp3";
197 regulator-min-microvolt = <1200000>;
198 regulator-max-microvolt = <1800000>;
199 regulator-enable-ramp-delay = <216>;
200 };
201
202 mt6323_vcn18_reg: ldo_vcn18{
203 regulator-name = "vcn18";
204 regulator-min-microvolt = <1800000>;
205 regulator-max-microvolt = <1800000>;
206 regulator-enable-ramp-delay = <216>;
207 };
208
209 mt6323_vsim1_reg: ldo_vsim1{
210 regulator-name = "vsim1";
211 regulator-min-microvolt = <1800000>;
212 regulator-max-microvolt = <3000000>;
213 regulator-enable-ramp-delay = <216>;
214 };
215
216 mt6323_vsim2_reg: ldo_vsim2{
217 regulator-name = "vsim2";
218 regulator-min-microvolt = <1800000>;
219 regulator-max-microvolt = <3000000>;
220 regulator-enable-ramp-delay = <216>;
221 };
222
223 mt6323_vrtc_reg: ldo_vrtc{
224 regulator-name = "vrtc";
225 regulator-min-microvolt = <2800000>;
226 regulator-max-microvolt = <2800000>;
227 regulator-always-on;
228 regulator-boot-on;
229 };
230
231 mt6323_vcamaf_reg: ldo_vcamaf{
232 regulator-name = "vcamaf";
233 regulator-min-microvolt = <1200000>;
234 regulator-max-microvolt = <3300000>;
235 regulator-enable-ramp-delay = <216>;
236 };
237
238 mt6323_vibr_reg: ldo_vibr{
239 regulator-name = "vibr";
240 regulator-min-microvolt = <1200000>;
241 regulator-max-microvolt = <3300000>;
242 regulator-enable-ramp-delay = <36>;
243 };
244
245 mt6323_vrf18_reg: ldo_vrf18{
246 regulator-name = "vrf18";
247 regulator-min-microvolt = <1825000>;
248 regulator-max-microvolt = <1825000>;
249 regulator-enable-ramp-delay = <187>;
250 };
251
252 mt6323_vm_reg: ldo_vm{
253 regulator-name = "vm";
254 regulator-min-microvolt = <1200000>;
255 regulator-max-microvolt = <1800000>;
256 regulator-enable-ramp-delay = <216>;
257 regulator-always-on;
258 regulator-boot-on;
259 };
260
261 mt6323_vio18_reg: ldo_vio18{
262 regulator-name = "vio18";
263 regulator-min-microvolt = <1800000>;
264 regulator-max-microvolt = <1800000>;
265 regulator-enable-ramp-delay = <216>;
266 regulator-always-on;
267 regulator-boot-on;
268 };
269
270 mt6323_vcamd_reg: ldo_vcamd{
271 regulator-name = "vcamd";
272 regulator-min-microvolt = <1200000>;
273 regulator-max-microvolt = <1800000>;
274 regulator-enable-ramp-delay = <216>;
275 };
276
277 mt6323_vcamio_reg: ldo_vcamio{
278 regulator-name = "vcamio";
279 regulator-min-microvolt = <1800000>;
280 regulator-max-microvolt = <1800000>;
281 regulator-enable-ramp-delay = <216>;
282 };
283 };
284 };
285 };
286
287 &uart2 {
288 status = "okay";
289 };
290
291 &mmc0 {
292 status = "okay";
293 pinctrl-names = "default", "state_uhs";
294 pinctrl-0 = <&mmc0_pins_default>;
295 pinctrl-1 = <&mmc0_pins_uhs>;
296 bus-width = <8>;
297 max-frequency = <50000000>;
298 cap-mmc-highspeed;
299 vmmc-supply = <&mt6323_vemc3v3_reg>;
300 vqmmc-supply = <&mt6323_vio18_reg>;
301 non-removable;
302 };
303
304 &mmc1 {
305 status = "okay";
306 pinctrl-names = "default", "state_uhs";
307 pinctrl-0 = <&mmc1_pins_default>;
308 pinctrl-1 = <&mmc1_pins_uhs>;
309 bus-width = <4>;
310 max-frequency = <50000000>;
311 cap-sd-highspeed;
312 sd-uhs-sdr25;
313 // cd-gpios = <&pio 132 0>;
314 vmmc-supply = <&mt6323_vmch_reg>;
315 vqmmc-supply = <&mt6323_vmc_reg>;
316 };
317
318 &pio {
319 mmc0_pins_default: mmc0default {
320 pins_cmd_dat {
321 pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_MSDC0_DAT7>,
322 <MT7623_PIN_112_MSDC0_DAT6_FUNC_MSDC0_DAT6>,
323 <MT7623_PIN_113_MSDC0_DAT5_FUNC_MSDC0_DAT5>,
324 <MT7623_PIN_114_MSDC0_DAT4_FUNC_MSDC0_DAT4>,
325 <MT7623_PIN_118_MSDC0_DAT3_FUNC_MSDC0_DAT3>,
326 <MT7623_PIN_119_MSDC0_DAT2_FUNC_MSDC0_DAT2>,
327 <MT7623_PIN_120_MSDC0_DAT1_FUNC_MSDC0_DAT1>,
328 <MT7623_PIN_121_MSDC0_DAT0_FUNC_MSDC0_DAT0>,
329 <MT7623_PIN_116_MSDC0_CMD_FUNC_MSDC0_CMD>;
330 input-enable;
331 bias-pull-up;
332 };
333
334 pins_clk {
335 pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_MSDC0_CLK>;
336 bias-pull-down;
337 };
338
339 pins_rst {
340 pinmux = <MT7623_PIN_115_MSDC0_RSTB_FUNC_MSDC0_RSTB>;
341 bias-pull-up;
342 };
343 };
344
345 mmc0_pins_uhs: mmc0 {
346 pins_cmd_dat {
347 pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_MSDC0_DAT7>,
348 <MT7623_PIN_112_MSDC0_DAT6_FUNC_MSDC0_DAT6>,
349 <MT7623_PIN_113_MSDC0_DAT5_FUNC_MSDC0_DAT5>,
350 <MT7623_PIN_114_MSDC0_DAT4_FUNC_MSDC0_DAT4>,
351 <MT7623_PIN_118_MSDC0_DAT3_FUNC_MSDC0_DAT3>,
352 <MT7623_PIN_119_MSDC0_DAT2_FUNC_MSDC0_DAT2>,
353 <MT7623_PIN_120_MSDC0_DAT1_FUNC_MSDC0_DAT1>,
354 <MT7623_PIN_121_MSDC0_DAT0_FUNC_MSDC0_DAT0>,
355 <MT7623_PIN_116_MSDC0_CMD_FUNC_MSDC0_CMD>;
356 input-enable;
357 drive-strength = <MTK_DRIVE_2mA>;
358 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
359 };
360
361 pins_clk {
362 pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_MSDC0_CLK>;
363 drive-strength = <MTK_DRIVE_2mA>;
364 bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
365 };
366
367 pins_rst {
368 pinmux = <MT7623_PIN_115_MSDC0_RSTB_FUNC_MSDC0_RSTB>;
369 bias-pull-up;
370 };
371 };
372
373 mmc1_pins_default: mmc1default {
374 pins_cmd_dat {
375 pinmux = <MT7623_PIN_107_MSDC1_DAT0_FUNC_MSDC1_DAT0>,
376 <MT7623_PIN_108_MSDC1_DAT1_FUNC_MSDC1_DAT1>,
377 <MT7623_PIN_109_MSDC1_DAT2_FUNC_MSDC1_DAT2>,
378 <MT7623_PIN_110_MSDC1_DAT3_FUNC_MSDC1_DAT3>,
379 <MT7623_PIN_105_MSDC1_CMD_FUNC_MSDC1_CMD>;
380 input-enable;
381 drive-strength = <MTK_DRIVE_4mA>;
382 bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
383 };
384
385 pins_clk {
386 pinmux = <MT7623_PIN_106_MSDC1_CLK_FUNC_MSDC1_CLK>;
387 bias-pull-down;
388 drive-strength = <MTK_DRIVE_4mA>;
389 };
390
391 // pins_insert {
392 // pinmux = <MT8173_PIN_132_I2S0_DATA1_FUNC_GPIO132>;
393 // bias-pull-up;
394 // };
395 };
396
397 mmc1_pins_uhs: mmc1 {
398 pins_cmd_dat {
399 pinmux = <MT7623_PIN_107_MSDC1_DAT0_FUNC_MSDC1_DAT0>,
400 <MT7623_PIN_108_MSDC1_DAT1_FUNC_MSDC1_DAT1>,
401 <MT7623_PIN_109_MSDC1_DAT2_FUNC_MSDC1_DAT2>,
402 <MT7623_PIN_110_MSDC1_DAT3_FUNC_MSDC1_DAT3>,
403 <MT7623_PIN_105_MSDC1_CMD_FUNC_MSDC1_CMD>;
404 input-enable;
405 drive-strength = <MTK_DRIVE_4mA>;
406 bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
407 };
408
409 pins_clk {
410 pinmux = <MT7623_PIN_106_MSDC1_CLK_FUNC_MSDC1_CLK>;
411 drive-strength = <MTK_DRIVE_4mA>;
412 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
413 };
414 };
415
416 eth_default: eth {
417 pins_eth {
418 pinmux = <MT7623_PIN_275_G2_MDC_FUNC_MDC>,
419 <MT7623_PIN_276_G2_MDIO_FUNC_MDIO>,
420 <MT7623_PIN_262_G2_TXEN_FUNC_G2_TXEN>,
421 <MT7623_PIN_263_G2_TXD3_FUNC_G2_TXD3>,
422 <MT7623_PIN_264_G2_TXD2_FUNC_G2_TXD2>,
423 <MT7623_PIN_265_G2_TXD1_FUNC_G2_TXD1>,
424 <MT7623_PIN_266_G2_TXD0_FUNC_G2_TXD0>,
425 <MT7623_PIN_267_G2_TXCLK_FUNC_G2_TXC>,
426 <MT7623_PIN_268_G2_RXCLK_FUNC_G2_RXC>,
427 <MT7623_PIN_269_G2_RXD0_FUNC_G2_RXD0>,
428 <MT7623_PIN_270_G2_RXD1_FUNC_G2_RXD1>,
429 <MT7623_PIN_271_G2_RXD2_FUNC_G2_RXD2>,
430 <MT7623_PIN_272_G2_RXD3_FUNC_G2_RXD3>,
431 <MT7623_PIN_273_ESW_INT_FUNC_ESW_INT>,
432 <MT7623_PIN_274_G2_RXDV_FUNC_G2_RXDV>;
433 };
434
435 pins_eth_rst {
436 pinmux = <MT7623_PIN_15_GPIO15_FUNC_GPIO15>;
437 output-low;
438 };
439 };
440
441 pwm_pins: pwm {
442 pins_pwm1 {
443 pinmux = <MT7623_PIN_204_PWM1_FUNC_PWM1>;
444 };
445
446 pins_pwm2 {
447 pinmux = <MT7623_PIN_205_PWM2_FUNC_PWM2>;
448 };
449 };
450 };
451
452 &usb1 {
453 vusb33-supply = <&mt6323_vusb_reg>;
454 vbus-supply = <&usb_p1_vbus>;
455 status = "okay";
456 };
457
458 &u3phy1 {
459 status = "okay";
460 };
461
462 &pcie {
463 status = "okay";
464 };
465
466 &eth {
467 status = "okay";
468 };
469
470 &gmac1 {
471 mac-address = [00 11 22 33 44 56];
472 status = "okay";
473 };
474
475 &gmac2 {
476 mac-address = [00 11 22 33 44 55];
477 status = "okay";
478
479 phy-handle = <&phy5>;
480 };
481
482 &mdio0 {
483 switch@0 {
484 compatible = "mediatek,mt7530";
485 #address-cells = <1>;
486 #size-cells = <0>;
487 reg = <0>;
488
489 pinctrl-names = "default";
490 pinctrl-0 = <&eth_default>;
491
492 core-supply = <&mt6323_vpa_reg>;
493 io-supply = <&mt6323_vemc3v3_reg>;
494
495 mediatek,mcm;
496 resets = <&ethsys 2>;
497 reset-names = "mcm";
498
499 ports {
500 #address-cells = <1>;
501 #size-cells = <0>;
502 reg = <0>;
503 port@0 {
504 reg = <0>;
505 label = "lan0";
506 };
507
508 port@1 {
509 reg = <1>;
510 label = "lan1";
511 };
512
513 port@2 {
514 reg = <2>;
515 label = "lan2";
516 };
517
518 port@3 {
519 reg = <3>;
520 label = "lan3";
521 };
522
523 port@6 {
524 reg = <6>;
525 label = "cpu";
526 ethernet = <&gmac1>;
527 phy-mode = "trgmii";
528 fixed-link {
529 speed = <1000>;
530 full-duplex;
531 };
532 };
533 };
534 };
535
536 phy5: ethernet-phy@5 {
537 reg = <5>;
538 phy-mode = "rgmii-rxid";
539 };
540 };
541
542 &pwm {
543 pinctrl-names = "default";
544 pinctrl-0 = <&pwm_pins>;
545 status = "okay";
546 };