kernel: bump 4.14 to 4.14.20
[openwrt/openwrt.git] / target / linux / mediatek / patches-4.14 / 0042-net-next-mediatek-honour-special-tag-bit-inside-RX-D.patch
1 From a306af3b97c56b9e224a2f9ee04838a2d32ff60b Mon Sep 17 00:00:00 2001
2 From: John Crispin <john@phrozen.org>
3 Date: Wed, 9 Aug 2017 14:44:07 +0200
4 Subject: [PATCH 42/57] net-next: mediatek: honour special tag bit inside RX
5 DMA descriptor
6
7 For HW NAT/QoS to work the DSA driver needs to turn the special tag bit
8 inside the ingress control register on. This has the side effect that
9 the code working out which ingress gmac we have breaks. Fix this by
10 honouring the special tag bit inside the RX free descriptor.
11
12 Signed-off-by: John Crispin <john@phrozen.org>
13 ---
14 drivers/net/ethernet/mediatek/mtk_eth_soc.c | 14 ++++++++++----
15 drivers/net/ethernet/mediatek/mtk_eth_soc.h | 1 +
16 2 files changed, 11 insertions(+), 4 deletions(-)
17
18 --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
19 +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
20 @@ -999,10 +999,16 @@ static int mtk_poll_rx(struct napi_struc
21 if (!(trxd.rxd2 & RX_DMA_DONE))
22 break;
23
24 - /* find out which mac the packet come from. values start at 1 */
25 - mac = (trxd.rxd4 >> RX_DMA_FPORT_SHIFT) &
26 - RX_DMA_FPORT_MASK;
27 - mac--;
28 + /* find out which mac the packet comes from. If the special tag is
29 + * we can assume that the traffic is coming from the builtin mt7530
30 + * and the DSA driver has loaded. FPORT will be the physical switch
31 + * port in this case rather than the FE forward port id. */
32 + if (!(trxd.rxd4 & RX_DMA_SP_TAG)) {
33 + /* values start at 1 */
34 + mac = (trxd.rxd4 >> RX_DMA_FPORT_SHIFT) &
35 + RX_DMA_FPORT_MASK;
36 + mac--;
37 + }
38
39 if (unlikely(mac < 0 || mac >= MTK_MAC_COUNT ||
40 !eth->netdev[mac]))
41 --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
42 +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
43 @@ -287,6 +287,7 @@
44
45 /* QDMA descriptor rxd4 */
46 #define RX_DMA_L4_VALID BIT(24)
47 +#define RX_DMA_SP_TAG BIT(22)
48 #define RX_DMA_FPORT_SHIFT 19
49 #define RX_DMA_FPORT_MASK 0x7
50