mediatek: backport upstream mediatek patches
[openwrt/openwrt.git] / target / linux / mediatek / patches-4.14 / 0120-soc-mediatek-pwrap-add-MediaTek-MT6380-as-one-slave-.patch
1 From 81c54afc5bc918ea3ed65cc356236b302b1f21ca Mon Sep 17 00:00:00 2001
2 From: Sean Wang <sean.wang@mediatek.com>
3 Date: Wed, 18 Oct 2017 16:28:46 +0800
4 Subject: [PATCH 120/224] soc: mediatek: pwrap: add MediaTek MT6380 as one
5 slave of pwrap
6
7 Add MediaTek MT6380 regulator becoming one of PMIC wrapper slave
8 and also add extra new regmap_config of 32-bit mode for MT6380
9 since old regmap_config of 16-bit mode can't be fit into the need.
10
11 Signed-off-by: Chenglin Xu <chenglin.xu@mediatek.com>
12 Signed-off-by: Chen Zhong <chen.zhong@mediatek.com>
13 Signed-off-by: Sean Wang <sean.wang@mediatek.com>
14 Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
15 ---
16 drivers/soc/mediatek/mtk-pmic-wrap.c | 24 +++++++++++++++++++++---
17 1 file changed, 21 insertions(+), 3 deletions(-)
18
19 diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
20 index e3398e37a7a6..45c3e44d8f40 100644
21 --- a/drivers/soc/mediatek/mtk-pmic-wrap.c
22 +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
23 @@ -507,6 +507,7 @@ struct pmic_wrapper;
24 struct pwrap_slv_type {
25 const u32 *dew_regs;
26 enum pmic_type type;
27 + const struct regmap_config *regmap;
28 /* Flags indicating the capability for the target slave */
29 u32 caps;
30 /*
31 @@ -1149,7 +1150,7 @@ static irqreturn_t pwrap_interrupt(int irqno, void *dev_id)
32 return IRQ_HANDLED;
33 }
34
35 -static const struct regmap_config pwrap_regmap_config = {
36 +static const struct regmap_config pwrap_regmap_config16 = {
37 .reg_bits = 16,
38 .val_bits = 16,
39 .reg_stride = 2,
40 @@ -1158,9 +1159,19 @@ static const struct regmap_config pwrap_regmap_config = {
41 .max_register = 0xffff,
42 };
43
44 +static const struct regmap_config pwrap_regmap_config32 = {
45 + .reg_bits = 32,
46 + .val_bits = 32,
47 + .reg_stride = 4,
48 + .reg_read = pwrap_regmap_read,
49 + .reg_write = pwrap_regmap_write,
50 + .max_register = 0xffff,
51 +};
52 +
53 static const struct pwrap_slv_type pmic_mt6323 = {
54 .dew_regs = mt6323_regs,
55 .type = PMIC_MT6323,
56 + .regmap = &pwrap_regmap_config16,
57 .caps = PWRAP_SLV_CAP_SPI | PWRAP_SLV_CAP_DUALIO |
58 PWRAP_SLV_CAP_SECURITY,
59 .pwrap_read = pwrap_read16,
60 @@ -1170,6 +1181,7 @@ static const struct pwrap_slv_type pmic_mt6323 = {
61 static const struct pwrap_slv_type pmic_mt6380 = {
62 .dew_regs = NULL,
63 .type = PMIC_MT6380,
64 + .regmap = &pwrap_regmap_config32,
65 .caps = 0,
66 .pwrap_read = pwrap_read32,
67 .pwrap_write = pwrap_write32,
68 @@ -1178,6 +1190,7 @@ static const struct pwrap_slv_type pmic_mt6380 = {
69 static const struct pwrap_slv_type pmic_mt6397 = {
70 .dew_regs = mt6397_regs,
71 .type = PMIC_MT6397,
72 + .regmap = &pwrap_regmap_config16,
73 .caps = PWRAP_SLV_CAP_SPI | PWRAP_SLV_CAP_DUALIO |
74 PWRAP_SLV_CAP_SECURITY,
75 .pwrap_read = pwrap_read16,
76 @@ -1189,9 +1202,14 @@ static const struct of_device_id of_slave_match_tbl[] = {
77 .compatible = "mediatek,mt6323",
78 .data = &pmic_mt6323,
79 }, {
80 + /* The MT6380 PMIC only implements a regulator, so we bind it
81 + * directly instead of using a MFD.
82 + */
83 + .compatible = "mediatek,mt6380-regulator",
84 + .data = &pmic_mt6380,
85 + }, {
86 .compatible = "mediatek,mt6397",
87 .data = &pmic_mt6397,
88 - }, {
89 /* sentinel */
90 }
91 };
92 @@ -1372,7 +1390,7 @@ static int pwrap_probe(struct platform_device *pdev)
93 if (ret)
94 goto err_out2;
95
96 - wrp->regmap = devm_regmap_init(wrp->dev, NULL, wrp, &pwrap_regmap_config);
97 + wrp->regmap = devm_regmap_init(wrp->dev, NULL, wrp, wrp->slave->regmap);
98 if (IS_ERR(wrp->regmap)) {
99 ret = PTR_ERR(wrp->regmap);
100 goto err_out2;
101 --
102 2.11.0
103