target/linux/mediatek/patches-4.4/0011-reset-mediatek-mt2701-reset-driver.patch

   1 From 3ba0020ea70ffb5503eff1823be7fa5ceda38286 Mon Sep 17 00:00:00 2001
   2 From: Shunli Wang <shunli.wang@mediatek.com>
   3 Date: Tue, 5 Jan 2016 14:30:22 +0800
   4 Subject: [PATCH 011/102] reset: mediatek: mt2701 reset driver
   5
   6 In infrasys and perifsys, there are many reset
   7 control bits for kinds of modules. These bits are
   8 used as actual reset controllers to be registered
   9 into kernel's generic reset controller framework.
  10
  11 Signed-off-by: Shunli Wang <shunli.wang@mediatek.com>
  12 Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
  13 ---
  14  drivers/clk/mediatek/clk-mt2701.c |    4 ++++
  15  1 file changed, 4 insertions(+)
  16
  17 diff --git a/drivers/clk/mediatek/clk-mt2701.c b/drivers/clk/mediatek/clk-mt2701.c
  18 index 2f521f4..39472e4 100644
  19 --- a/drivers/clk/mediatek/clk-mt2701.c
  20 +++ b/drivers/clk/mediatek/clk-mt2701.c
  21 @@ -665,6 +665,8 @@ static void __init mtk_infrasys_init(struct device_node *node)
  22         if (r)
  23                 pr_err("%s(): could not register clock provider: %d\n",
  24                         __func__, r);
  25 +
  26 +       mtk_register_reset_controller(node, 2, 0x30);
  27  }
  28  CLK_OF_DECLARE(mtk_infrasys, "mediatek,mt2701-infracfg", mtk_infrasys_init);
  29
  30 @@ -782,6 +784,8 @@ static void __init mtk_pericfg_init(struct device_node *node)
  31         if (r)
  32                 pr_err("%s(): could not register clock provider: %d\n",
  33                         __func__, r);
  34 +
  35 +       mtk_register_reset_controller(node, 2, 0x0);
  36  }
  37  CLK_OF_DECLARE(mtk_pericfg, "mediatek,mt2701-pericfg", mtk_pericfg_init);
  38
  39 --
  40 1.7.10.4
  41