25d7f746c4c3ebed55f75ddd4c5c44fc60731bff
[openwrt/openwrt.git] / target / linux / mediatek / patches-4.4 / 0033-soc-mediatek-PMIC-wrap-add-wrapper-callbacks-for-ini.patch
1 From 756b919b7874cc241a276b4fc5bbec5b3fb4bca8 Mon Sep 17 00:00:00 2001
2 From: John Crispin <blogic@openwrt.org>
3 Date: Wed, 20 Jan 2016 05:27:17 +0100
4 Subject: [PATCH 033/102] soc: mediatek: PMIC wrap: add wrapper callbacks for
5 init_reg_clock
6
7 Split init_reg_clock up into SoC specific callbacks. The patch also
8 reorders the code to avoid the need for callback function prototypes.
9
10 Signed-off-by: John Crispin <blogic@openwrt.org>
11 ---
12 drivers/soc/mediatek/mtk-pmic-wrap.c | 70 ++++++++++++++++++----------------
13 1 file changed, 38 insertions(+), 32 deletions(-)
14
15 diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
16 index 340c4b5..b22b664 100644
17 --- a/drivers/soc/mediatek/mtk-pmic-wrap.c
18 +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
19 @@ -354,24 +354,6 @@ enum pwrap_type {
20 PWRAP_MT8173,
21 };
22
23 -struct pmic_wrapper_type {
24 - int *regs;
25 - enum pwrap_type type;
26 - u32 arb_en_all;
27 -};
28 -
29 -static struct pmic_wrapper_type pwrap_mt8135 = {
30 - .regs = mt8135_regs,
31 - .type = PWRAP_MT8135,
32 - .arb_en_all = 0x1ff,
33 -};
34 -
35 -static struct pmic_wrapper_type pwrap_mt8173 = {
36 - .regs = mt8173_regs,
37 - .type = PWRAP_MT8173,
38 - .arb_en_all = 0x3f,
39 -};
40 -
41 struct pmic_wrapper {
42 struct device *dev;
43 void __iomem *base;
44 @@ -385,6 +367,13 @@ struct pmic_wrapper {
45 void __iomem *bridge_base;
46 };
47
48 +struct pmic_wrapper_type {
49 + int *regs;
50 + enum pwrap_type type;
51 + u32 arb_en_all;
52 + int (*init_reg_clock)(struct pmic_wrapper *wrp);
53 +};
54 +
55 static inline int pwrap_is_mt8135(struct pmic_wrapper *wrp)
56 {
57 return wrp->master->type == PWRAP_MT8135;
58 @@ -578,20 +567,23 @@ static int pwrap_init_sidly(struct pmic_wrapper *wrp)
59 return 0;
60 }
61
62 -static int pwrap_init_reg_clock(struct pmic_wrapper *wrp)
63 +static int pwrap_mt8135_init_reg_clock(struct pmic_wrapper *wrp)
64 {
65 - if (pwrap_is_mt8135(wrp)) {
66 - pwrap_writel(wrp, 0x4, PWRAP_CSHEXT);
67 - pwrap_writel(wrp, 0x0, PWRAP_CSHEXT_WRITE);
68 - pwrap_writel(wrp, 0x4, PWRAP_CSHEXT_READ);
69 - pwrap_writel(wrp, 0x0, PWRAP_CSLEXT_START);
70 - pwrap_writel(wrp, 0x0, PWRAP_CSLEXT_END);
71 - } else {
72 - pwrap_writel(wrp, 0x0, PWRAP_CSHEXT_WRITE);
73 - pwrap_writel(wrp, 0x4, PWRAP_CSHEXT_READ);
74 - pwrap_writel(wrp, 0x2, PWRAP_CSLEXT_START);
75 - pwrap_writel(wrp, 0x2, PWRAP_CSLEXT_END);
76 - }
77 + pwrap_writel(wrp, 0x4, PWRAP_CSHEXT);
78 + pwrap_writel(wrp, 0x0, PWRAP_CSHEXT_WRITE);
79 + pwrap_writel(wrp, 0x4, PWRAP_CSHEXT_READ);
80 + pwrap_writel(wrp, 0x0, PWRAP_CSLEXT_START);
81 + pwrap_writel(wrp, 0x0, PWRAP_CSLEXT_END);
82 +
83 + return 0;
84 +}
85 +
86 +static int pwrap_mt8173_init_reg_clock(struct pmic_wrapper *wrp)
87 +{
88 + pwrap_writel(wrp, 0x0, PWRAP_CSHEXT_WRITE);
89 + pwrap_writel(wrp, 0x4, PWRAP_CSHEXT_READ);
90 + pwrap_writel(wrp, 0x2, PWRAP_CSLEXT_START);
91 + pwrap_writel(wrp, 0x2, PWRAP_CSLEXT_END);
92
93 return 0;
94 }
95 @@ -699,7 +691,7 @@ static int pwrap_init(struct pmic_wrapper *wrp)
96
97 pwrap_writel(wrp, 1, PWRAP_WACS2_EN);
98
99 - ret = pwrap_init_reg_clock(wrp);
100 + ret = wrp->master->init_reg_clock(wrp);
101 if (ret)
102 return ret;
103
104 @@ -814,6 +806,20 @@ static const struct regmap_config pwrap_regmap_config = {
105 .max_register = 0xffff,
106 };
107
108 +static struct pmic_wrapper_type pwrap_mt8135 = {
109 + .regs = mt8135_regs,
110 + .type = PWRAP_MT8135,
111 + .arb_en_all = 0x1ff,
112 + .init_reg_clock = pwrap_mt8135_init_reg_clock,
113 +};
114 +
115 +static struct pmic_wrapper_type pwrap_mt8173 = {
116 + .regs = mt8173_regs,
117 + .type = PWRAP_MT8173,
118 + .arb_en_all = 0x3f,
119 + .init_reg_clock = pwrap_mt8173_init_reg_clock,
120 +};
121 +
122 static struct of_device_id of_pwrap_match_tbl[] = {
123 {
124 .compatible = "mediatek,mt8135-pwrap",
125 --
126 1.7.10.4
127