target/linux/mediatek/patches-4.4/0039-soc-mediatek-PMIC-wrap-add-a-slave-specific-struct.patch

   1 From 21bdcd324f769545b1765fe391d939a1edd07cbb Mon Sep 17 00:00:00 2001
   2 From: John Crispin <blogic@openwrt.org>
   3 Date: Wed, 20 Jan 2016 09:55:08 +0100
   4 Subject: [PATCH 039/102] soc: mediatek: PMIC wrap: add a slave specific
   5  struct
   6
   7 This patch adds a new struct pwrap_slv_type that we use to store the slave
   8 specific data. The patch adds 2 new helper functions to access the dew
   9 registers. The slave type is looked up via the wrappers child node.
  10
  11 Signed-off-by: John Crispin <blogic@openwrt.org>
  12 ---
  13  drivers/soc/mediatek/mtk-pmic-wrap.c |  159 ++++++++++++++++++++++++----------
  14  1 file changed, 112 insertions(+), 47 deletions(-)
  15
  16 diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
  17 index a2bacda..bcc841e 100644
  18 --- a/drivers/soc/mediatek/mtk-pmic-wrap.c
  19 +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
  20 @@ -69,33 +69,54 @@
  21                                           PWRAP_WDT_SRC_EN_HARB_STAUPD_DLE | \
  22                                           PWRAP_WDT_SRC_EN_HARB_STAUPD_ALE)
  23
  24 -/* macro for slave device wrapper registers */
  25 -#define PWRAP_DEW_BASE                 0xbc00
  26 -#define PWRAP_DEW_EVENT_OUT_EN         (PWRAP_DEW_BASE + 0x0)
  27 -#define PWRAP_DEW_DIO_EN               (PWRAP_DEW_BASE + 0x2)
  28 -#define PWRAP_DEW_EVENT_SRC_EN         (PWRAP_DEW_BASE + 0x4)
  29 -#define PWRAP_DEW_EVENT_SRC            (PWRAP_DEW_BASE + 0x6)
  30 -#define PWRAP_DEW_EVENT_FLAG           (PWRAP_DEW_BASE + 0x8)
  31 -#define PWRAP_DEW_READ_TEST            (PWRAP_DEW_BASE + 0xa)
  32 -#define PWRAP_DEW_WRITE_TEST           (PWRAP_DEW_BASE + 0xc)
  33 -#define PWRAP_DEW_CRC_EN               (PWRAP_DEW_BASE + 0xe)
  34 -#define PWRAP_DEW_CRC_VAL              (PWRAP_DEW_BASE + 0x10)
  35 -#define PWRAP_DEW_MON_GRP_SEL          (PWRAP_DEW_BASE + 0x12)
  36 -#define PWRAP_DEW_MON_FLAG_SEL         (PWRAP_DEW_BASE + 0x14)
  37 -#define PWRAP_DEW_EVENT_TEST           (PWRAP_DEW_BASE + 0x16)
  38 -#define PWRAP_DEW_CIPHER_KEY_SEL       (PWRAP_DEW_BASE + 0x18)
  39 -#define PWRAP_DEW_CIPHER_IV_SEL                (PWRAP_DEW_BASE + 0x1a)
  40 -#define PWRAP_DEW_CIPHER_LOAD          (PWRAP_DEW_BASE + 0x1c)
  41 -#define PWRAP_DEW_CIPHER_START         (PWRAP_DEW_BASE + 0x1e)
  42 -#define PWRAP_DEW_CIPHER_RDY           (PWRAP_DEW_BASE + 0x20)
  43 -#define PWRAP_DEW_CIPHER_MODE          (PWRAP_DEW_BASE + 0x22)
  44 -#define PWRAP_DEW_CIPHER_SWRST         (PWRAP_DEW_BASE + 0x24)
  45 -#define PWRAP_MT8173_DEW_CIPHER_IV0    (PWRAP_DEW_BASE + 0x26)
  46 -#define PWRAP_MT8173_DEW_CIPHER_IV1    (PWRAP_DEW_BASE + 0x28)
  47 -#define PWRAP_MT8173_DEW_CIPHER_IV2    (PWRAP_DEW_BASE + 0x2a)
  48 -#define PWRAP_MT8173_DEW_CIPHER_IV3    (PWRAP_DEW_BASE + 0x2c)
  49 -#define PWRAP_MT8173_DEW_CIPHER_IV4    (PWRAP_DEW_BASE + 0x2e)
  50 -#define PWRAP_MT8173_DEW_CIPHER_IV5    (PWRAP_DEW_BASE + 0x30)
  51 +/* defines for slave device wrapper registers */
  52 +enum dew_regs {
  53 +       PWRAP_DEW_BASE,
  54 +       PWRAP_DEW_DIO_EN,
  55 +       PWRAP_DEW_READ_TEST,
  56 +       PWRAP_DEW_WRITE_TEST,
  57 +       PWRAP_DEW_CRC_EN,
  58 +       PWRAP_DEW_CRC_VAL,
  59 +       PWRAP_DEW_MON_GRP_SEL,
  60 +       PWRAP_DEW_CIPHER_KEY_SEL,
  61 +       PWRAP_DEW_CIPHER_IV_SEL,
  62 +       PWRAP_DEW_CIPHER_RDY,
  63 +       PWRAP_DEW_CIPHER_MODE,
  64 +       PWRAP_DEW_CIPHER_SWRST,
  65 +
  66 +       /* MT6397 only regs */
  67 +       PWRAP_DEW_EVENT_OUT_EN,
  68 +       PWRAP_DEW_EVENT_SRC_EN,
  69 +       PWRAP_DEW_EVENT_SRC,
  70 +       PWRAP_DEW_EVENT_FLAG,
  71 +       PWRAP_DEW_MON_FLAG_SEL,
  72 +       PWRAP_DEW_EVENT_TEST,
  73 +       PWRAP_DEW_CIPHER_LOAD,
  74 +       PWRAP_DEW_CIPHER_START,
  75 +};
  76 +
  77 +static const u32 mt6397_regs[] = {
  78 +       [PWRAP_DEW_BASE] =              0xbc00,
  79 +       [PWRAP_DEW_EVENT_OUT_EN] =      0xbc00,
  80 +       [PWRAP_DEW_DIO_EN] =            0xbc02,
  81 +       [PWRAP_DEW_EVENT_SRC_EN] =      0xbc04,
  82 +       [PWRAP_DEW_EVENT_SRC] =         0xbc06,
  83 +       [PWRAP_DEW_EVENT_FLAG] =        0xbc08,
  84 +       [PWRAP_DEW_READ_TEST] =         0xbc0a,
  85 +       [PWRAP_DEW_WRITE_TEST] =        0xbc0c,
  86 +       [PWRAP_DEW_CRC_EN] =            0xbc0e,
  87 +       [PWRAP_DEW_CRC_VAL] =           0xbc10,
  88 +       [PWRAP_DEW_MON_GRP_SEL] =       0xbc12,
  89 +       [PWRAP_DEW_MON_FLAG_SEL] =      0xbc14,
  90 +       [PWRAP_DEW_EVENT_TEST] =        0xbc16,
  91 +       [PWRAP_DEW_CIPHER_KEY_SEL] =    0xbc18,
  92 +       [PWRAP_DEW_CIPHER_IV_SEL] =     0xbc1a,
  93 +       [PWRAP_DEW_CIPHER_LOAD] =       0xbc1c,
  94 +       [PWRAP_DEW_CIPHER_START] =      0xbc1e,
  95 +       [PWRAP_DEW_CIPHER_RDY] =        0xbc20,
  96 +       [PWRAP_DEW_CIPHER_MODE] =       0xbc22,
  97 +       [PWRAP_DEW_CIPHER_SWRST] =      0xbc24,
  98 +};
  99
 100  enum pwrap_regs {
 101         PWRAP_MUX_SEL,
 102 @@ -349,16 +370,26 @@ static int mt8135_regs[] = {
 103         [PWRAP_DCM_DBC_PRD] =           0x160,
 104  };
 105
 106 +enum pmic_type {
 107 +       PMIC_MT6397,
 108 +};
 109 +
 110  enum pwrap_type {
 111         PWRAP_MT8135,
 112         PWRAP_MT8173,
 113  };
 114
 115 +struct pwrap_slv_type {
 116 +       const u32 *dew_regs;
 117 +       enum pmic_type type;
 118 +};
 119 +
 120  struct pmic_wrapper {
 121         struct device *dev;
 122         void __iomem *base;
 123         struct regmap *regmap;
 124         const struct pmic_wrapper_type *master;
 125 +       const struct pwrap_slv_type *slave;
 126         struct clk *clk_spi;
 127         struct clk *clk_wrap;
 128         struct reset_control *rstc;
 129 @@ -544,7 +575,8 @@ static int pwrap_init_sidly(struct pmic_wrapper *wrp)
 130
 131         for (i = 0; i < 4; i++) {
 132                 pwrap_writel(wrp, i, PWRAP_SIDLY);
 133 -               pwrap_read(wrp, PWRAP_DEW_READ_TEST, &rdata);
 134 +               pwrap_read(wrp, wrp->slave->dew_regs[PWRAP_DEW_READ_TEST],
 135 +                          &rdata);
 136                 if (rdata == PWRAP_DEW_READ_TEST_VAL) {
 137                         dev_dbg(wrp->dev, "[Read Test] pass, SIDLY=%x\n", i);
 138                         pass |= 1 << i;
 139 @@ -593,7 +625,8 @@ static bool pwrap_is_pmic_cipher_ready(struct pmic_wrapper *wrp)
 140         u32 rdata;
 141         int ret;
 142
 143 -       ret = pwrap_read(wrp, PWRAP_DEW_CIPHER_RDY, &rdata);
 144 +       ret = pwrap_read(wrp, wrp->slave->dew_regs[PWRAP_DEW_CIPHER_RDY],
 145 +                        &rdata);
 146         if (ret)
 147                 return 0;
 148
 149 @@ -621,12 +654,12 @@ static int pwrap_init_cipher(struct pmic_wrapper *wrp)
 150         }
 151
 152         /* Config cipher mode @PMIC */
 153 -       pwrap_write(wrp, PWRAP_DEW_CIPHER_SWRST, 0x1);
 154 -       pwrap_write(wrp, PWRAP_DEW_CIPHER_SWRST, 0x0);
 155 -       pwrap_write(wrp, PWRAP_DEW_CIPHER_KEY_SEL, 0x1);
 156 -       pwrap_write(wrp, PWRAP_DEW_CIPHER_IV_SEL, 0x2);
 157 -       pwrap_write(wrp, PWRAP_DEW_CIPHER_LOAD, 0x1);
 158 -       pwrap_write(wrp, PWRAP_DEW_CIPHER_START, 0x1);
 159 +       pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_CIPHER_SWRST], 0x1);
 160 +       pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_CIPHER_SWRST], 0x0);
 161 +       pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_CIPHER_KEY_SEL], 0x1);
 162 +       pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_CIPHER_IV_SEL], 0x2);
 163 +       pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_CIPHER_LOAD], 0x1);
 164 +       pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_CIPHER_START], 0x1);
 165
 166         /* wait for cipher data ready@AP */
 167         ret = pwrap_wait_for_state(wrp, pwrap_is_cipher_ready);
 168 @@ -643,7 +676,7 @@ static int pwrap_init_cipher(struct pmic_wrapper *wrp)
 169         }
 170
 171         /* wait for cipher mode idle */
 172 -       pwrap_write(wrp, PWRAP_DEW_CIPHER_MODE, 0x1);
 173 +       pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_CIPHER_MODE], 0x1);
 174         ret = pwrap_wait_for_state(wrp, pwrap_is_fsm_idle_and_sync_idle);
 175         if (ret) {
 176                 dev_err(wrp->dev, "cipher mode idle fail, ret=%d\n", ret);
 177 @@ -653,9 +686,11 @@ static int pwrap_init_cipher(struct pmic_wrapper *wrp)
 178         pwrap_writel(wrp, 1, PWRAP_CIPHER_MODE);
 179
 180         /* Write Test */
 181 -       if (pwrap_write(wrp, PWRAP_DEW_WRITE_TEST, PWRAP_DEW_WRITE_TEST_VAL) ||
 182 -           pwrap_read(wrp, PWRAP_DEW_WRITE_TEST, &rdata) ||
 183 -                       (rdata != PWRAP_DEW_WRITE_TEST_VAL)) {
 184 +       if (pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_WRITE_TEST],
 185 +                       PWRAP_DEW_WRITE_TEST_VAL) ||
 186 +           pwrap_read(wrp, wrp->slave->dew_regs[PWRAP_DEW_WRITE_TEST],
 187 +                      &rdata) ||
 188 +           (rdata != PWRAP_DEW_WRITE_TEST_VAL)) {
 189                 dev_err(wrp->dev, "rdata=0x%04X\n", rdata);
 190                 return -EFAULT;
 191         }
 192 @@ -677,8 +712,10 @@ static int pwrap_mt8135_init_soc_specific(struct pmic_wrapper *wrp)
 193         writel(0x7ff, wrp->bridge_base + PWRAP_MT8135_BRIDGE_INT_EN);
 194
 195         /* enable PMIC event out and sources */
 196 -       if (pwrap_write(wrp, PWRAP_DEW_EVENT_OUT_EN, 0x1) ||
 197 -               pwrap_write(wrp, PWRAP_DEW_EVENT_SRC_EN, 0xffff)) {
 198 +       if (pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_EVENT_OUT_EN],
 199 +                       0x1) ||
 200 +           pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_EVENT_SRC_EN],
 201 +                       0xffff)) {
 202                 dev_err(wrp->dev, "enable dewrap fail\n");
 203                 return -EFAULT;
 204         }
 205 @@ -689,8 +726,10 @@ static int pwrap_mt8135_init_soc_specific(struct pmic_wrapper *wrp)
 206  static int pwrap_mt8173_init_soc_specific(struct pmic_wrapper *wrp)
 207  {
 208         /* PMIC_DEWRAP enables */
 209 -       if (pwrap_write(wrp, PWRAP_DEW_EVENT_OUT_EN, 0x1) ||
 210 -               pwrap_write(wrp, PWRAP_DEW_EVENT_SRC_EN, 0xffff)) {
 211 +       if (pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_EVENT_OUT_EN],
 212 +                       0x1) ||
 213 +           pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_EVENT_SRC_EN],
 214 +                       0xffff)) {
 215                 dev_err(wrp->dev, "enable dewrap fail\n");
 216                 return -EFAULT;
 217         }
 218 @@ -734,7 +773,7 @@ static int pwrap_init(struct pmic_wrapper *wrp)
 219                 return ret;
 220
 221         /* Enable dual IO mode */
 222 -       pwrap_write(wrp, PWRAP_DEW_DIO_EN, 1);
 223 +       pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_DIO_EN], 1);
 224
 225         /* Check IDLE & INIT_DONE in advance */
 226         ret = pwrap_wait_for_state(wrp, pwrap_is_fsm_idle_and_sync_idle);
 227 @@ -746,7 +785,7 @@ static int pwrap_init(struct pmic_wrapper *wrp)
 228         pwrap_writel(wrp, 1, PWRAP_DIO_EN);
 229
 230         /* Read Test */
 231 -       pwrap_read(wrp, PWRAP_DEW_READ_TEST, &rdata);
 232 +       pwrap_read(wrp, wrp->slave->dew_regs[PWRAP_DEW_READ_TEST], &rdata);
 233         if (rdata != PWRAP_DEW_READ_TEST_VAL) {
 234                 dev_err(wrp->dev, "Read test failed after switch to DIO mode: 0x%04x != 0x%04x\n",
 235                                 PWRAP_DEW_READ_TEST_VAL, rdata);
 236 @@ -759,12 +798,13 @@ static int pwrap_init(struct pmic_wrapper *wrp)
 237                 return ret;
 238
 239         /* Signature checking - using CRC */
 240 -       if (pwrap_write(wrp, PWRAP_DEW_CRC_EN, 0x1))
 241 +       if (pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_CRC_EN], 0x1))
 242                 return -EFAULT;
 243
 244         pwrap_writel(wrp, 0x1, PWRAP_CRC_EN);
 245         pwrap_writel(wrp, 0x0, PWRAP_SIG_MODE);
 246 -       pwrap_writel(wrp, PWRAP_DEW_CRC_VAL, PWRAP_SIG_ADR);
 247 +       pwrap_writel(wrp, wrp->slave->dew_regs[PWRAP_DEW_CRC_VAL],
 248 +                    PWRAP_SIG_ADR);
 249         pwrap_writel(wrp, wrp->master->arb_en_all, PWRAP_HIPRIO_ARB_EN);
 250
 251         if (wrp->master->type == PWRAP_MT8135)
 252 @@ -818,6 +858,21 @@ static const struct regmap_config pwrap_regmap_config = {
 253         .max_register = 0xffff,
 254  };
 255
 256 +static const struct pwrap_slv_type pmic_mt6397 = {
 257 +       .dew_regs = mt6397_regs,
 258 +       .type = PMIC_MT6397,
 259 +};
 260 +
 261 +static const struct of_device_id of_slave_match_tbl[] = {
 262 +       {
 263 +               .compatible = "mediatek,mt6397",
 264 +               .data = &pmic_mt6397,
 265 +       }, {
 266 +               /* sentinel */
 267 +       }
 268 +};
 269 +MODULE_DEVICE_TABLE(of, of_slave_match_tbl);
 270 +
 271  static struct pmic_wrapper_type pwrap_mt8135 = {
 272         .regs = mt8135_regs,
 273         .type = PWRAP_MT8135,
 274 @@ -862,8 +917,17 @@ static int pwrap_probe(struct platform_device *pdev)
 275         struct device_node *np = pdev->dev.of_node;
 276         const struct of_device_id *of_id =
 277                 of_match_device(of_pwrap_match_tbl, &pdev->dev);
 278 +       const struct of_device_id *of_slave_id = NULL;
 279         struct resource *res;
 280
 281 +       if (pdev->dev.of_node->child)
 282 +               of_slave_id = of_match_node(of_slave_match_tbl,
 283 +                                           pdev->dev.of_node->child);
 284 +       if (!of_slave_id) {
 285 +               dev_dbg(&pdev->dev, "slave pmic should be defined in dts\n");
 286 +               return -EINVAL;
 287 +       }
 288 +
 289         wrp = devm_kzalloc(&pdev->dev, sizeof(*wrp), GFP_KERNEL);
 290         if (!wrp)
 291                 return -ENOMEM;
 292 @@ -871,6 +935,7 @@ static int pwrap_probe(struct platform_device *pdev)
 293         platform_set_drvdata(pdev, wrp);
 294
 295         wrp->master = of_id->data;
 296 +       wrp->slave = of_slave_id->data;
 297         wrp->dev = &pdev->dev;
 298
 299         res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pwrap");
 300 --
 301 1.7.10.4
 302