target/linux/mediatek/patches-4.4/0043-mfd-mt6397-int_con-and-int_status-may-vary-in-locati.patch

   1 From aa90d988b627b41c774891fd72560699f30faefa Mon Sep 17 00:00:00 2001
   2 From: John Crispin <blogic@openwrt.org>
   3 Date: Fri, 8 Jan 2016 08:33:17 +0100
   4 Subject: [PATCH 43/81] mfd: mt6397: int_con and int_status may vary in
   5  location
   6
   7 MT6323 has the INT_CON and INT_STATUS located at a different position.
   8 Make the registers locations configurable.
   9
  10 Signed-off-by: John Crispin <blogic@openwrt.org>
  11 ---
  12  drivers/mfd/mt6397-core.c       |   27 +++++++++++++++++----------
  13  include/linux/mfd/mt6397/core.h |    2 ++
  14  2 files changed, 19 insertions(+), 10 deletions(-)
  15
  16 --- a/drivers/mfd/mt6397-core.c
  17 +++ b/drivers/mfd/mt6397-core.c
  18 @@ -69,8 +69,10 @@ static void mt6397_irq_sync_unlock(struc
  19  {
  20         struct mt6397_chip *mt6397 = irq_data_get_irq_chip_data(data);
  21
  22 -       regmap_write(mt6397->regmap, MT6397_INT_CON0, mt6397->irq_masks_cur[0]);
  23 -       regmap_write(mt6397->regmap, MT6397_INT_CON1, mt6397->irq_masks_cur[1]);
  24 +       regmap_write(mt6397->regmap, mt6397->int_con[0],
  25 +                    mt6397->irq_masks_cur[0]);
  26 +       regmap_write(mt6397->regmap, mt6397->int_con[1],
  27 +                    mt6397->irq_masks_cur[1]);
  28
  29         mutex_unlock(&mt6397->irqlock);
  30  }
  31 @@ -147,8 +149,8 @@ static irqreturn_t mt6397_irq_thread(int
  32  {
  33         struct mt6397_chip *mt6397 = data;
  34
  35 -       mt6397_irq_handle_reg(mt6397, MT6397_INT_STATUS0, 0);
  36 -       mt6397_irq_handle_reg(mt6397, MT6397_INT_STATUS1, 16);
  37 +       mt6397_irq_handle_reg(mt6397, mt6397->int_status[0], 0);
  38 +       mt6397_irq_handle_reg(mt6397, mt6397->int_status[1], 16);
  39
  40         return IRQ_HANDLED;
  41  }
  42 @@ -177,8 +179,8 @@ static int mt6397_irq_init(struct mt6397
  43         mutex_init(&mt6397->irqlock);
  44
  45         /* Mask all interrupt sources */
  46 -       regmap_write(mt6397->regmap, MT6397_INT_CON0, 0x0);
  47 -       regmap_write(mt6397->regmap, MT6397_INT_CON1, 0x0);
  48 +       regmap_write(mt6397->regmap, mt6397->int_con[0], 0x0);
  49 +       regmap_write(mt6397->regmap, mt6397->int_con[1], 0x0);
  50
  51         mt6397->irq_domain = irq_domain_add_linear(mt6397->dev->of_node,
  52                 MT6397_IRQ_NR, &mt6397_irq_domain_ops, mt6397);
  53 @@ -203,8 +205,8 @@ static int mt6397_irq_suspend(struct dev
  54  {
  55         struct mt6397_chip *chip = dev_get_drvdata(dev);
  56
  57 -       regmap_write(chip->regmap, MT6397_INT_CON0, chip->wake_mask[0]);
  58 -       regmap_write(chip->regmap, MT6397_INT_CON1, chip->wake_mask[1]);
  59 +       regmap_write(chip->regmap, chip->int_con[0], chip->wake_mask[0]);
  60 +       regmap_write(chip->regmap, chip->int_con[1], chip->wake_mask[1]);
  61
  62         enable_irq_wake(chip->irq);
  63
  64 @@ -215,8 +217,8 @@ static int mt6397_irq_resume(struct devi
  65  {
  66         struct mt6397_chip *chip = dev_get_drvdata(dev);
  67
  68 -       regmap_write(chip->regmap, MT6397_INT_CON0, chip->irq_masks_cur[0]);
  69 -       regmap_write(chip->regmap, MT6397_INT_CON1, chip->irq_masks_cur[1]);
  70 +       regmap_write(chip->regmap, chip->int_con[0], chip->irq_masks_cur[0]);
  71 +       regmap_write(chip->regmap, chip->int_con[1], chip->irq_masks_cur[1]);
  72
  73         disable_irq_wake(chip->irq);
  74
  75 @@ -237,6 +239,11 @@ static int mt6397_probe(struct platform_
  76                 return -ENOMEM;
  77
  78         mt6397->dev = &pdev->dev;
  79 +       mt6397->int_con[0] = MT6397_INT_CON0;
  80 +       mt6397->int_con[1] = MT6397_INT_CON1;
  81 +       mt6397->int_status[0] = MT6397_INT_STATUS0;
  82 +       mt6397->int_status[1] = MT6397_INT_STATUS1;
  83 +
  84         /*
  85          * mt6397 MFD is child device of soc pmic wrapper.
  86          * Regmap is set from its parent.
  87 --- a/include/linux/mfd/mt6397/core.h
  88 +++ b/include/linux/mfd/mt6397/core.h
  89 @@ -60,6 +60,8 @@ struct mt6397_chip {
  90         u16 wake_mask[2];
  91         u16 irq_masks_cur[2];
  92         u16 irq_masks_cache[2];
  93 +       u16 int_con[2];
  94 +       u16 int_status[2];
  95  };
  96
  97  #endif /* __MFD_MT6397_CORE_H__ */