target/linux/mediatek/patches-4.4/0086-net-next-mediatek-add-next-data-pointer-coherency-pr.patch

   1 From 5077ac38a86023124ebbe24cd1b7ecbd0f8edaff Mon Sep 17 00:00:00 2001
   2 From: John Crispin <john@phrozen.org>
   3 Date: Tue, 3 May 2016 03:06:59 +0200
   4 Subject: [PATCH 086/102] net-next: mediatek: add next data pointer coherency
   5  protection
   6
   7 The QDMA engine can fail to update the register pointing to the next TX
   8 descriptor if this bit does not get set in the QDMA configuration register.
   9 Not setting this bit can result in invalid values inside the TX rings
  10 registers which will causes TX stalls.
  11
  12 Signed-off-by: Sean Wang <keyhaede@gmail.com>
  13 Signed-off-by: John Crispin <john@phrozen.org>
  14 ---
  15  drivers/net/ethernet/mediatek/mtk_eth_soc.c |    2 +-
  16  drivers/net/ethernet/mediatek/mtk_eth_soc.h |    1 +
  17  2 files changed, 2 insertions(+), 1 deletion(-)
  18
  19 --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
  20 +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
  21 @@ -1292,7 +1292,7 @@ static int mtk_start_dma(struct mtk_eth
  22         mtk_w32(eth,
  23                 MTK_TX_WB_DDONE | MTK_RX_DMA_EN | MTK_TX_DMA_EN |
  24                 MTK_RX_2B_OFFSET | MTK_DMA_SIZE_16DWORDS |
  25 -               MTK_RX_BT_32DWORDS,
  26 +               MTK_RX_BT_32DWORDS | MTK_NDP_CO_PRO,
  27                 MTK_QDMA_GLO_CFG);
  28
  29         return 0;
  30 --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
  31 +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
  32 @@ -91,6 +91,7 @@
  33  #define MTK_QDMA_GLO_CFG       0x1A04
  34  #define MTK_RX_2B_OFFSET       BIT(31)
  35  #define MTK_RX_BT_32DWORDS     (3 << 11)
  36 +#define MTK_NDP_CO_PRO         BIT(10)
  37  #define MTK_TX_WB_DDONE                BIT(6)
  38  #define MTK_DMA_SIZE_16DWORDS  (2 << 4)
  39  #define MTK_RX_DMA_BUSY                BIT(3)