mediatek: add support for the new MT7623 Arm SoC
[openwrt/openwrt.git] / target / linux / mediatek / patches / 0022-dt-bindings-thermal-Add-binding-document-for-Mediate.patch
1 From 9b799b8a4ecbf560f8fb996e8e5147a8f7b9a1b3 Mon Sep 17 00:00:00 2001
2 From: Sascha Hauer <s.hauer@pengutronix.de>
3 Date: Wed, 13 May 2015 10:52:41 +0200
4 Subject: [PATCH 22/76] dt-bindings: thermal: Add binding document for
5 Mediatek thermal controller
6
7 Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
8 ---
9 .../bindings/thermal/mediatek-thermal.txt | 36 ++++++++++++++++++++
10 1 file changed, 36 insertions(+)
11 create mode 100644 Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
12
13 diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
14 new file mode 100644
15 index 0000000..adf5d2c
16 --- /dev/null
17 +++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
18 @@ -0,0 +1,36 @@
19 +* Mediatek Thermal
20 +
21 +This describes the device tree binding for the Mediatek thermal controller
22 +which measures the on-SoC temperatures. This device does not have its own ADC,
23 +instead it directly controls the AUXADC via AHB bus accesses. For this reason
24 +this device needs phandles to the AUXADC.
25 +
26 +Required properties:
27 +- compatible: "mediatek,mt8173-thermal"
28 +- reg: Address range of the thermal controller
29 +- interrupts: IRQ for the thermal controller
30 +- clocks, clock-names: Clocks needed for the thermal controller. required
31 + clocks are:
32 + "therm": Main clock needed for register access
33 + "auxadc": The AUXADC clock
34 +- resets, reset-names: Reference to the reset controller controlling the thermal
35 + controller. Required reset-names:
36 + "therm": The main reset line
37 +- auxadc: A phandle to the AUXADC which the thermal controller uses
38 +- apmixedsys: A phandle to the APMIXEDSYS controller.
39 +- #thermal-sensor-cells : Should be 1. See ./thermal.txt for a description
40 +
41 +Example:
42 +
43 + thermal: thermal@1100b000 {
44 + #thermal-sensor-cells = <1>;
45 + compatible = "mediatek,mt8173-thermal";
46 + reg = <0 0x1100b000 0 0x1000>;
47 + interrupts = <0 70 IRQ_TYPE_LEVEL_LOW>;
48 + clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
49 + clock-names = "therm", "auxadc";
50 + resets = <&pericfg MT8173_PERI_THERM_SW_RST>;
51 + reset-names = "therm";
52 + auxadc = <&auxadc>;
53 + apmixedsys = <&apmixedsys>;
54 + };
55 --
56 1.7.10.4
57