mediatek: add support for the new MT7623 Arm SoC
[openwrt/openwrt.git] / target / linux / mediatek / patches / 0042-ARM-mediatek-add-smp-bringup-code.patch
1 From daa2c1f9202f08628d4f91a1cf4dafb44c9bcafe Mon Sep 17 00:00:00 2001
2 From: "Joe.C" <yingjoe.chen@mediatek.com>
3 Date: Fri, 1 May 2015 15:43:28 +0800
4 Subject: [PATCH 42/76] ARM: mediatek: add smp bringup code
5
6 Add support for booting secondary CPUs on mt6589, mt8127
7 and mt8135.
8
9 Signed-off-by: Yingjoe Chen <yingjoe.chen@mediatek.com>
10 ---
11 arch/arm/mach-mediatek/Makefile | 3 +
12 arch/arm/mach-mediatek/platsmp.c | 145 ++++++++++++++++++++++++++++++++++++++
13 2 files changed, 148 insertions(+)
14 create mode 100644 arch/arm/mach-mediatek/platsmp.c
15
16 diff --git a/arch/arm/mach-mediatek/Makefile b/arch/arm/mach-mediatek/Makefile
17 index 43e619f..2116460 100644
18 --- a/arch/arm/mach-mediatek/Makefile
19 +++ b/arch/arm/mach-mediatek/Makefile
20 @@ -1 +1,4 @@
21 +ifeq ($(CONFIG_SMP),y)
22 +obj-$(CONFIG_ARCH_MEDIATEK) += platsmp.o
23 +endif
24 obj-$(CONFIG_ARCH_MEDIATEK) += mediatek.o
25 diff --git a/arch/arm/mach-mediatek/platsmp.c b/arch/arm/mach-mediatek/platsmp.c
26 new file mode 100644
27 index 0000000..e266b3d
28 --- /dev/null
29 +++ b/arch/arm/mach-mediatek/platsmp.c
30 @@ -0,0 +1,145 @@
31 +/*
32 + * arch/arm/mach-mediatek/platsmp.c
33 + *
34 + * Copyright (c) 2014 Mediatek Inc.
35 + * Author: Shunli Wang <shunli.wang@mediatek.com>
36 + * Yingjoe Chen <yingjoe.chen@mediatek.com>
37 + *
38 + * This program is free software; you can redistribute it and/or modify
39 + * it under the terms of the GNU General Public License version 2 as
40 + * published by the Free Software Foundation.
41 + *
42 + * This program is distributed in the hope that it will be useful,
43 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
44 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
45 + * GNU General Public License for more details.
46 + *
47 + */
48 +#include <linux/io.h>
49 +#include <linux/memblock.h>
50 +#include <linux/of.h>
51 +#include <linux/of_address.h>
52 +#include <linux/string.h>
53 +#include <linux/threads.h>
54 +
55 +#define MTK_MAX_CPU 8
56 +#define MTK_SMP_REG_SIZE 0x1000
57 +
58 +struct mtk_smp_boot_info {
59 + unsigned long smp_base;
60 + unsigned int jump_reg;
61 + unsigned int boot_reg;
62 + unsigned int core_keys[MTK_MAX_CPU - 1];
63 + unsigned int core_regs[MTK_MAX_CPU - 1];
64 +};
65 +
66 +static const struct mtk_smp_boot_info mtk_mt8135_tz_boot = {
67 + 0x80002000, 1020, 1012,
68 + { 0x534c4131, 0x4c415332, 0x41534c33 },
69 + { 1016, 1016, 1016},
70 +};
71 +
72 +static const struct mtk_smp_boot_info mtk_mt6589_boot = {
73 + 0x10002000, 0x34, 0x30,
74 + { 0x534c4131, 0x4c415332, 0x41534c33 },
75 + { 0x38, 0x3c, 0x40 },
76 +};
77 +
78 +static const struct of_device_id mtk_tz_smp_boot_infos[] __initconst = {
79 + { .compatible = "mediatek,mt8135", .data = &mtk_mt8135_tz_boot },
80 + { .compatible = "mediatek,mt8127", .data = &mtk_mt8135_tz_boot },
81 +};
82 +
83 +static const struct of_device_id mtk_smp_boot_infos[] __initconst = {
84 + { .compatible = "mediatek,mt6589", .data = &mtk_mt6589_boot },
85 +};
86 +
87 +static void __iomem *mtk_smp_base;
88 +static const struct mtk_smp_boot_info *mtk_smp_info;
89 +
90 +static int mtk_boot_secondary(unsigned int cpu, struct task_struct *idle)
91 +{
92 + if (!mtk_smp_base)
93 + return -EINVAL;
94 +
95 + if (!mtk_smp_info->core_keys[cpu-1])
96 + return -EINVAL;
97 +
98 + writel_relaxed(mtk_smp_info->core_keys[cpu-1],
99 + mtk_smp_base + mtk_smp_info->core_regs[cpu-1]);
100 +
101 + arch_send_wakeup_ipi_mask(cpumask_of(cpu));
102 +
103 + return 0;
104 +}
105 +
106 +static void __init __mtk_smp_prepare_cpus(unsigned int max_cpus, int trustzone)
107 +{
108 + int i, num;
109 + const struct of_device_id *infos;
110 +
111 + if (trustzone) {
112 + num = ARRAY_SIZE(mtk_tz_smp_boot_infos);
113 + infos = mtk_tz_smp_boot_infos;
114 + } else {
115 + num = ARRAY_SIZE(mtk_smp_boot_infos);
116 + infos = mtk_smp_boot_infos;
117 + }
118 +
119 + /* Find smp boot info for this SoC */
120 + for (i = 0; i < num; i++) {
121 + if (of_machine_is_compatible(infos[i].compatible)) {
122 + mtk_smp_info = infos[i].data;
123 + break;
124 + }
125 + }
126 +
127 + if (!mtk_smp_info) {
128 + pr_err("%s: Device is not supported\n", __func__);
129 + return;
130 + }
131 +
132 + if (trustzone) {
133 + if (memblock_reserve(mtk_smp_info->smp_base, MTK_SMP_REG_SIZE)) {
134 + pr_err("%s: Can't reserve smp memory\n", __func__);
135 + return;
136 + }
137 + mtk_smp_base = phys_to_virt(mtk_smp_info->smp_base);
138 + } else {
139 + mtk_smp_base = ioremap(mtk_smp_info->smp_base, MTK_SMP_REG_SIZE);
140 + if (!mtk_smp_base) {
141 + pr_err("%s: Can't remap %lx\n", __func__,
142 + mtk_smp_info->smp_base);
143 + return;
144 + }
145 + }
146 +
147 + /*
148 + * write the address of slave startup address into the system-wide
149 + * jump register
150 + */
151 + writel_relaxed(virt_to_phys(secondary_startup),
152 + mtk_smp_base + mtk_smp_info->jump_reg);
153 +}
154 +
155 +static void __init mtk_tz_smp_prepare_cpus(unsigned int max_cpus)
156 +{
157 + __mtk_smp_prepare_cpus(max_cpus, 1);
158 +}
159 +
160 +static void __init mtk_smp_prepare_cpus(unsigned int max_cpus)
161 +{
162 + __mtk_smp_prepare_cpus(max_cpus, 0);
163 +}
164 +
165 +static struct smp_operations mt81xx_tz_smp_ops __initdata = {
166 + .smp_prepare_cpus = mtk_tz_smp_prepare_cpus,
167 + .smp_boot_secondary = mtk_boot_secondary,
168 +};
169 +CPU_METHOD_OF_DECLARE(mt81xx_tz_smp, "mediatek,mt81xx-tz-smp", &mt81xx_tz_smp_ops);
170 +
171 +static struct smp_operations mt65xx_smp_ops __initdata = {
172 + .smp_prepare_cpus = mtk_smp_prepare_cpus,
173 + .smp_boot_secondary = mtk_boot_secondary,
174 +};
175 +CPU_METHOD_OF_DECLARE(mt65xx_smp, "mediatek,mt65xx-smp", &mt65xx_smp_ops);
176 --
177 1.7.10.4
178