target/linux/mediatek/patches/0044-dt-bindings-Add-usb3.0-phy-binding-for-MT65xx-SoCs.patch

   1 From 8d61eb953496aba51b94dac07c31c7e069c784bd Mon Sep 17 00:00:00 2001
   2 From: Chunfeng Yun <chunfeng.yun@mediatek.com>
   3 Date: Wed, 27 May 2015 19:47:58 +0800
   4 Subject: [PATCH 44/76] dt-bindings: Add usb3.0 phy binding for MT65xx SoCs
   5
   6 add a DT binding documentation of usb3.0 phy for MT65xx
   7 SoCs from Mediatek.
   8
   9 Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
  10 ---
  11  .../devicetree/bindings/usb/mt65xx-u3phy.txt       |   37 ++++++++++++++++++++
  12  1 file changed, 37 insertions(+)
  13  create mode 100644 Documentation/devicetree/bindings/usb/mt65xx-u3phy.txt
  14
  15 --- /dev/null
  16 +++ b/Documentation/devicetree/bindings/usb/mt65xx-u3phy.txt
  17 @@ -0,0 +1,37 @@
  18 +MT65xx U3PHY
  19 +
  20 +The device node for Mediatek SOC usb3.0 phy
  21 +
  22 +Required properties:
  23 + - compatible : Should be "mediatek,mt8173-u3phy"
  24 + - reg        : Offset and length of registers, the first is for mac domain,
  25 +       another for phy domain
  26 + - power-domains: to enable usb's mtcmos
  27 + - reg-vusb33-supply:  regulator of usb avdd3.3v
  28 + - clocks     : must support all clocks that phy need
  29 + - clock-names: should be "wakeup_deb_p0", "wakeup_deb_p1" for wakeup
  30 +       debounce control clocks, "sys_mac" for sys and mac clocks and
  31 +       "u3phya_ref" for u3phya reference clock.
  32 +
  33 +Optional properties:
  34 + - disable-usb2-p1 : disable port1 of usb2.0 which has two ports.
  35 + - reg-p1-vbus-supply : regulator of port1's vbus;
  36 +
  37 +Example:
  38 +
  39 +u3phy: usb-phy@11271000 {
  40 +       compatible = "mediatek,mt8173-u3phy";
  41 +       reg = <0 0x11271000 0 0x3000>,
  42 +             <0 0x11280000 0 0x20000>;
  43 +       power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
  44 +       reg-vusb33-supply = <&mt6397_usb_reg>;
  45 +       clocks = <&perisys PERI_USB0>,
  46 +                <&perisys PERI_USB1>,
  47 +                <&topckgen CLK_TOP_USB30_SEL>,
  48 +                <&apmixedsys CLK_APMIXED_REF2USB_TX>;
  49 +       clock-names = "wakeup_deb_p0",
  50 +                     "wakeup_deb_p1",
  51 +                     "sys_mac",
  52 +                     "u3phya_ref";
  53 +       disable-usb2-p1;
  54 +};