generic/4.4: remove ISSI SI25CD512 SPI flash support patch
[openwrt/openwrt.git] / target / linux / mediatek / patches / 0070-clk-mediatek-Export-CPU-mux-clocks-for-CPU-frequency.patch
1 From ac825c0dd7370ae1b9a1a4346f895728e09d9cc7 Mon Sep 17 00:00:00 2001
2 From: John Crispin <blogic@openwrt.org>
3 Date: Wed, 1 Jul 2015 07:58:44 +0200
4 Subject: [PATCH 70/76] clk: mediatek: Export CPU mux clocks for CPU frequency
5 control
6
7 This patch adds CPU mux clocks which are used by Mediatek cpufreq driver
8 for intermediate clock source switching.
9
10 Changes in v3:
11 - Rebase to 4.2-rc1
12 - Fix some issues of v2
13
14 Changes in v2:
15 - Remove use of .determine_rate callback
16
17 Signed-off-by: Pi-Cheng Chen <pi-cheng.chen@linaro.org>
18 ---
19 drivers/clk/mediatek/Makefile | 2 +-
20 drivers/clk/mediatek/clk-cpumux.c | 119 +++++++++++++++++++++++++++++++++++++
21 drivers/clk/mediatek/clk-cpumux.h | 30 ++++++++++
22 3 files changed, 150 insertions(+), 1 deletion(-)
23 create mode 100644 drivers/clk/mediatek/clk-cpumux.c
24 create mode 100644 drivers/clk/mediatek/clk-cpumux.h
25
26 --- a/drivers/clk/mediatek/Makefile
27 +++ b/drivers/clk/mediatek/Makefile
28 @@ -1,4 +1,4 @@
29 -obj-y += clk-mtk.o clk-pll.o clk-gate.o
30 +obj-y += clk-mtk.o clk-pll.o clk-gate.o clk-cpumux.o
31 obj-$(CONFIG_RESET_CONTROLLER) += reset.o
32 obj-y += clk-mt7623.o
33 obj-y += clk-mt8135.o
34 --- /dev/null
35 +++ b/drivers/clk/mediatek/clk-cpumux.c
36 @@ -0,0 +1,119 @@
37 +/*
38 + * Copyright (c) 2015 Linaro Ltd.
39 + * Author: Pi-Cheng Chen <pi-cheng.chen@linaro.org>
40 + *
41 + * This program is free software; you can redistribute it and/or modify
42 + * it under the terms of the GNU General Public License version 2 as
43 + * published by the Free Software Foundation.
44 + *
45 + * This program is distributed in the hope that it will be useful,
46 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
47 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
48 + * GNU General Public License for more details.
49 + */
50 +
51 +#include <linux/clk-provider.h>
52 +#include <linux/mfd/syscon.h>
53 +#include <linux/slab.h>
54 +
55 +#include "clk-mtk.h"
56 +#include "clk-cpumux.h"
57 +
58 +static inline struct mtk_clk_cpumux *to_clk_mux(struct clk_hw *_hw)
59 +{
60 + return container_of(_hw, struct mtk_clk_cpumux, hw);
61 +}
62 +
63 +static u8 clk_cpumux_get_parent(struct clk_hw *hw)
64 +{
65 + struct mtk_clk_cpumux *mux = to_clk_mux(hw);
66 + int num_parents = __clk_get_num_parents(hw->clk);
67 + unsigned int val;
68 +
69 + regmap_read(mux->regmap, mux->reg, &val);
70 +
71 + val >>= mux->shift;
72 + val &= mux->mask;
73 +
74 + if (val >= num_parents)
75 + return -EINVAL;
76 +
77 + return val;
78 +}
79 +
80 +static int clk_cpumux_set_parent(struct clk_hw *hw, u8 index)
81 +{
82 + struct mtk_clk_cpumux *mux = to_clk_mux(hw);
83 + u32 mask, val;
84 +
85 + val = index << mux->shift;
86 + mask = mux->mask << mux->shift;
87 +
88 + return regmap_update_bits(mux->regmap, mux->reg, mask, val);
89 +}
90 +
91 +static const struct clk_ops clk_cpumux_ops = {
92 + .get_parent = clk_cpumux_get_parent,
93 + .set_parent = clk_cpumux_set_parent,
94 +};
95 +
96 +static struct clk *mtk_clk_register_cpumux(const struct mtk_composite *mux,
97 + struct regmap *regmap)
98 +{
99 + struct mtk_clk_cpumux *cpumux;
100 + struct clk *clk;
101 + struct clk_init_data init;
102 +
103 + cpumux = kzalloc(sizeof(*cpumux), GFP_KERNEL);
104 + if (!cpumux)
105 + return ERR_PTR(-ENOMEM);
106 +
107 + init.name = mux->name;
108 + init.ops = &clk_cpumux_ops;
109 + init.parent_names = mux->parent_names;
110 + init.num_parents = mux->num_parents;
111 + init.flags = mux->flags;
112 +
113 + cpumux->reg = mux->mux_reg;
114 + cpumux->shift = mux->mux_shift;
115 + cpumux->mask = BIT(mux->mux_width) - 1;
116 + cpumux->regmap = regmap;
117 + cpumux->hw.init = &init;
118 +
119 + clk = clk_register(NULL, &cpumux->hw);
120 + if (IS_ERR(clk))
121 + kfree(cpumux);
122 +
123 + return clk;
124 +}
125 +
126 +int mtk_clk_register_cpumuxes(struct device_node *node,
127 + const struct mtk_composite *clks, int num,
128 + struct clk_onecell_data *clk_data)
129 +{
130 + int i;
131 + struct clk *clk;
132 + struct regmap *regmap;
133 +
134 + regmap = syscon_node_to_regmap(node);
135 + if (IS_ERR(regmap)) {
136 + pr_err("Cannot find regmap for %s: %d\n", node->full_name,
137 + PTR_ERR(regmap));
138 + return PTR_ERR(regmap);
139 + }
140 +
141 + for (i = 0; i < num; i++) {
142 + const struct mtk_composite *mux = &clks[i];
143 +
144 + clk = mtk_clk_register_cpumux(mux, regmap);
145 + if (IS_ERR(clk)) {
146 + pr_err("Failed to register clk %s: %ld\n",
147 + mux->name, PTR_ERR(clk));
148 + continue;
149 + }
150 +
151 + clk_data->clks[mux->id] = clk;
152 + }
153 +
154 + return 0;
155 +}
156 --- /dev/null
157 +++ b/drivers/clk/mediatek/clk-cpumux.h
158 @@ -0,0 +1,30 @@
159 +/*
160 + * Copyright (c) 2015 Linaro Ltd.
161 + * Author: Pi-Cheng Chen <pi-cheng.chen@linaro.org>
162 + *
163 + * This program is free software; you can redistribute it and/or modify
164 + * it under the terms of the GNU General Public License version 2 as
165 + * published by the Free Software Foundation.
166 + *
167 + * This program is distributed in the hope that it will be useful,
168 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
169 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
170 + * GNU General Public License for more details.
171 + */
172 +
173 +#ifndef __DRV_CLK_CPUMUX_H
174 +#define __DRV_CLK_CPUMUX_H
175 +
176 +struct mtk_clk_cpumux {
177 + struct clk_hw hw;
178 + struct regmap *regmap;
179 + u32 reg;
180 + u32 mask;
181 + u8 shift;
182 +};
183 +
184 +int mtk_clk_register_cpumuxes(struct device_node *node,
185 + const struct mtk_composite *clks, int num,
186 + struct clk_onecell_data *clk_data);
187 +
188 +#endif /* __DRV_CLK_CPUMUX_H */