target/linux/mpc85xx/files/arch/powerpc/boot/dts/tl-wdr4900-v1.dts

   1 /*
   2  * TP-Link TL-WDR4900 v1 Device Tree Source
   3  *
   4  * Copyright 2013 Gabor Juhos <juhosg@openwrt.org>
   5  *
   6  * This program is free software; you can redistribute  it and/or modify it
   7  * under  the terms of  the GNU General  Public License as published by the
   8  * Free Software Foundation;  either version 2 of the  License, or (at your
   9  * option) any later version.
  10  */
  11
  12 /include/ "fsl/p1010si-pre.dtsi"
  13
  14 / {
  15         model = "TP-Link TL-WDR4900 v1";
  16         compatible = "tplink,tl-wdr4900-v1";
  17
  18         chosen {
  19                 bootargs = "console=ttyS0,115200";
  20 /*
  21                 stdout-path = "/soc@ffe00000/serial@4500";
  22 */
  23         };
  24
  25         aliases {
  26                 spi0 = &spi0;
  27                 led-boot = &system_green;
  28                 led-failsafe = &system_green;
  29                 led-running = &system_green;
  30                 led-upgrade = &system_green;
  31         };
  32
  33         memory {
  34                 device_type = "memory";
  35         };
  36
  37         soc: soc@ffe00000 {
  38                 ranges = <0x0 0x0 0xffe00000 0x100000>;
  39
  40                 spi0: spi@7000 {
  41                         flash@0 {
  42                                 compatible = "jedec,spi-nor";
  43                                 reg = <0>;
  44                                 spi-max-frequency = <25000000>;
  45
  46                                 partitions {
  47                                         compatible = "fixed-partitions";
  48                                         #address-cells = <1>;
  49                                         #size-cells = <1>;
  50
  51                                         partition@0 {
  52                                                 reg = <0x0 0x0050000>;
  53                                                 label = "u-boot";
  54                                                 read-only;
  55                                         };
  56
  57                                         partition@50000 {
  58                                                 reg = <0x00050000 0x00010000>;
  59                                                 label = "dtb";
  60                                                 read-only;
  61                                         };
  62
  63                                         partition@60000 {
  64                                                 compatible = "tplink,firmware";
  65                                                 reg = <0x00060000 0x00f80000>;
  66                                                 label = "firmware";
  67                                         };
  68
  69                                         config: partition@fe0000 {
  70                                                 reg = <0x00fe0000 0x00010000>;
  71                                                 label = "config";
  72                                                 read-only;
  73                                         };
  74
  75                                         partition@ff0000 {
  76                                                 reg = <0x00ff0000 0x00010000>;
  77                                                 label = "caldata";
  78                                                 read-only;
  79                                         };
  80                                 };
  81                         };
  82                 };
  83
  84                 gpio0: gpio-controller@fc00 {
  85                 };
  86
  87                 usb@22000 {
  88                         phy_type = "utmi";
  89                         dr_mode = "host";
  90                 };
  91
  92                 mdio@24000 {
  93                         phy0: ethernet-phy@0 {
  94                                 reg = <0x0>;
  95                                 qca,ar8327-initvals = <
  96                                         0x00004 0x07600000 /* PAD0_MODE */
  97                                         0x00008 0x00000000 /* PAD5_MODE */
  98                                         0x0000c 0x01000000 /* PAD6_MODE */
  99                                         0x00010 0x40000000 /* POWER_ON_STRIP */
 100                                         0x00050 0xcf35cf35 /* LED_CTRL0 */
 101                                         0x00054 0xcf35cf35 /* LED_CTRL1 */
 102                                         0x00058 0xcf35cf35 /* LED_CTRL2 */
 103                                         0x0005c 0x03ffff00 /* LED_CTRL3 */
 104                                         0x0007c 0x0000007e /* PORT0_STATUS */
 105                                         0x00094 0x00000200 /* PORT6_STATUS */
 106                                 >;
 107                         };
 108                 };
 109
 110                 mdio@25000 {
 111                         status = "disabled";
 112                 };
 113
 114                 mdio@26000 {
 115                         status = "disabled";
 116                 };
 117
 118                 enet0: ethernet@b0000 {
 119                         phy-handle = <&phy0>;
 120                         phy-connection-type = "rgmii-id";
 121                         mtd-mac-address = <&config 0x144>;
 122                 };
 123
 124                 enet1: ethernet@b1000 {
 125                         status = "disabled";
 126                 };
 127
 128                 enet2: ethernet@b2000 {
 129                         status = "disabled";
 130                 };
 131
 132                 sdhc@2e000 {
 133                         status = "disabled";
 134                 };
 135
 136                 serial1: serial@4600 {
 137                         status = "disabled";
 138                 };
 139
 140                 can0: can@1c000 {
 141                         status = "disabled";
 142                 };
 143
 144                 can1: can@1d000 {
 145                         status = "disabled";
 146                 };
 147
 148                 ptp_clock@b0e00 {
 149                         compatible = "fsl,etsec-ptp";
 150                         reg = <0xb0e00 0xb0>;
 151                         interrupts = <68 2 0 0 69 2 0 0 70 2 0 0>;
 152                         fsl,cksel       = <1>;
 153                         fsl,tclk-period = <5>;
 154                         fsl,tmr-prsc    = <2>;
 155                         fsl,tmr-add     = <0xcccccccd>;
 156                         fsl,tmr-fiper1  = <0x3b9ac9fb>; /* 1PPS */
 157                         fsl,tmr-fiper2  = <0x00018696>;
 158                         fsl,max-adj     = <249999999>;
 159                 };
 160         };
 161
 162         pci0: pcie@ffe09000 {
 163                 reg = <0 0xffe09000 0 0x1000>;
 164                 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
 165                           0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
 166                 pcie@0 {
 167                         ranges = <0x2000000 0x0 0xa0000000
 168                                   0x2000000 0x0 0xa0000000
 169                                   0x0 0x20000000
 170
 171                                   0x1000000 0x0 0x0
 172                                   0x1000000 0x0 0x0
 173                                   0x0 0x100000>;
 174                 };
 175         };
 176
 177         pci1: pcie@ffe0a000 {
 178                 reg = <0 0xffe0a000 0 0x1000>;
 179                 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
 180                           0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
 181                 pcie@0 {
 182                         ranges = <0x2000000 0x0 0x80000000
 183                                   0x2000000 0x0 0x80000000
 184                                   0x0 0x20000000
 185
 186                                   0x1000000 0x0 0x0
 187                                   0x1000000 0x0 0x0
 188                                   0x0 0x100000>;
 189                 };
 190         };
 191
 192         ifc: ifc@ffe1e000 {
 193                 status = "disabled";
 194         };
 195
 196         leds {
 197                 compatible = "gpio-leds";
 198
 199                 system_green: system {
 200                         gpios = <&gpio0 2 1>; /* active low */
 201                         label = "tp-link:blue:system";
 202                 };
 203
 204                 usb1 {
 205                         gpios = <&gpio0 3 1>; /* active low */
 206                         label = "tp-link:green:usb1";
 207                 };
 208
 209                 usb2 {
 210                         gpios = <&gpio0 4 1>; /* active low */
 211                         label = "tp-link:green:usb2";
 212                 };
 213
 214                 usbpower {
 215                         gpios = <&gpio0 10 1>; /* active low */
 216                         label = "tp-link:usb:power";
 217                 };
 218         };
 219
 220         buttons {
 221                 compatible = "gpio-keys";
 222
 223                 reset {
 224                         label = "Reset button";
 225                         gpios = <&gpio0 5 1>; /* active low */
 226                         linux,code = <0x198>; /* KEY_RESTART */
 227                 };
 228
 229                 rfkill {
 230                         label = "RFKILL switch";
 231                         gpios = <&gpio0 11 1>; /* active low */
 232                         linux,code = <0xf7>; /* RFKill */
 233                 };
 234         };
 235 };
 236
 237 /include/ "fsl/p1010si-post.dtsi"
 238
 239 /*
 240  * The TL-WDR4900 v1 uses the NXP (Freescale) P1014 SoC which is closely
 241  * related to the P1010.
 242  *
 243  * NXP QP1010FS.pdf "QorIQ P1010 and P1014 Communications Processors"
 244  * datasheet states that the P1014 does not include the accelerated crypto
 245  * module (CAAM/SEC4) which is present in the P1010.
 246  *
 247  * NXP Appliation Note AN4938 Rev. 2 implies that some P1014 may contain the
 248  * SEC4 module, but states that SoCs with System Version Register values
 249  * 0x80F10110 or 0x80F10120 do not have the security feature.
 250  *
 251  * All v1.3 TL-WDR4900 tested have SVR == 0x80F10110 which AN4938 describes
 252  * as: core rev 1.0, "P1014 (without security)".
 253  *
 254  * The SVR value is reported by uboot on the serial console.
 255  */
 256
 257 / {
 258         soc: soc@ffe00000 {
 259                 /delete-node/ crypto@30000; /* Pulled in by p1010si-post */
 260         };
 261 };