target/linux/mpc85xx/files/arch/powerpc/boot/dts/tl-wdr4900-v1.dts

   1 /*
   2  * TP-Link TL-WDR4900 v1 Device Tree Source
   3  *
   4  * Copyright 2013 Gabor Juhos <juhosg@openwrt.org>
   5  *
   6  * This program is free software; you can redistribute  it and/or modify it
   7  * under  the terms of  the GNU General  Public License as published by the
   8  * Free Software Foundation;  either version 2 of the  License, or (at your
   9  * option) any later version.
  10  */
  11
  12 #include <dt-bindings/input/input.h>
  13 #include <dt-bindings/gpio/gpio.h>
  14
  15 /include/ "fsl/p1010si-pre.dtsi"
  16
  17 / {
  18         model = "TP-Link TL-WDR4900 v1";
  19         compatible = "tplink,tl-wdr4900-v1";
  20
  21         chosen {
  22                 bootargs = "console=ttyS0,115200";
  23 /*
  24                 stdout-path = "/soc@ffe00000/serial@4500";
  25 */
  26         };
  27
  28         aliases {
  29                 spi0 = &spi0;
  30                 led-boot = &system_green;
  31                 led-failsafe = &system_green;
  32                 led-running = &system_green;
  33                 led-upgrade = &system_green;
  34                 label-mac-device = &enet0;
  35         };
  36
  37         memory {
  38                 device_type = "memory";
  39         };
  40
  41         soc: soc@ffe00000 {
  42                 ranges = <0x0 0x0 0xffe00000 0x100000>;
  43
  44                 spi0: spi@7000 {
  45                         flash@0 {
  46                                 compatible = "jedec,spi-nor";
  47                                 reg = <0>;
  48                                 spi-max-frequency = <25000000>;
  49
  50                                 partitions {
  51                                         compatible = "fixed-partitions";
  52                                         #address-cells = <1>;
  53                                         #size-cells = <1>;
  54
  55                                         uboot: partition@0 {
  56                                                 reg = <0x0 0x0050000>;
  57                                                 label = "u-boot";
  58                                                 read-only;
  59
  60                                                 nvmem-layout {
  61                                                         compatible = "fixed-layout";
  62                                                         #address-cells = <1>;
  63                                                         #size-cells = <1>;
  64
  65                                                         macaddr_uboot_4fc00: macaddr@4fc00 {
  66                                                                 reg = <0x4fc00 0x6>;
  67                                                         };
  68                                                 };
  69                                         };
  70
  71                                         partition@50000 {
  72                                                 reg = <0x00050000 0x00010000>;
  73                                                 label = "dtb";
  74                                                 read-only;
  75                                         };
  76
  77                                         partition@60000 {
  78                                                 compatible = "tplink,firmware";
  79                                                 reg = <0x00060000 0x00f80000>;
  80                                                 label = "firmware";
  81                                         };
  82
  83                                         partition@fe0000 {
  84                                                 reg = <0x00fe0000 0x00010000>;
  85                                                 label = "config";
  86                                                 read-only;
  87                                         };
  88
  89                                         partition@ff0000 {
  90                                                 reg = <0x00ff0000 0x00010000>;
  91                                                 label = "caldata";
  92                                                 read-only;
  93                                         };
  94                                 };
  95                         };
  96                 };
  97
  98                 gpio0: gpio-controller@fc00 {
  99                 };
 100
 101                 usb@22000 {
 102                         phy_type = "utmi";
 103                         dr_mode = "host";
 104                 };
 105
 106                 mdio@24000 {
 107
 108                         phy_port1: phy@0 {
 109                                 reg = <0>;
 110                         };
 111
 112                         phy_port2: phy@1 {
 113                                 reg = <1>;
 114                         };
 115
 116                         phy_port3: phy@2 {
 117                                 reg = <2>;
 118                         };
 119
 120                         phy_port4: phy@3 {
 121                                 reg = <3>;
 122                         };
 123
 124                         phy_port5: phy@4 {
 125                                 reg = <4>;
 126                         };
 127
 128                         switch@10 {
 129                                 compatible = "qca,qca8327";
 130                                 reg = <0x10>;
 131
 132                                 ports {
 133                                         #address-cells = <1>;
 134                                         #size-cells = <0>;
 135
 136                                         port@0 {
 137                                                 reg = <0>;
 138                                                 ethernet = <&enet0>;
 139                                                 phy-mode = "rgmii-id";
 140
 141                                                 fixed-link {
 142                                                         speed = <1000>;
 143                                                         full-duplex;
 144                                                 };
 145                                         };
 146
 147                                         port@1 {
 148                                                 reg = <1>;
 149                                                 label = "wan";
 150                                                 phy-handle = <&phy_port1>;
 151                                         };
 152
 153                                         port@2 {
 154                                                 reg = <2>;
 155                                                 label = "lan1";
 156                                                 phy-handle = <&phy_port2>;
 157                                         };
 158
 159                                         port@3 {
 160                                                 reg = <3>;
 161                                                 label = "lan2";
 162                                                 phy-handle = <&phy_port3>;
 163                                         };
 164
 165                                         port@4 {
 166                                                 reg = <4>;
 167                                                 label = "lan3";
 168                                                 phy-handle = <&phy_port4>;
 169                                         };
 170
 171                                         port@5 {
 172                                                 reg = <5>;
 173                                                 label = "lan4";
 174                                                 phy-handle = <&phy_port5>;
 175                                         };
 176                                 };
 177                         };
 178                 };
 179
 180                 mdio@25000 {
 181                         status = "disabled";
 182                 };
 183
 184                 mdio@26000 {
 185                         status = "disabled";
 186                 };
 187
 188                 enet0: ethernet@b0000 {
 189                         phy-connection-type = "rgmii-id";
 190                         nvmem-cells = <&macaddr_uboot_4fc00>;
 191                         nvmem-cell-names = "mac-address";
 192
 193                         fixed-link {
 194                                 speed = <1000>;
 195                                 full-duplex;
 196                         };
 197                 };
 198
 199                 enet1: ethernet@b1000 {
 200                         status = "disabled";
 201                 };
 202
 203                 enet2: ethernet@b2000 {
 204                         status = "disabled";
 205                 };
 206
 207                 sdhc@2e000 {
 208                         status = "disabled";
 209                 };
 210
 211                 serial1: serial@4600 {
 212                         status = "disabled";
 213                 };
 214
 215                 can0: can@1c000 {
 216                         status = "disabled";
 217                 };
 218
 219                 can1: can@1d000 {
 220                         status = "disabled";
 221                 };
 222
 223                 ptp_clock@b0e00 {
 224                         compatible = "fsl,etsec-ptp";
 225                         reg = <0xb0e00 0xb0>;
 226                         interrupts = <68 2 0 0 69 2 0 0 70 2 0 0>;
 227                         fsl,cksel       = <1>;
 228                         fsl,tclk-period = <5>;
 229                         fsl,tmr-prsc    = <2>;
 230                         fsl,tmr-add     = <0xcccccccd>;
 231                         fsl,tmr-fiper1  = <0x3b9ac9fb>; /* 1PPS */
 232                         fsl,tmr-fiper2  = <0x00018696>;
 233                         fsl,max-adj     = <249999999>;
 234                 };
 235         };
 236
 237         pci0: pcie@ffe09000 {
 238                 reg = <0 0xffe09000 0 0x1000>;
 239                 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
 240                           0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
 241                 pcie@0 {
 242                         ranges = <0x2000000 0x0 0xa0000000
 243                                   0x2000000 0x0 0xa0000000
 244                                   0x0 0x20000000
 245
 246                                   0x1000000 0x0 0x0
 247                                   0x1000000 0x0 0x0
 248                                   0x0 0x100000>;
 249                 };
 250         };
 251
 252         pci1: pcie@ffe0a000 {
 253                 reg = <0 0xffe0a000 0 0x1000>;
 254                 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
 255                           0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
 256                 pcie@0 {
 257                         ranges = <0x2000000 0x0 0x80000000
 258                                   0x2000000 0x0 0x80000000
 259                                   0x0 0x20000000
 260
 261                                   0x1000000 0x0 0x0
 262                                   0x1000000 0x0 0x0
 263                                   0x0 0x100000>;
 264                 };
 265         };
 266
 267         ifc: ifc@ffe1e000 {
 268                 status = "disabled";
 269         };
 270
 271         leds {
 272                 compatible = "gpio-leds";
 273
 274                 system_green: system {
 275                         gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
 276                         label = "tp-link:blue:system";
 277                 };
 278
 279                 usb1 {
 280                         gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
 281                         label = "tp-link:green:usb1";
 282                 };
 283
 284                 usb2 {
 285                         gpios = <&gpio0 4 GPIO_ACTIVE_LOW>;
 286                         label = "tp-link:green:usb2";
 287                 };
 288
 289                 usbpower {
 290                         gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
 291                         label = "tp-link:usb:power";
 292                 };
 293         };
 294
 295         buttons {
 296                 compatible = "gpio-keys";
 297
 298                 reset {
 299                         label = "Reset button";
 300                         gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
 301                         linux,code = <KEY_RESTART>;
 302                 };
 303
 304                 rfkill {
 305                         label = "RFKILL switch";
 306                         gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
 307                         linux,code = <KEY_RFKILL>;
 308                 };
 309         };
 310 };
 311
 312 /include/ "fsl/p1010si-post.dtsi"
 313
 314 / {
 315         cpus {
 316                 PowerPC,P1010@0 {
 317                         bus-frequency = <399999996>;
 318                         timebase-frequency = <49999999>;
 319                         clock-frequency = <799999992>;
 320                 };
 321         };
 322
 323         memory {
 324                 reg = <0x0 0x0 0x0 0x8000000>;
 325         };
 326
 327         soc@ffe00000 {
 328                 bus-frequency = <399999996>;
 329
 330                 serial@4600 {
 331                         clock-frequency = <399999996>;
 332                 };
 333
 334                 serial@4500 {
 335                         clock-frequency = <399999996>;
 336                 };
 337
 338                 pic@40000 {
 339                         clock-frequency = <399999996>;
 340                 };
 341         };
 342 };
 343
 344 /*
 345  * The TL-WDR4900 v1 uses the NXP (Freescale) P1014 SoC which is closely
 346  * related to the P1010.
 347  *
 348  * NXP QP1010FS.pdf "QorIQ P1010 and P1014 Communications Processors"
 349  * datasheet states that the P1014 does not include the accelerated crypto
 350  * module (CAAM/SEC4) which is present in the P1010.
 351  *
 352  * NXP Appliation Note AN4938 Rev. 2 implies that some P1014 may contain the
 353  * SEC4 module, but states that SoCs with System Version Register values
 354  * 0x80F10110 or 0x80F10120 do not have the security feature.
 355  *
 356  * All v1.3 TL-WDR4900 tested have SVR == 0x80F10110 which AN4938 describes
 357  * as: core rev 1.0, "P1014 (without security)".
 358  *
 359  * The SVR value is reported by uboot on the serial console.
 360  */
 361
 362 / {
 363         soc: soc@ffe00000 {
 364                 /delete-node/ crypto@30000; /* Pulled in by p1010si-post */
 365         };
 366 };
 367
 368 /*
 369  * For the OpenWrt 22.03 release, since Linux 5.10.138 now uses
 370  * aliases to determine PCI domain numbers, drop aliases so as not to
 371  * change the sysfs path of our wireless netdevs.
 372  */
 373
 374 / {
 375         aliases {
 376                 /delete-property/ pci0;
 377                 /delete-property/ pci1;
 378         };
 379 };