de1de79da9b2018f330b99ca11c86a5486f7a16c
[openwrt/openwrt.git] / target / linux / mvebu / files-4.4 / arch / arm / boot / dts / armada-385-linksys-rango.dts
1 /*
2 * Device Tree file for the Linksys WRT3200ACM (Rango)
3 *
4 * Copyright (C) 2016 Imre Kaloz <kaloz@openwrt.org>
5 *
6 *
7 * This file is dual-licensed: you can use it either under the terms
8 * of the GPL or the X11 license, at your option. Note that this dual
9 * licensing only applies to this file, and not this project as a
10 * whole.
11 *
12 * a) This file is licensed under the terms of the GNU General Public
13 * License version 2. This program is licensed "as is" without
14 * any warranty of any kind, whether express or implied.
15 *
16 * Or, alternatively,
17 *
18 * b) Permission is hereby granted, free of charge, to any person
19 * obtaining a copy of this software and associated documentation
20 * files (the "Software"), to deal in the Software without
21 * restriction, including without limitation the rights to use,
22 * copy, modify, merge, publish, distribute, sublicense, and/or
23 * sell copies of the Software, and to permit persons to whom the
24 * Software is furnished to do so, subject to the following
25 * conditions:
26 *
27 * The above copyright notice and this permission notice shall be
28 * included in all copies or substantial portions of the Software.
29 *
30 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
31 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
32 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
33 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
34 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
35 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
36 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
37 * OTHER DEALINGS IN THE SOFTWARE.
38 */
39
40 /dts-v1/;
41 #include <dt-bindings/gpio/gpio.h>
42 #include <dt-bindings/input/input.h>
43 #include "armada-385.dtsi"
44
45 / {
46 model = "Linksys WRT3200ACM";
47 compatible = "linksys,rango", "linksys,armada385", "marvell,armada385",
48 "marvell,armada380";
49
50 chosen {
51 stdout-path = "serial0:115200n8";
52 };
53
54 memory {
55 device_type = "memory";
56 reg = <0x00000000 0x20000000>; /* 512 MB */
57 };
58
59 soc {
60 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
61 MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
62 MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
63 MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000
64 MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
65
66 internal-regs {
67
68 spi@10600 {
69 status = "disabled";
70 };
71
72 i2c@11000 {
73 pinctrl-names = "default";
74 pinctrl-0 = <&i2c0_pins>;
75 status = "okay";
76
77 tmp421@4c {
78 compatible = "ti,tmp421";
79 reg = <0x4c>;
80 };
81
82 pca9635@68 {
83 #address-cells = <1>;
84 #size-cells = <0>;
85 compatible = "nxp,pca9635";
86 reg = <0x68>;
87
88 wan_amber@0 {
89 label = "rango:amber:wan";
90 reg = <0x0>;
91 };
92
93 wan_white@1 {
94 label = "rango:white:wan";
95 reg = <0x1>;
96 };
97
98 usb2@5 {
99 label = "rango:white:usb2";
100 reg = <0x5>;
101 };
102
103 usb3_1@6 {
104 label = "rango:white:usb3_1";
105 reg = <0x6>;
106 };
107
108 usb3_2@7 {
109 label = "rango:white:usb3_2";
110 reg = <0x7>;
111 };
112
113 wps_white@8 {
114 label = "rango:white:wps";
115 reg = <0x8>;
116 };
117
118 wps_amber@9 {
119 label = "rango:amber:wps";
120 reg = <0x9>;
121 };
122 };
123 };
124
125 /* J10: VCC, NC, RX, NC, TX, GND */
126 serial@12000 {
127 status = "okay";
128 };
129
130 ethernet@70000 {
131 status = "okay";
132 phy-mode = "rgmii-id";
133 buffer-manager = <&bm>;
134 bm,pool-long = <0>;
135 bm,pool-short = <3>;
136 fixed-link {
137 speed = <1000>;
138 full-duplex;
139 };
140 };
141
142 ethernet@34000 {
143 status = "okay";
144 phy-mode = "sgmii";
145 buffer-manager = <&bm>;
146 bm,pool-long = <2>;
147 bm,pool-short = <3>;
148 fixed-link {
149 speed = <1000>;
150 full-duplex;
151 };
152 };
153
154 mdio {
155 status = "okay";
156 };
157
158 bm@c8000 {
159 status = "okay";
160 };
161
162 sata@a8000 {
163 status = "okay";
164 };
165
166 sdhci@d8000 {
167 pinctrl-names = "default";
168 pinctrl-0 = <&sdhci_pins>;
169 no-1-8-v;
170 broken-cd;
171 wp-inverted;
172 bus-width = <8>;
173 status = "okay";
174 };
175
176 /* USB part of the eSATA/USB 2.0 port */
177 usb@58000 {
178 status = "okay";
179 };
180
181 usb3@f8000 {
182 status = "okay";
183 usb-phy = <&usb3_phy>;
184 };
185
186 flash@d0000 {
187 status = "okay";
188 num-cs = <1>;
189 marvell,nand-keep-config;
190 marvell,nand-enable-arbiter;
191 nand-on-flash-bbt;
192
193 partition@0 {
194 label = "u-boot";
195 reg = <0x0000000 0x200000>; /* 2MB */
196 read-only;
197 };
198
199 partition@200000 {
200 label = "u_env";
201 reg = <0x200000 0x20000>; /* 128KB */
202 };
203
204 partition@220000 {
205 label = "s_env";
206 reg = <0x220000 0x40000>; /* 256KB */
207 };
208
209 partition@7e0000 {
210 label = "devinfo";
211 reg = <0x7e0000 0x40000>; /* 256KB */
212 read-only;
213 };
214
215 partition@820000 {
216 label = "sysdiag";
217 reg = <0x820000 0x1e0000>; /* 1920KB */
218 read-only;
219 };
220
221 /* kernel1 overlaps with rootfs1 by design */
222 partition@a00000 {
223 label = "kernel1";
224 reg = <0xa00000 0x5000000>; /* 80MB */
225 };
226
227 partition@1000000 {
228 label = "rootfs1";
229 reg = <0x1000000 0x4a00000>; /* 74MB */
230 };
231
232 /* kernel2 overlaps with rootfs2 by design */
233 partition@5a00000 {
234 label = "kernel2";
235 reg = <0x5a00000 0x5000000>; /* 80MB */
236 };
237
238 partition@6000000 {
239 label = "rootfs2";
240 reg = <0x6000000 0x4a00000>; /* 74MB */
241 };
242
243 /*
244 * 86MB, last MB is for the BBT, not writable
245 */
246 partition@aa00000 {
247 label = "syscfg";
248 reg = <0xaa00000 0x5600000>;
249 };
250
251 /*
252 * Unused area between "s_env" and "devinfo".
253 * Moved here because otherwise the renumbered
254 * partitions would break the bootloader
255 * supplied bootargs
256 */
257 partition@180000 {
258 label = "unused_area";
259 reg = <0x260000 0x5c0000>; /* 5.75MB */
260 };
261 };
262 };
263
264 bm-bppi {
265 status = "okay";
266 };
267
268 pcie-controller {
269 status = "okay";
270
271 pcie@1,0 {
272 /* Marvell 88W8964, 5GHz-only */
273 status = "okay";
274
275 mwlwifi {
276 marvell,2ghz = <0>;
277 marvell,chainmask = <4 4>;
278 };
279
280 };
281
282 pcie@2,0 {
283 /* Marvell 88W8964, 2GHz-only */
284 status = "okay";
285
286 mwlwifi {
287 marvell,5ghz = <0>;
288 marvell,chainmask = <4 4>;
289 };
290
291 };
292 };
293 };
294
295 usb3_phy: usb3_phy {
296 compatible = "usb-nop-xceiv";
297 vcc-supply = <&reg_xhci0_vbus>;
298 };
299
300 reg_xhci0_vbus: xhci0-vbus {
301 compatible = "regulator-fixed";
302 pinctrl-names = "default";
303 pinctrl-0 = <&xhci0_vbus_pins>;
304 regulator-name = "xhci0-vbus";
305 regulator-min-microvolt = <5000000>;
306 regulator-max-microvolt = <5000000>;
307 enable-active-high;
308 gpio = <&gpio1 15 GPIO_ACTIVE_HIGH>;
309 };
310
311 gpio_keys {
312 compatible = "gpio-keys";
313 #address-cells = <1>;
314 #size-cells = <0>;
315 pinctrl-0 = <&reset_key_pin &wps_key_pin>;
316 pinctrl-names = "default";
317
318 button@1 {
319 label = "WPS";
320 linux,code = <KEY_WPS_BUTTON>;
321 gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
322 };
323
324 button@2 {
325 label = "Factory Reset Button";
326 linux,code = <KEY_RESTART>;
327 gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
328 };
329 };
330
331 gpio-leds {
332 compatible = "gpio-leds";
333 pinctrl-0 = <&power_led_pin &sata_led_pin &wlan_2g_led_pin &wlan_5g_led_pin>;
334 pinctrl-names = "default";
335
336 sata {
337 label = "rango:white:sata";
338 gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
339 linux,default-trigger = "disk-activity";
340 };
341
342 wlan_2g {
343 label = "rango:white:wlan_2g";
344 gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
345 };
346
347 wlan_5g {
348 label = "rango:white:wlan_5g";
349 gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
350 };
351
352 power {
353 label = "rango:white:power";
354 gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
355 default-state = "on";
356 };
357 };
358
359 dsa@0 {
360 compatible = "marvell,dsa";
361 #address-cells = <2>;
362 #size-cells = <0>;
363
364 dsa,ethernet = <&eth2>;
365 dsa,mii-bus = <&mdio>;
366
367 switch@0 {
368 #address-cells = <1>;
369 #size-cells = <0>;
370 reg = <0x0 0>; /* MDIO address 0, switch 0 in tree */
371
372 port@0 {
373 reg = <0>;
374 label = "lan4";
375 };
376
377 port@1 {
378 reg = <1>;
379 label = "lan3";
380 };
381
382 port@2 {
383 reg = <2>;
384 label = "lan2";
385 };
386
387 port@3 {
388 reg = <3>;
389 label = "lan1";
390 };
391
392 port@4 {
393 reg = <4>;
394 label = "wan";
395 };
396
397 port@5 {
398 reg = <5>;
399 label = "cpu";
400 };
401 };
402 };
403
404 mvsw61xx {
405 #address-cells = <1>;
406 #size-cells = <0>;
407 compatible = "marvell,88e6352";
408 status = "okay";
409 reg = <0x10>;
410
411 mii-bus = <&mdio>;
412 cpu-port-0 = <5>;
413 cpu-port-1 = <6>;
414 };
415
416 };
417
418 &pinctrl {
419 sata_led_pin: sata-led-pin {
420 marvell,pins = "mpp21";
421 marvell,function = "gpio";
422 };
423
424 wps_key_pin: wps-key-pin {
425 marvell,pins = "mpp24";
426 marvell,function = "gpio";
427 };
428
429 reset_key_pin: reset-key-pin {
430 marvell,pins = "mpp29";
431 marvell,function = "gpio";
432 };
433
434 wlan_2g_led_pin: wlan-2g-led-pin {
435 marvell,pins = "mpp45";
436 marvell,function = "gpio";
437 };
438
439 wlan_5g_led_pin: wlan-5g-led-pin {
440 marvell,pins = "mpp46";
441 marvell,function = "gpio";
442 };
443
444 xhci0_vbus_pins: xhci0-vbus-pins {
445 marvell,pins = "mpp47";
446 marvell,function = "gpio";
447 };
448
449 power_led_pin: power-led-pin {
450 marvell,pins = "mpp56";
451 marvell,function = "gpio";
452 };
453 };