ac4ac1b1b1a17df01cf8aac4c53c66c3ed3d0976
[openwrt/openwrt.git] / target / linux / mvebu / files-4.9 / arch / arm / boot / dts / armada-385-linksys-rango.dts
1 /*
2 * Device Tree file for the Linksys WRT3200ACM (Rango)
3 *
4 * Copyright (C) 2016 Imre Kaloz <kaloz@openwrt.org>
5 *
6 *
7 * This file is dual-licensed: you can use it either under the terms
8 * of the GPL or the X11 license, at your option. Note that this dual
9 * licensing only applies to this file, and not this project as a
10 * whole.
11 *
12 * a) This file is licensed under the terms of the GNU General Public
13 * License version 2. This program is licensed "as is" without
14 * any warranty of any kind, whether express or implied.
15 *
16 * Or, alternatively,
17 *
18 * b) Permission is hereby granted, free of charge, to any person
19 * obtaining a copy of this software and associated documentation
20 * files (the "Software"), to deal in the Software without
21 * restriction, including without limitation the rights to use,
22 * copy, modify, merge, publish, distribute, sublicense, and/or
23 * sell copies of the Software, and to permit persons to whom the
24 * Software is furnished to do so, subject to the following
25 * conditions:
26 *
27 * The above copyright notice and this permission notice shall be
28 * included in all copies or substantial portions of the Software.
29 *
30 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
31 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
32 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
33 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
34 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
35 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
36 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
37 * OTHER DEALINGS IN THE SOFTWARE.
38 */
39
40 /dts-v1/;
41 #include <dt-bindings/gpio/gpio.h>
42 #include <dt-bindings/input/input.h>
43 #include "armada-385.dtsi"
44
45 / {
46 model = "Linksys WRT3200ACM";
47 compatible = "linksys,rango", "linksys,armada385", "marvell,armada385",
48 "marvell,armada380";
49
50 chosen {
51 stdout-path = "serial0:115200n8";
52 };
53
54 memory {
55 device_type = "memory";
56 reg = <0x00000000 0x20000000>; /* 512 MB */
57 };
58
59 soc {
60 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
61 MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
62 MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
63 MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000
64 MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
65
66 internal-regs {
67
68 spi@10600 {
69 status = "disabled";
70 };
71
72 i2c@11000 {
73 pinctrl-names = "default";
74 pinctrl-0 = <&i2c0_pins>;
75 status = "okay";
76
77 tmp421@4c {
78 compatible = "ti,tmp421";
79 reg = <0x4c>;
80 };
81
82 pca9635@68 {
83 #address-cells = <1>;
84 #size-cells = <0>;
85 compatible = "nxp,pca9635";
86 reg = <0x68>;
87
88 wan_amber@0 {
89 label = "rango:amber:wan";
90 reg = <0x0>;
91 };
92
93 wan_white@1 {
94 label = "rango:white:wan";
95 reg = <0x1>;
96 };
97
98 usb2@5 {
99 label = "rango:white:usb2";
100 reg = <0x5>;
101 };
102
103 usb3_1@6 {
104 label = "rango:white:usb3_1";
105 reg = <0x6>;
106 };
107
108 usb3_2@7 {
109 label = "rango:white:usb3_2";
110 reg = <0x7>;
111 };
112
113 wps_white@8 {
114 label = "rango:white:wps";
115 reg = <0x8>;
116 };
117
118 wps_amber@9 {
119 label = "rango:amber:wps";
120 reg = <0x9>;
121 };
122 };
123 };
124
125 /* J10: VCC, NC, RX, NC, TX, GND */
126 serial@12000 {
127 status = "okay";
128 };
129
130 ethernet@70000 {
131 status = "okay";
132 phy-mode = "rgmii-id";
133 buffer-manager = <&bm>;
134 bm,pool-long = <0>;
135 bm,pool-short = <3>;
136 fixed-link {
137 speed = <1000>;
138 full-duplex;
139 };
140 };
141
142 ethernet@34000 {
143 status = "okay";
144 phy-mode = "sgmii";
145 buffer-manager = <&bm>;
146 bm,pool-long = <2>;
147 bm,pool-short = <3>;
148 fixed-link {
149 speed = <1000>;
150 full-duplex;
151 };
152 };
153
154 mdio {
155 status = "okay";
156 };
157
158 bm@c8000 {
159 status = "okay";
160 };
161
162 sata@a8000 {
163 status = "okay";
164 };
165
166 sdhci@d8000 {
167 pinctrl-names = "default";
168 pinctrl-0 = <&sdhci_pins>;
169 no-1-8-v;
170 broken-cd;
171 wp-inverted;
172 bus-width = <8>;
173 status = "okay";
174 };
175
176 /* USB part of the eSATA/USB 2.0 port */
177 usb@58000 {
178 status = "okay";
179 };
180
181 usb3@f8000 {
182 status = "okay";
183 usb-phy = <&usb3_phy>;
184 };
185
186 flash@d0000 {
187 status = "okay";
188 num-cs = <1>;
189 nand-ecc-strength = <4>;
190 nand-ecc-step-size = <512>;
191 marvell,nand-keep-config;
192 marvell,nand-enable-arbiter;
193 nand-on-flash-bbt;
194
195 partition@0 {
196 label = "u-boot";
197 reg = <0x0000000 0x200000>; /* 2MB */
198 read-only;
199 };
200
201 partition@200000 {
202 label = "u_env";
203 reg = <0x200000 0x20000>; /* 128KB */
204 };
205
206 partition@220000 {
207 label = "s_env";
208 reg = <0x220000 0x40000>; /* 256KB */
209 };
210
211 partition@7e0000 {
212 label = "devinfo";
213 reg = <0x7e0000 0x40000>; /* 256KB */
214 read-only;
215 };
216
217 partition@820000 {
218 label = "sysdiag";
219 reg = <0x820000 0x1e0000>; /* 1920KB */
220 read-only;
221 };
222
223 /* kernel1 overlaps with rootfs1 by design */
224 partition@a00000 {
225 label = "kernel1";
226 reg = <0xa00000 0x5000000>; /* 80MB */
227 };
228
229 partition@1000000 {
230 label = "rootfs1";
231 reg = <0x1000000 0x4a00000>; /* 74MB */
232 };
233
234 /* kernel2 overlaps with rootfs2 by design */
235 partition@5a00000 {
236 label = "kernel2";
237 reg = <0x5a00000 0x5000000>; /* 80MB */
238 };
239
240 partition@6000000 {
241 label = "rootfs2";
242 reg = <0x6000000 0x4a00000>; /* 74MB */
243 };
244
245 /*
246 * 86MB, last MB is for the BBT, not writable
247 */
248 partition@aa00000 {
249 label = "syscfg";
250 reg = <0xaa00000 0x5600000>;
251 };
252
253 /*
254 * Unused area between "s_env" and "devinfo".
255 * Moved here because otherwise the renumbered
256 * partitions would break the bootloader
257 * supplied bootargs
258 */
259 partition@180000 {
260 label = "unused_area";
261 reg = <0x260000 0x5c0000>; /* 5.75MB */
262 };
263 };
264 };
265
266 bm-bppi {
267 status = "okay";
268 };
269
270 pcie-controller {
271 status = "okay";
272
273 pcie@1,0 {
274 /* Marvell 88W8964, 5GHz-only */
275 status = "okay";
276
277 mwlwifi {
278 marvell,2ghz = <0>;
279 marvell,chainmask = <4 4>;
280 };
281
282 };
283
284 pcie@2,0 {
285 /* Marvell 88W8964, 2GHz-only */
286 status = "okay";
287
288 mwlwifi {
289 marvell,5ghz = <0>;
290 marvell,chainmask = <4 4>;
291 };
292
293 };
294 };
295 };
296
297 usb3_phy: usb3_phy {
298 compatible = "usb-nop-xceiv";
299 vcc-supply = <&reg_xhci0_vbus>;
300 };
301
302 reg_xhci0_vbus: xhci0-vbus {
303 compatible = "regulator-fixed";
304 pinctrl-names = "default";
305 pinctrl-0 = <&xhci0_vbus_pins>;
306 regulator-name = "xhci0-vbus";
307 regulator-min-microvolt = <5000000>;
308 regulator-max-microvolt = <5000000>;
309 enable-active-high;
310 gpio = <&gpio1 15 GPIO_ACTIVE_HIGH>;
311 };
312
313 gpio_keys {
314 compatible = "gpio-keys";
315 #address-cells = <1>;
316 #size-cells = <0>;
317 pinctrl-0 = <&reset_key_pin &wps_key_pin>;
318 pinctrl-names = "default";
319
320 button@1 {
321 label = "WPS";
322 linux,code = <KEY_WPS_BUTTON>;
323 gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
324 };
325
326 button@2 {
327 label = "Factory Reset Button";
328 linux,code = <KEY_RESTART>;
329 gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
330 };
331 };
332
333 gpio-leds {
334 compatible = "gpio-leds";
335 pinctrl-0 = <&power_led_pin &sata_led_pin &wlan_2g_led_pin &wlan_5g_led_pin>;
336 pinctrl-names = "default";
337
338 sata {
339 label = "rango:white:sata";
340 gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
341 linux,default-trigger = "disk-activity";
342 };
343
344 wlan_2g {
345 label = "rango:white:wlan_2g";
346 gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
347 };
348
349 wlan_5g {
350 label = "rango:white:wlan_5g";
351 gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
352 };
353
354 power {
355 label = "rango:white:power";
356 gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
357 default-state = "on";
358 };
359 };
360
361 dsa@0 {
362 compatible = "marvell,dsa";
363 #address-cells = <2>;
364 #size-cells = <0>;
365
366 dsa,ethernet = <&eth2>;
367 dsa,mii-bus = <&mdio>;
368
369 switch@0 {
370 #address-cells = <1>;
371 #size-cells = <0>;
372 reg = <0x0 0>; /* MDIO address 0, switch 0 in tree */
373
374 port@0 {
375 reg = <0>;
376 label = "lan4";
377 };
378
379 port@1 {
380 reg = <1>;
381 label = "lan3";
382 };
383
384 port@2 {
385 reg = <2>;
386 label = "lan2";
387 };
388
389 port@3 {
390 reg = <3>;
391 label = "lan1";
392 };
393
394 port@4 {
395 reg = <4>;
396 label = "wan";
397 };
398
399 port@5 {
400 reg = <5>;
401 label = "cpu";
402 };
403 };
404 };
405
406 mvsw61xx {
407 #address-cells = <1>;
408 #size-cells = <0>;
409 compatible = "marvell,88e6352";
410 status = "okay";
411 reg = <0x10>;
412
413 mii-bus = <&mdio>;
414 cpu-port-0 = <5>;
415 cpu-port-1 = <6>;
416 };
417
418 };
419
420 &pinctrl {
421 sata_led_pin: sata-led-pin {
422 marvell,pins = "mpp21";
423 marvell,function = "gpio";
424 };
425
426 wps_key_pin: wps-key-pin {
427 marvell,pins = "mpp24";
428 marvell,function = "gpio";
429 };
430
431 reset_key_pin: reset-key-pin {
432 marvell,pins = "mpp29";
433 marvell,function = "gpio";
434 };
435
436 wlan_2g_led_pin: wlan-2g-led-pin {
437 marvell,pins = "mpp45";
438 marvell,function = "gpio";
439 };
440
441 wlan_5g_led_pin: wlan-5g-led-pin {
442 marvell,pins = "mpp46";
443 marvell,function = "gpio";
444 };
445
446 xhci0_vbus_pins: xhci0-vbus-pins {
447 marvell,pins = "mpp47";
448 marvell,function = "gpio";
449 };
450
451 power_led_pin: power-led-pin {
452 marvell,pins = "mpp56";
453 marvell,function = "gpio";
454 };
455 };